BCD low noise high sensitivity charge detection amplifier for high
performance image sensors
    51.
    发明授权
    BCD low noise high sensitivity charge detection amplifier for high performance image sensors 失效
    BCD低噪声高灵敏度电荷检测放大器,用于高性能图像传感器

    公开(公告)号:US5546438A

    公开(公告)日:1996-08-13

    申请号:US299686

    申请日:1994-09-01

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    CPC分类号: H01L27/148

    摘要: The image sensor charge detection amplifier has a charge storage well 60, a charge sensor 32 for sensing charge levels in the charge storage well 60, a charge drain 28 adjacent to the charge storage well 60, and charge transfer structures for transferring charge from the charge storage well 60 to the charge drain 28.

    摘要翻译: 图像传感器电荷检测放大器具有电荷存储阱60,用于感测电荷存储阱60中的电荷水平的电荷传感器32,与电荷存储阱60相邻的电荷漏极28以及用于从电荷转移电荷的电荷转移结构 存储阱60连接到电荷漏极28。

    Floating gate charge detection node
    52.
    发明授权
    Floating gate charge detection node 失效
    浮栅电荷检测节点

    公开(公告)号:US5491354A

    公开(公告)日:1996-02-13

    申请号:US297460

    申请日:1994-08-19

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    CPC分类号: H01L29/76816 H01L27/148

    摘要: The charge coupled device charge detection node includes a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type in the substrate; virtual gate regions of the first conductivity type formed in the second semiconductor layer, the virtual gate regions forming virtual phase potential areas; an insulating layer on the second semiconductor layer; a floating gate formed on the insulating layer, the floating gate is located above a portion of the second semiconductor layer that is between virtual gate regions, the floating gate forming a floating gate potential well in response to a voltage; a first transfer gate formed on the insulating layer and separated from the floating gate by a virtual gate region, the first transfer gate forming a transfer potential area in response to a voltage; and an electrode coupled to one of the virtual gate regions on the opposite side of the floating gate from the first transfer gate, the electrode increases the potential of the virtual phase potential area below the electrode in response to a voltage.

    摘要翻译: 电荷耦合器件电荷检测节点包括第一导电类型的第一半导体层; 在所述衬底中的第二导电类型的第二半导体层; 形成在第二半导体层中的第一导电类型的虚拟栅极区域,虚拟栅极区域形成虚拟相位电位区域; 第二半导体层上的绝缘层; 形成在所述绝缘层上的浮置栅极,所述浮栅位于所述第二半导体层的位于虚拟栅极区域之间的一部分上,所述浮置栅极响应于电压形成浮置栅极势阱; 形成在所述绝缘层上并通过虚拟栅极区与所述浮动栅极分离的第一传输栅极,所述第一传输栅极响应于电压形成传输电位区域; 以及电极,其耦合到浮置栅极与第一传输栅极的相对侧上的虚拟栅极区域中的一个,电极响应于电压而增加虚拟相电位区域在电极下方的电位。

    Method of making a BCD low noise high sensitivity charge detection
amplifier for high performance image sensors
    53.
    发明授权
    Method of making a BCD low noise high sensitivity charge detection amplifier for high performance image sensors 失效
    制造用于高性能图像传感器的BCD低噪声高灵敏度电荷检测放大器的方法

    公开(公告)号:US5369047A

    公开(公告)日:1994-11-29

    申请号:US87645

    申请日:1993-07-01

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    IPC分类号: H01L27/148 H01L21/72

    CPC分类号: H01L27/148

    摘要: The image sensor charge detection amplifier has a charge storage well 60, a charge sensor 32 for sensing charge levels in the charge storage well 60, a charge drain 28 adjacent to the charge storage well 60, and charge transfer structures for transferring charge from the charge storage well 60 to the charge drain 28.

    摘要翻译: 图像传感器电荷检测放大器具有电荷存储阱60,用于感测电荷存储阱60中的电荷水平的电荷传感器32,与电荷存储阱60相邻的电荷泄漏28,以及用于从电荷转移电荷的电荷转移结构 存储阱60连接到电荷漏极28。

    Method of making charge coupled device/charge super sweep image system
    54.
    发明授权
    Method of making charge coupled device/charge super sweep image system 失效
    制造电荷耦合器件/充电超扫描图像系统的方法

    公开(公告)号:US5369039A

    公开(公告)日:1994-11-29

    申请号:US958617

    申请日:1992-10-09

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    摘要: Described is a new high performance CCD image sensor technology which can be used to build a versatile image senor family with the sensors that have high resolution and high pixel density. The described sensor architectures are based on a new charge super sweep concept which was developed to overcome such common problems as blooming and the image smear. The charge super sweep takes place in very narrow vertical channels located between the photosites similar to the Interline Transfer CCD devices. The difference here is that the charge is never stored in these regions for any significant length of time and is swept out using a new resistive gate traveling wave sweeping technique. The charge super sweep approach also allows the fast charge transfer of several lines of data from the photosites located anywhere in the array into the buffer storage during a single horizontal blanking interval.

    摘要翻译: 描述了一种新的高性能CCD图像传感器技术,可用于构建具有高分辨率和高像素密度的传感器的通用图像传感器系列。 所描述的传感器架构基于新的充电超扫描概念,其被开发用于克服诸如开花和图像涂片的常见问题。 电荷超扫描发生在位于类似于Interline Transfer CCD器件的光电子之间的非常窄的垂直通道中。 这里的区别在于,在任何相当长的时间内,电荷从不存储在这些区域中,并且使用新的电阻栅极行波扫描技术扫除。 电荷超扫描方法还允许在单个水平消隐间隔期间将位于阵列中任何位置的光子的几行数据快速电荷传输到缓冲存储器中。

    Method for improved dynamic range of BCMD image sensors
    55.
    发明授权
    Method for improved dynamic range of BCMD image sensors 失效
    改进BCMD图像传感器动态范围的方法

    公开(公告)号:US5335015A

    公开(公告)日:1994-08-02

    申请号:US969668

    申请日:1992-10-30

    IPC分类号: H04N5/359 H04N5/374 H04N3/14

    CPC分类号: H04N5/3591 H04N5/374

    摘要: The dynamic range of an image array photosite is improved by, first, turning on a column clamp transistor having a source coupled to a photosite transistor source and a drain coupled to a photosite transistor drain, wherein the column clamp transistor is turned on by a column clamp transistor gate voltage; then decreasing a current supplied to a column sense line below a quiescent value, wherein the column sense line is coupled to the photosite transistor source; then turning on the photosite transistor by a photosite transistor gate voltage; then turning off the photosite transistor and the column clamp transistor at substantially the same time; then increasing the current above the quiescent value; and then returning the current to the quiescent value.

    摘要翻译: 通过首先打开具有耦合到光电晶体管源的源极和耦合到光电晶体管漏极的漏极的列夹钳晶体管,改进了图像阵列光电子的动态范围,其中列夹钳晶体管由柱 钳位晶体管栅极电压; 然后将提供给列感测线的电流降低到静态值以下,其中所述列感测线耦合到所述光电晶体管源; 然后通过光电晶体管栅极电压打开光电晶体管; 然后在大致相同的时间关闭光电晶体管和列夹钳晶体管; 然后增加电流高于静态值; 然后将电流返回到静态值。

    Virtual phase buried channel CCD
    56.
    发明授权
    Virtual phase buried channel CCD 失效
    虚相埋通道CCD

    公开(公告)号:US4779124A

    公开(公告)日:1988-10-18

    申请号:US008154

    申请日:1987-01-22

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    摘要: A virtual phase, buried channel CCD with the usual metal gate/oxide structure replaced by a reverse biased junction (possibly a heterojunction) or Schottky barrier is disclosed. Such gate substitution for a standard three phase or multiphase CCD and other devices compatibly fabricated with such gate are also disclosed.

    摘要翻译: 公开了具有由反向偏置结(可能是异质结)或肖特基势垒替代的通常的金属栅极/氧化物结构的虚拟相位掩埋沟道CCD。 还公开了用这种栅极兼容制造的标准三相或多相CCD和其它器件的这种栅极替代。

    Hydrogen iodide etch of tin oxide
    57.
    发明授权
    Hydrogen iodide etch of tin oxide 失效
    氧化锡的碘化氢蚀刻

    公开(公告)号:US4708766A

    公开(公告)日:1987-11-24

    申请号:US928341

    申请日:1986-11-07

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    摘要: Disclosed is a method for etching a tin oxide layer (18). The tin oxide layer (18) is masked by selectively forming an etchant-resistant material (20) on it. This material is itself patterned and etched, and then the exposed tin oxide (26) is isotropically etched such that substantially all of the exposed tin oxide (26) is removed. The preferred etchant of the invention comprises a major portion of inert nitrogen gas with a minor portion of hydrogen iodide. A vertical wall reactor (48) is provided for use with the invention in order to achieve a uniform flow and etch rate. In an alternate embodiment, a plasma reactor can be used to perform the etching.

    摘要翻译: 公开了一种蚀刻氧化锡层(18)的方法。 通过在其上选择性地形成耐蚀材料(20)来掩蔽氧化锡层(18)。 该材料本身被图案化和蚀刻,然后暴露的氧化锡(26)被各向同性地蚀刻,使得基本上所有暴露的氧化锡(26)被除去。 本发明优选的蚀刻剂包括主要部分惰性氮气与少部分碘化氢。 为了实现均匀的流动和蚀刻速率,提供了用于本发明的垂直壁式反应器(48)。 在替代实施例中,可以使用等离子体反应器来执行蚀刻。

    High well capacity CCD imager
    58.
    发明授权
    High well capacity CCD imager 失效
    高容量CCD成像仪

    公开(公告)号:US4673963A

    公开(公告)日:1987-06-16

    申请号:US770323

    申请日:1985-08-27

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    CPC分类号: H01L27/14831

    摘要: A CCD imager of small geometry which has increased well capacity. An additional p-type implant 112 selectively located creates a p-type region 112 below the channel region 13 of the virtual well regions 34, which increases the capacitance in the virtual well regions 34.

    摘要翻译: 小型几何的CCD成像仪,增加了井容量。 选择性地定位的附加p型植入物112在虚拟阱区域34的沟道区域13之下产生p型区域112,这增加了虚拟阱区域34中的电容。

    CCD imager with on-chip processing
    59.
    发明授权
    CCD imager with on-chip processing 失效
    CCD成像器采用片上处理

    公开(公告)号:US4660090A

    公开(公告)日:1987-04-21

    申请号:US770326

    申请日:1985-08-27

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    IPC分类号: H01L27/148 H04N5/30

    CPC分类号: H01L27/14831

    摘要: A CCD imager with a correlated clamp sample and hold amplifier on chip includes a chain of CCD wells, a charge-sensing node coupled to one end of the chain of CCD wells, and a clock to clock charge packets from the chain of CCD wells into the charge-sensing node. A dummy charge-sensing node is integrated into the same monocrystalline semiconductor substrate as the charge-sensing node, and the charge-sensing node and the dummy node are connected to a common reference voltage. An amplifier senses a predetermined voltage change on the charge-sensing node with reference to the voltage on the dummy node after a charge packet has been transferred into the charge-sensing node.

    摘要翻译: 具有芯片上的相关钳位采样和保持放大器的CCD成像器包括一系列CCD阱,耦合到CCD阱的一端的电荷感测节点,以及将来自CCD阱的链的电荷分组的时钟 电荷感测节点。 虚拟电荷感测节点集成到与电荷感测节点相同的单晶半导体衬底中,并且电荷感测节点和虚拟节点连接到公共参考电压。 放大器在电荷分组已经传送到电荷感测节点之后参照虚拟节点上的电压来感测电荷感测节点上的预定电压变化。

    Color CCD imager with minimal clock lines
    60.
    发明授权
    Color CCD imager with minimal clock lines 失效
    彩色CCD成像器,具有最小的时钟线

    公开(公告)号:US4656503A

    公开(公告)日:1987-04-07

    申请号:US770322

    申请日:1985-08-27

    申请人: Jaroslav Hynecek

    发明人: Jaroslav Hynecek

    IPC分类号: H01L27/148 H04N9/07

    CPC分类号: H01L27/14868

    摘要: A color CCD imager with three correlated clamp-sample-and-hold sense amplifiers (one for each color channel). The three control lines necessary to operate this type of amplifier, together with the clock lines necessary for the three shift registers which feed them, are all wired together, so that correct phasing of the three outputs is maintained with only three clock lines.

    摘要翻译: 具有三个相关钳位采样和保持读出放大器(每个颜色通道一个)的彩色CCD成像器。 操作这种类型的放大器所需的三条控制线以及馈送它们的三个移位寄存器所需的时钟线都被连线在一起,从而三个输出的正确的相位只用三个时钟线保持。