Abstract:
An organic light emitting device has a structure in which the penetration of harmful materials into an inner functional layer is blocked to prevent the degradation of the performance of the organic light emitting device and an organic electronic device includes such an organic light emitting device. The organic light emitting device includes an insulating substrate; a light emitting unit arranged on the insulating substrate and including a first electrode layer to inject holes, a second electrode layer to inject electrons, and an active layer interposed between the first and second electrode layers to emit light by recombining the holes and electrons; and a passivation layer including alternately arranged barrier layers and buffer layers to seal the light emitting unit from an external atmosphere, each barrier layer including at least one material selected from a group consisting of an activated metal oxide, an activated metal nitride, or an activated metal oxynitride, and each buffer layer being of a polymer organic material.
Abstract:
An organic electroluminescent device includes: a substrate; a plurality of first electrodes arranged on the substrate; a plurality of banks arranged on the substrate and the first electrodes to define pixels on the first electrodes, the plurality of banks being of an inorganic material; a plurality of separators arranged in stripe shapes on the plurality of banks between the pixels, the plurality of separators being of an organic material; organic Emitting Material Layers (organic EMLs), each having a predetermined color, the organic EMLs being arranged within each of the pixels; and a plurality of second electrodes arranged on the organic EMLs, the plurality of banks, and the plurality of separators.
Abstract:
A donor substrate and a method of forming an organic semiconductor layer pattern using the donor substrate, whereby a donor substrate is formed using an organic semiconductor precursor having a thermally decomposable substituent through a wet process, the organic semiconductor precursor substrate in the donor substrate is transferred to a receptor substrate as a pattern and heated, and thus is changed into an organic semiconductor. As a result, an organic semiconductor layer pattern is obtained. The method can be used in the manufacture of various devices such as organic light emitting diode and organic thin film transistor. A low-molecular weight organic semiconductor layer pattern can be formed through a wet process, not through deposition. Thus, using the method, a flat display device can be conveniently manufactured at low cost.
Abstract:
A tray mechanism and a disk drive employing the tray mechanism. The tray mechanism includes a driving member rotatably coupled to a spindle motor; a pinion meshed with a rack provided at a surface of a tray to load the tray onto and unload the tray from a main frame; a pivotable plate pivotally provided at a shaft of the driving member, and having a connector which couples the driving member and the rack; and a limiting member provided on the main frame for limiting a pivotal range of the pivotable plate.
Abstract:
Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region. Each of the intermediate stack structures exposes the third stair step structure of the intermediate stack structure disposed thereunder.
Abstract:
Three-dimensional (3D) semiconductor memory devices and methods of manufacturing the same are provided. Three-dimensional (3D) semiconductor memory devices may include a substrate including a cell array region and a connection region, a lower stack structure including a plurality of lower electrodes vertically stacked on the substrate, the lower stack structure having a first stair step structure extending in a first direction on the connection region and a second stair step structure extending in a second direction substantially perpendicular to the first direction on the connection region, and a plurality of intermediate stack structures vertically stacked on the lower stack structure. Each of the intermediate stack structures includes a plurality of intermediate electrodes vertically stacked and has a third stair step structure extending in the second direction on the connection region. Each of the intermediate stack structures exposes the third stair step structure of the intermediate stack structure disposed thereunder.
Abstract:
Vertical memory devices and methods of forming the same are provided. The devices may include a gate line structure including gate lines that are stacked in a first direction and extend in a second direction. The device may also include a first step pattern structure including extended gate lines extending from the gate lines and including first step layers and a second step pattern structure contacting the first step pattern structure, including the extended gate lines and including second step layers. An n-th extended gate line (n is an even number) may be disposed at an upper portion of each of the first step layers, and an (n−1)-th extended gate line may be disposed at an upper portion of each of the second step layers. Each of exposed portions of the (n−1)-th extended gate lines serves as a pad region, and the pad regions have different areas.
Abstract:
Disclosed herein is a method for preparing a multilayer of nanocrystals. The method comprises the steps of (i) coating nanocrystals surface-coordinated by a photosensitive compound, or a mixed solution of a photosensitive compound and nanocrystals surface-coordinated by a material miscible with the photosensitive compound, on a substrate, drying the coated substrate, and exposing the dried substrate to UV light to form a first monolayer of nanocrystals, and (ii) repeating the procedure of step (i) to form one or more monolayers of nanocrystals on the first monolayer of nanocrystals.
Abstract:
In a semiconductor device, a first gate structure is provided in a cell transistor region and includes a floating gate electrode, a first dielectric layer pattern, and a control gate electrode including a first metal silicide pattern. A second gate structure is provided in a selecting transistor region and includes a first conductive layer pattern, a second dielectric layer pattern, and a first gate electrode including a second metal silicide pattern. A third gate structure is provided in a peripheral circuit region and includes a second conductive layer pattern, a third dielectric layer pattern including opening portions on the second conductive layer pattern, and a second gate electrode including a concavo-convex portion at an upper surface portion thereof and a third metal silicide pattern. The third metal silicide pattern has a uniform thickness.
Abstract:
An organic-inorganic hybrid electroluminescent device having a semiconductor nanocrystal pattern prepared by producing a semiconductor nanocrystal film using semiconductor nanocrystals, where the nanocrystal is surface-coordinated with a compound containing a photosensitive functional group, exposing the film through a mask and developing the exposed film.