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公开(公告)号：US10430099B2
公开(公告)日：2019-10-01
申请号：US15472637
申请日：2017-03-29
Applicant: ARM Limited
Inventor： Quinn Carter , Lars Oskar Flordal , Jakob Axel Fries , Andreas Due Engh-Halstvedt
Abstract: A data array to be stored is first divided into a plurality of blocks. Each block is further sub-divided into a set of sub-blocks.Data representing sub-blocks of the data array is stored, together with a header data block for each block that the data array has been divided into.For each block, it is determined whether all the data positions for the block have the same data value associated with them, and, if so, an indication that all of the data positions within the block have the same data value associated with them, and an indication of the same data value that is associated with each of the data positions in the block, is stored in the header data block for that block of the data array.
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公开(公告)号：US20170285955A1
公开(公告)日：2017-10-05
申请号：US15472637
申请日：2017-03-29
Applicant: ARM Limited
Inventor： Quinn Carter , Lars Oskar Flordal , Jakob Axel Fries , Andreas Due Engh-Halstvedt
IPC: G06F3/06
CPC classification number: G06F3/064 , G06F3/0604 , G06F3/0673 , G06T1/20 , G06T1/60 , G06T11/40 , G06T2210/08 , G09G5/393 , G09G2360/12 , G09G2360/122
Abstract: A data array to be stored is first divided into a plurality of blocks. Each block is further sub-divided into a set of sub-blocks.Data representing sub-blocks of the data array is stored, together with a header data block for each block that the data array has been divided into.For each block, it is determined whether all the data positions for the block have the same data value associated with them, and, if so, an indication that all of the data positions within the block have the same data value associated with them, and an indication of the same data value that is associated with each of the data positions in the block, is stored in the header data block for that block of the data array.
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公开(公告)号：US20170061678A1
公开(公告)日：2017-03-02
申请号：US15246970
申请日：2016-08-25
Applicant: ARM Limited
Inventor： Andreas Due Engh-Halstvedt , Frank Langtind
CPC classification number: G06T15/40 , G06T15/005
Abstract: A tile-based graphics processing pipeline includes a back-facing determination and culling unit that is operable to cull back-facing triangles before the tiling stage. The back-facing determination and culling unit include a triangle size estimator that estimates the size of a triangle being considered. If the size of the triangle is less than a selected size, then the area of the triangle is calculated using fixed point arithmetic and the result of that area calculation is used by a back-face culling unit to determine whether to cull the triangle or not. On the other hand, if the size estimator determines that the primitive is greater than the selected size, then the triangle bypasses the fixed point area calculation and back-face culling unit and is instead passed directly to the tiler.
Abstract translation: 基于瓦片的图形处理流水线包括背面确定和剔除单元，其可操作以在平铺阶段之前拣出背面三角形。 背面确定和剔除单元包括估计所考虑的三角形的尺寸的三角形尺寸估计器。 如果三角形的尺寸小于所选择的尺寸，则使用定点运算来计算三角形的面积，并且该面积计算的结果由背面拣选单元使用以确定是否剔除三角形 。 另一方面，如果尺寸估计器确定原始尺寸大于所选择的尺寸，则三角形绕过固定点区域计算和背面拣选单元，而是直接传递给平铺机。
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公开(公告)号：US09430381B2
公开(公告)日：2016-08-30
申请号：US14257090
申请日：2014-04-21
Applicant: ARM Limited
Inventor： Andreas Due Engh-Halstvedt , Jorn Nystad
CPC classification number: G06F12/0802 , G06T1/20 , G09G5/39
Abstract: A graphics processing unit 2 includes a texture pipeline 6 which performs filter operations upon texture values. If the texture values are integer texture values, then they may be processed by the texture pipeline in a variable order corresponding to the order in which they are retrieved from a memory 4. If the texture values are floating point texture values, then they are processed in a fixed order in order to ensure result invariants as the filter operation is non-associative for floating point values. The filter operation is not commenced until all of the floating point texture values have been retrieved from the memory 4 and other available for processing.
Abstract translation: 图形处理单元2包括对纹理值执行滤波操作的纹理管线6。 如果纹理值是整数纹理值，则它们可以由纹理流水线以与从存储器4检索的顺序相对应的可变顺序来处理。如果纹理值是浮点纹理值，则它们被处理 以固定顺序，以确保结果不变量，因为过滤器操作对于浮点值是非关联的。 过滤器操作不会开始，直到从存储器4检索到所有浮点纹理值，并且可以处理的其他值。
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公开(公告)号：US12086454B2
公开(公告)日：2024-09-10
申请号：US17455601
申请日：2021-11-18
Applicant: Arm Limited
Inventor： Olof Henrik Uhrenholt , Andreas Due Engh-Halstvedt
IPC: G06F3/06
CPC classification number: G06F3/0655 , G06F3/0604 , G06F3/0679
Abstract: A data processing system includes an external memory system, a processor and an internal memory system. The internal memory system includes an internal memory that stores data for use by the processor when performing data processing operations. The internal memory system also includes a data encoder associated with the internal memory. The data encoder reads data from the external memory system to the data encoder and returns the data to the external memory system from the data encoder, without storing the data in the internal memory.
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Patent Agency Ranking
公开(公告)号：US20240169643A1
公开(公告)日：2024-05-23
申请号：US18509285
申请日：2023-11-14
Applicant: Arm Limited
Inventor： Rafal Stepuch , Frank Klaeboe Langtind , Andreas Due Engh-Halstvedt
CPC classification number: G06T15/005 , G06F9/50
Abstract: When processing primitives in a tile-based graphics processing system in which a render output is sub-divided into a plurality of tiles for rendering, before a primitive is written to a primitive list corresponding to a region of the render output, it is first written to one or more primitive queues allocated to respective regions of the render output. To write the primitives to primitive lists, primitives are written together from a primitive queue allocated to a region of the render output to the primitive list for that region of the render output, in a single primitive list write cycle.
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公开(公告)号：US20240168804A1
公开(公告)日：2024-05-23
申请号：US18491104
申请日：2023-10-20
Applicant: Arm Limited
Inventor： Maochang Dang , Andreas Due Engh-Halstvedt , Andreas Danner Nilsen , Brian Gordon Pearson , Espen Amodt
CPC classification number: G06F9/5005 , G06F9/54 , G06T1/60
Abstract: The present disclosure relates to a processing resource for a graphics processing system for performing graphics processing for an application executing on a host processor of the graphics processing system according to a command stream, the command stream being generated by the host processor in response to an API call from the application, the processing resource comprising: a control circuit configured to execute commands from the command stream, wherein the command stream comprises one or more commands relating to a processing task and one or more commands relating to at least one state group associated with the processing task; at least one processing circuit configured to perform processing tasks; a shadow state storage module configured for use by the control circuit to store state information; and a processing state storage module configured for use by the processing circuit to store state information, wherein the control circuit is configured to determine one or more changed states within the at least one state group with respect to a preceding API call, to write state information comprising the one or more changed states to the shadow state storage module, and to assign the processing task to the at least one processing circuit and execute an instruction to transmit the state information from the shadow state storage module to the processing state storage module.
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公开(公告)号：US20220382587A1
公开(公告)日：2022-12-01
申请号：US17705856
申请日：2022-03-28
Applicant: Arm Limited
Inventor： Andreas Danner Nilsen , Mark Underwood , Arne Aas , Andreas Due Engh-Halstvedt , Shan Wu
Abstract: A data processing system is disclosed that includes one or more processors that can perform producer processes to produce work and consumer processes that can consume work produced by a producer process. The system includes a pool of plural communication resources that may be used for communications between a producer process and a consumer process. The system tracks the usage of communication resources of the pool of communication resources, and allocates a communication resource from the pool of communication resources based on the tracking.
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公开(公告)号：US11210821B2
公开(公告)日：2021-12-28
申请号：US16698030
申请日：2019-11-27
Applicant: Arm Limited
Inventor： Alexander Eugene Chalfin , Andreas Due Engh-Halstvedt , Olof Henrik Uhrenholt , Andreas Loeve Selvik
Abstract: When processing graphics primitives in a graphics processing system, the render output is divided into a plurality of regions for rendering, each region comprising a respective area of the render output. It is determined for which of the plurality of regions of the render output a primitive should be rendered for. For each region of the render output it is determined a primitive should be rendered for, geometry data for the primitive is stored in memory in a respective data structure for the region in a compressed form, such that the geometry data for the primitive to be rendered is stored in a compressed form, in a respective, different data structure for each different region of the render output it is determined the primitive should be rendered for.
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公开(公告)号：US11189073B2
公开(公告)日：2021-11-30
申请号：US16825346
申请日：2020-03-20
Applicant: Arm Limited
Inventor： Andreas Due Engh-Halstvedt , Frank Klaeboe Langtind , Mark Underwood
Abstract: A method of operating a graphics processor that executes a graphics processing pipeline comprising a vertex shading stage is disclosed. A set of blocks of memory space that may be represented by a linked list is provided and memory space for storing vertex shaded attribute data generated by the vertex shading stage is allocated from one of the blocks of memory space in the set of blocks of memory space. When data stored in a block of memory space is no longer needed by the graphics processing pipeline, the block can be “recycled” for use by the pipeline.
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