公开(公告)号：US08586425B2

公开(公告)日：2013-11-19

申请号：US12964747

申请日：2010-12-10

申请人： An-Thung Cho ,  Wan-Yi Liu ,  Chia-Kai Chen ,  Wu-Hsiung Lin ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： An-Thung Cho ,  Wan-Yi Liu ,  Chia-Kai Chen ,  Wu-Hsiung Lin ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L29/78651 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02686 ,  H01L29/66068 ,  H01L29/66969 ,  H01L29/78684 ,  H01L29/7869

摘要： A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.

摘要翻译： 设置在基板上的薄膜晶体管。 薄膜晶体管包括栅极，栅极绝缘层，富硅沟道层，源极和漏极。 栅极设置在基板上。 栅极绝缘体设置在栅极上。 富硅沟道层设置在栅极上方，其中富硅沟道层的材料选自富硅氧化硅（富Si），富含硅的氮化硅（富Si） SiN x），富硅氧氮化硅（富Si的SiO x N y），富含硅的碳化硅（富Si的SiC）和富硅的碳氧化碳（富Si的SiOC）。 在10nm至170nm的膜深度内的富硅沟道层的硅含量（浓度）范围为约1E23原子/ cm3至约4E23原子/ cm3。 源极和漏极与富硅沟道层连接。

公开(公告)号：US08471973B2

公开(公告)日：2013-06-25

申请号：US12788876

申请日：2010-05-27

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang ,  Chih-Hung Lin ,  Yu-Cheng Chen ,  Yi-Hui Li ,  Tsan-Chun Wang

IPC分类号： G02F1/36

CPC分类号： G02F1/136209 ,  G02F1/136213 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/1248 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode formed over the switch, a plane organic layer formed over the date line and the pixel area and having no overlapping with the shielding electrode, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode and the plane organic layer in the pixel area, wherein the first portion is overlapped with the shielding electrode so as to define a storage capacitor therebetween, and the second portion overlays the plane organic layer and has no overlapping with the data line.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在限定像素区域的衬底上的数据线，形成在衬底上的像素区域内的开关，形成在开关上的屏蔽电极，有机平面 形成在日期线和像素区域上并且与屏蔽电极不重叠的像素电极，以及具有从第一部分延伸的第一部分和第二部分的像素电极，并且形成在屏蔽电极和平面有机层的上方 像素区域，其中第一部分与屏蔽电极重叠以便在其间限定存储电容器，并且第二部分覆盖平面有机层并且不与数据线重叠。

公开(公告)号：US08344381B2

公开(公告)日：2013-01-01

申请号：US12709506

申请日：2010-02-21

申请人： An-Thung Cho ,  Chi-Hua Sheng ,  Ruei-Liang Luo ,  Wan-Yi Liu ,  Wei-Min Sun ,  Chi-Mao Hung ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： An-Thung Cho ,  Chi-Hua Sheng ,  Ruei-Liang Luo ,  Wan-Yi Liu ,  Wei-Min Sun ,  Chi-Mao Hung ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L21/00

CPC分类号： H01L31/101 ,  G02F1/13318 ,  G02F1/13454 ,  G02F2001/133388 ,  H01L27/3227

摘要： A UV sensor comprises a silicon-rich dielectric layer with a refractive index in a range of about 1.7 to about 2.5 for serving as the light sensing material of the UV sensor. The fabrication method of the UV sensor can be integrated with the fabrication process of semiconductor devices or flat display panels.

摘要翻译： UV传感器包括富含硅的电介质层，其折射率在约1.7至约2.5的范围内，用作UV传感器的感光材料。 UV传感器的制造方法可以与半导体器件或平面显示面板的制造工艺集成。

公开(公告)号：US08233213B2

公开(公告)日：2012-07-31

申请号：US13110003

申请日：2011-05-18

申请人： Chuan-Sheng Wei ,  Sheng-Wen Huang ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Chuan-Sheng Wei ,  Sheng-Wen Huang ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： G02B26/00 ,  G09G3/34

CPC分类号： G02F1/167 ,  G02F1/1362 ,  G02F2001/1672

摘要： An electrophoresis display panel including an active device array substrate and an electrophoresis display film is provided. The active device array substrate includes a plurality of active devices and a shielding pattern. The electrophoresis display film is disposed on the active device array substrate. The electrophoresis display film includes a conductive layer, a dielectric layer and a plurality of electrophoresis display mediums. The dielectric layer is disposed on the conductive layer and has a plurality of micro-cups arranged in area array. The dielectric layer is between the conductive layer and the active device array substrate. Light passing through the dielectric layer is prevented from irradiating onto the active devices by the shielding pattern. In addition, the electrophoresis display mediums are filled within the micro-cups, respectively.

摘要翻译： 提供了包括有源器件阵列基板和电泳显示膜的电泳显示面板。 有源器件阵列衬底包括多个有源器件和屏蔽图案。 电泳显示膜配置在有源器件阵列基板上。 电泳显示膜包括导电层，电介质层和多个电泳显示介质。 电介质层设置在导电层上，并具有以阵列排列的多个微型杯。 电介质层位于导电层和有源器件阵列衬底之间。 防止穿过电介质层的光通过屏蔽图案照射到有源器件上。 此外，电泳显示介质分别填充在微型杯内。

公开(公告)号：US08154061B2

公开(公告)日：2012-04-10

申请号：US12500609

申请日：2009-07-10

申请人： Chuan-Sheng Wei ,  Guang-Ren Shen ,  Chang-Yu Huang ,  Pei-Ming Chen ,  Sheng-Chao Liu ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Chuan-Sheng Wei ,  Guang-Ren Shen ,  Chang-Yu Huang ,  Pei-Ming Chen ,  Sheng-Chao Liu ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L31/062

CPC分类号： H01L29/42384 ,  H01L29/41733 ,  H01L29/66765

摘要： A bottom gate thin film transistor and an active array substrate are provided. The bottom gate thin film transistor includes a gate, a gate insulation layer, a semiconductor layer, a plurality of sources and a plurality of drains. The gate insulation layer is disposed on the gate. The semiconductor layer is disposed on the gate insulation layer and located above the gate. An area ratio of the semiconductor layer and the gate is about 0.001 to 0.9. The sources are electrically connected with each other, and the drains are electrically connected with each other.

摘要翻译： 提供底栅薄膜晶体管和有源阵列基板。 底栅薄膜晶体管包括栅极，栅极绝缘层，半导体层，多个源极和多个漏极。 栅极绝缘层设置在栅极上。 半导体层设置在栅极绝缘层上并位于栅极上方。 半导体层和栅极的面积比约为0.001〜0.9。 源极彼此电连接，并且漏极彼此电连接。

公开(公告)号：US20110216394A1

公开(公告)日：2011-09-08

申请号：US13110003

申请日：2011-05-18

申请人： Chuan-Sheng Wei ,  Sheng-Wen Huang ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： Chuan-Sheng Wei ,  Sheng-Wen Huang ,  Pei-Ming Chen ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： G02F1/167

CPC分类号： G02F1/167 ,  G02F1/1362 ,  G02F2001/1672

摘要： An electrophoresis display panel including an active device array substrate and an electrophoresis display film is provided. The active device array substrate includes a plurality of active devices and a shielding pattern. The electrophoresis display film is disposed on the active device array substrate. The electrophoresis display film includes a conductive layer, a dielectric layer and a plurality of electrophoresis display mediums. The dielectric layer is disposed on the conductive layer and has a plurality of micro-cups arranged in area array. The dielectric layer is between the conductive layer and the active device array substrate. Light passing through the dielectric layer is prevented from irradiating onto the active devices by the shielding pattern. In addition, the electrophoresis display mediums are filled within the micro-cups, respectively.

摘要翻译： 提供了包括有源器件阵列基板和电泳显示膜的电泳显示面板。 有源器件阵列衬底包括多个有源器件和屏蔽图案。 电泳显示膜配置在有源器件阵列基板上。 电泳显示膜包括导电层，电介质层和多个电泳显示介质。 电介质层设置在导电层上，并具有以阵列排列的多个微型杯。 电介质层位于导电层和有源器件阵列衬底之间。 防止穿过电介质层的光通过屏蔽图案照射到有源器件上。 此外，电泳显示介质分别填充在微型杯内。

公开(公告)号：US20110156043A1

公开(公告)日：2011-06-30

申请号：US12964747

申请日：2010-12-10

申请人： An-Thung Cho ,  Wan-Yi Liu ,  Chia-Kai Chen ,  Wu-Hsiung Lin ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： An-Thung Cho ,  Wan-Yi Liu ,  Chia-Kai Chen ,  Wu-Hsiung Lin ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： H01L29/786 ,  H01L21/268 ,  H01L21/205

CPC分类号： H01L29/78651 ,  H01L21/02532 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02686 ,  H01L29/66068 ,  H01L29/66969 ,  H01L29/78684 ,  H01L29/7869

摘要： A thin film transistor disposed on a substrate is provided. The thin film transistor includes a gate, a gate insulating layer, a silicon-rich channel layer, a source, and a drain. The gate is disposed on the substrate. The gate insulator is disposed over the gate. The silicon-rich channel layer is disposed above the gate, wherein the material of the silicon-rich channel layer is selected from a group consisting of silicon-rich silicon oxide (Si-rich SiOx), silicon-rich silicon nitride (Si-rich SiNx), silicon-rich silicon oxynitride (Si-rich SiOxNy), silicon-rich silicon carbide (Si-rich SiC) and silicon-rich silicon oxycarbide (Si-rich SiOC). The content (concentration) of silicon of the silicon-rich channel layer within a film depth between 10 nm to 170 nm ranges from about 1E23 atoms/cm3 to about 4E23 atoms/cm3. The source and the drain are connected with the silicon-rich channel layer.

摘要翻译： 设置在基板上的薄膜晶体管。 薄膜晶体管包括栅极，栅极绝缘层，富硅沟道层，源极和漏极。 栅极设置在基板上。 栅极绝缘体设置在栅极上。 富硅沟道层设置在栅极上方，其中富硅沟道层的材料选自富硅氧化硅（富Si），富含硅的氮化硅（富Si） SiN x），富硅氧氮化硅（富Si的SiO x N y），富含硅的碳化硅（富Si的SiC）和富硅的碳氧化碳（富Si的SiOC）。 在10nm至170nm的膜深度内的富硅沟道层的硅含量（浓度）范围为约1E23原子/ cm3至约4E23原子/ cm3。 源极和漏极与富硅沟道层连接。

公开(公告)号：US20110095971A1

公开(公告)日：2011-04-28

申请号：US12638959

申请日：2009-12-15

申请人： Hsiang-Lin Lin ,  Chia-Hsun Tu ,  Chih-Jen Hu ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Chia-Hsun Tu ,  Chih-Jen Hu ,  Wei-Ming Huang

IPC分类号： G02F1/167 ,  G09G3/34

CPC分类号： G09G3/3446 ,  G02F1/167 ,  G02F2001/1676

摘要： An electrophoresis display pixel including an electrophoresis display film, a substrate, a first active device, a second active device, a first electrode, and a second electrode is provided. The substrate is disposed on the electrophoresis display film, and the substrate has a transparent region and a non-transparent region. The first active device and the second active device are disposed on the substrate and located in the non-transparent region. The first electrode is disposed on the substrate, located in the transparent region, and electrically connected to the first active device. The second electrode is disposed on the substrate, located in the non-transparent region, and electrically connected to the second active device. A light passes through the transparent region and enters the electrophoresis display film to be displayed. A display apparatus including the abovementioned electrophoresis display pixel is also provided.

摘要翻译： 提供了包括电泳显示膜，基板，第一有源器件，第二有源器件，第一电极和第二电极的电泳显示像素。 基板设置在电泳显示膜上，基板具有透明区域和不透明区域。 第一有源器件和第二有源器件设置在衬底上并且位于不透明区域中。 第一电极设置在基板上，位于透明区域中，并电连接到第一有源器件。 第二电极设置在基板上，位于非透明区域中，并电连接到第二有源器件。 光通过透明区域并进入电泳显示膜以显示。 还提供了包括上述电泳显示像素的显示装置。

公开(公告)号：US20100321341A1

公开(公告)日：2010-12-23

申请号：US12718998

申请日：2010-03-07

申请人： An-Thung Cho ,  Chia-Tien Peng ,  Hung-Wei Tseng ,  Cheng-Chiu Pai ,  Yu-Hsuan Li ,  Chun-Hsiun Chen ,  Wei-Ming Huang

发明人： An-Thung Cho ,  Chia-Tien Peng ,  Hung-Wei Tseng ,  Cheng-Chiu Pai ,  Yu-Hsuan Li ,  Chun-Hsiun Chen ,  Wei-Ming Huang

IPC分类号： G06F3/042 ,  H01L31/0232 ,  H01L31/18

CPC分类号： G06F3/0421 ,  G06F3/0412 ,  G06F3/042 ,  G06F2203/04103 ,  G06F2203/04109 ,  H01L27/14621 ,  H01L27/14632 ,  H01L27/14678 ,  H01L27/14687 ,  H01L27/14692 ,  H01L31/028 ,  H01L31/182 ,  H01L31/1824 ,  H01L31/202

摘要： The present invention provides a photo sensor, a method of forming the photo sensor, and a related optical touch device. The photo sensor includes a first electrode, a second electrode, a first silicon-rich dielectric layer and a second silicon-rich dielectric layer. The first silicon-rich dielectric layer is disposed between the first electrode and the second electrode for sensing infrared rays, and the second silicon-rich dielectric layer is disposed between the first silicon-rich dielectric layer and the second electrode for sensing visible light beams. The multi-layer structure including the first silicon-rich dielectric layer and the second silicon-rich dielectric layer enables the single photo sensor to effectively detect both infrared rays and visible light beams. Moreover, the single photo sensor is easily integrated into an optical touch device to form optical touch panel integrated on glass.

摘要翻译： 本发明提供一种光传感器，形成光传感器的方法和相关的光学触摸装置。 光传感器包括第一电极，第二电极，第一富硅介电层和第二富硅介电层。 第一富硅介电层设置在用于感测红外线的第一电极和第二电极之间，并且第二富硅电介质层设置在第一富硅电介质层和第二电极之间，用于感测可见光束。 包括第一富硅介电层和第二富硅介电层的多层结构使得单个光传感器能够有效地检测红外线和可见光束。 此外，单个光传感器容易地集成到光学触摸装置中，以形成集成在玻璃上的光学触摸面板。

公开(公告)号：US20100315569A1

公开(公告)日：2010-12-16

申请号：US12483390

申请日：2009-06-12

申请人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

发明人： Hsiang-Lin Lin ,  Ching-Huan Lin ,  Chih-Hung Shih ,  Wei-Ming Huang

IPC分类号： G02F1/1368 ,  H01L21/28

CPC分类号： G02F1/136213 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/13606 ,  G02F2201/40 ,  H01L27/124 ,  H01L27/1255

摘要： This invention in one aspect relates to a pixel structure. In one embodiment, the pixel structure includes a scan line formed on a substrate and a data line formed over the substrate defining a pixel area, a switch formed inside the pixel area on the substrate, a shielding electrode having a first portion and a second portion extending from the first portion, and formed over the scan line, the data line and the switch, where the first portion is overlapped with the switch and the second portion is overlapped with the data line, and a pixel electrode having a first portion and a second portion extending from the first portion, and formed over the shielding electrode in the pixel area, where the first portion is overlapped with the first portion of the shielding electrode so as to define a storage capacitor therebetween and the second portion has no overlapping with the second portion of the shielding electrode.

摘要翻译： 本发明在一个方面涉及像素结构。 在一个实施例中，像素结构包括形成在衬底上的扫描线和形成在衬底上的限定像素区域的数据线，形成在衬底上的像素区域内的开关，具有第一部分和第二部分的屏蔽电极 从第一部分延伸并且在扫描线上形成数据线和开关，其中第一部分与开关重叠，并且第二部分与数据线重叠，并且具有第一部分和第二部分的像素电极 第二部分从第一部分延伸并且形成在像素区域中的屏蔽电极之上，其中第一部分与屏蔽电极的第一部分重叠，以便在其间限定存储电容器，并且第二部分与第二部分不重叠 屏蔽电极的第二部分。