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    Semiconductor device
    52.
    发明申请
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US20090086537A1

    公开(公告)日：2009-04-02

    申请号：US12232046

    申请日：2008-09-10

    申请人： Makoto Kitagawa

    发明人： Makoto Kitagawa

    IPC分类号： G11C11/39

    CPC分类号： G11C11/39

    摘要： A semiconductor device, includes a memory cell including a thyristor element with a gate having a pnpn structure formed on a semiconductor substrate and having first and second terminals, and an access transistor formed on the semiconductor substrate and having first and second terminals connected to a bit line and the first terminal of the thyristor element, respectively, and a control section including a load current element whose load current flows, upon reading out operation, to the second terminal side of the thyristor element and configured to carry out access control to the memory cell.

    摘要翻译： 一种半导体器件，包括：具有晶闸管元件的存储单元，所述晶闸管元件具有形成在半导体衬底上的具有pnpn结构的栅极并具有第一和第二端子;以及存取晶体管，形成在所述半导体衬底上，并且具有连接到位的第一和第二端子 线路和晶闸管元件的第一端子，以及控制部分，其包括负载电流元件，其负载电流在读出操作时流向晶闸管元件的第二端子侧并被配置为对存储器执行访问控制 细胞。

    Semiconductor memory device and its operation method
    53.
    发明申请
    Semiconductor memory device and its operation method 失效
    半导体存储器件及其操作方法

    公开(公告)号：US20070217260A1

    公开(公告)日：2007-09-20

    申请号：US11715413

    申请日：2007-03-08

    申请人： Makoto Kitagawa

    发明人： Makoto Kitagawa

    IPC分类号： G11C16/04

    CPC分类号： G11C11/405 ,  G11C7/12 ,  G11C7/18 ,  G11C8/16 ,  G11C11/4094 ,  G11C11/4097 ,  G11C2207/005 ,  G11C2207/2281 ,  G11C2207/229

    摘要： A semiconductor memory device includes a memory-cell array, a read bit line, a write bit line, a sense amplifier, a first sense line, a second sense line, a first bit line switch, and a second bit line switch. The memory-cell array is laid out to form an array. The read bit line is shared by plural memory cells and connected to a data output node. The write bit line is shared by plural memory cells and connected to a data input node. The sense amplifier is configured to sense a difference in electric potential. The first sense line is connected to one of the input terminals. The second sense line is connected to the other input terminal. The first bit line switch is configured to control electrical connection and disconnection. The second bit line switch is configured to control electrical connection and disconnection.

    摘要翻译： 半导体存储器件包括存储单元阵列，读位线，写位线，读出放大器，第一感测线，第二感测线，第一位线开关和第二位线开关。 存储单元阵列被布置成形成阵列。 读位线由多个存储器单元共享并连接到数据输出节点。 写位线由多个存储器单元共享并连接到数据输入节点。 感测放大器被配置为感测电位差。 第一感测线连接到输入端之一。 第二感测线连接到另一输入端。 第一位线开关配置为控制电气连接和断开。 第二位线开关被配置为控制电气连接和断开。

    Cooperative system and method therefor
    54.
    发明申请
    Cooperative system and method therefor 审中-公开
    合作制度及方法

    公开(公告)号：US20050038911A1

    公开(公告)日：2005-02-17

    申请号：US10945934

    申请日：2004-09-22

    申请人： Yoshikuni Watanabe ,  Nobuhiko Sato ,  Makoto Kitagawa ,  Tetsuya Hashimoto

    发明人： Yoshikuni Watanabe ,  Nobuhiko Sato ,  Makoto Kitagawa ,  Tetsuya Hashimoto

    IPC分类号： G06F15/16 ,  G06Q10/00 ,  H04L29/08

    CPC分类号： H04L67/2814 ,  G06Q10/10 ,  H04L67/2823 ,  H04L67/327

    摘要： A cooperative system includes a plurality of information systems and a hub system connected to the plurality of systems. The hub system receives a message from a first information system, determines necessity of message conversion and a kind of conversion, converts the message to a form suitable for a second information system which is destination, only when message conversion is necessary, and transmits the message to a second information system. The hub system may determine whether flow control determining a flow and destination of a message received from the first information system based on a class of the message should be conducted, and conduct flow control only when it has been determined that flow control should be conducted.

    摘要翻译： 协作系统包括多个信息系统和连接到多个系统的集线器系统。 集线器系统从第一信息系统接收消息，确定消息转换的必要性和一种转换，只有当需要消息转换时，将消息转换成适合作为目的地的第二信息系统的形式，并且传送消息 到第二个信息系统。 集线器系统可以确定是否应该进行基于消息类别来确定从第一信息系统接收的消息的流量和目的地的流量控制，并且仅在已经确定应当进行流量控制时才进行流量控制。

    Transaction processing method and apparatus
    55.
    发明授权
    Transaction processing method and apparatus 失效
    事务处理方法和装置

    公开(公告)号：US06578159B1

    公开(公告)日：2003-06-10

    申请号：US09443102

    申请日：1999-11-18

    申请人： Makoto Kitagawa ,  Tetsuya Hashimoto ,  Akira Kito

    发明人： Makoto Kitagawa ,  Tetsuya Hashimoto ,  Akira Kito

    IPC分类号： G06F1100

    CPC分类号： G06F11/1474 ,  Y10S707/99953

    摘要： In a transaction processing method for executing a series of a plurality of transactions in accordance with a workflow, compensation processing is registered as an error recovery flow when each transaction is executed, the compensation processing executing error recovery processing when an error occurs while the transaction is executed, and a series of compensation processing is executed in parallel in accordance with the registered error recovery flow when an error occurs while any of the transaction is executed.

    摘要翻译： 在用于根据工作流执行一系列事务的事务处理方法中，当执行每个事务时，将补偿处理记录为错误恢复流程，当事务发生时发生错误时，补偿处理执行错误恢复处理 并且当执行任何交易时发生错误时，根据注册错误恢复流程并行执行一系列补偿处理。

    Printing system
    56.
    发明授权
    Printing system 失效
    印刷系统

    公开(公告)号：US5802260A

    公开(公告)日：1998-09-01

    申请号：US562181

    申请日：1995-11-22

    申请人： Takuya Shimakawa ,  Seiji Kageyama ,  Satoru Matsumoto ,  Makoto Kitagawa ,  Takahiro Shiotani ,  Naomi Tamura

    发明人： Takuya Shimakawa ,  Seiji Kageyama ,  Satoru Matsumoto ,  Makoto Kitagawa ,  Takahiro Shiotani ,  Naomi Tamura

    IPC分类号： B41J29/38 ,  G06F3/12 ,  G06K15/00

    CPC分类号： G06F3/1293

    摘要： A printing system having a plurality of printers and computers connected to each other through a communication network is disclosed. A first computer is connected with a second computer through the network. A first computer generates a printing job and a print request signal for executing the printing job according to a print request designated by the user to a first printer. A first computer also generates a continued print request signal containing information unique to the user according to a continued print request from the user requesting the execution of the printing job to a second printer. The printing job and each signal are transmitted to the communication network from the communication unit of the first computer. A second computer receives the printing job and each signal through the communication network. The second computer further causes the first printer to execute the printing job designated by the user in accordance with the print request signal. Upon receipt of a signal containing a continued print request and information unique to the user, the second computer decides that the information unique to a user belongs to the user designating the printing job. In the case where it is decided that the signal containing a continued print request and information unique to a user belongs to the user, the second computer causes the second printer to execute the printing job according to a continued print request.

    摘要翻译： 公开了具有通过通信网络彼此连接的多个打印机和计算机的打印系统。 第一台计算机通过网络与第二台计算机连接。 第一计算机根据用户指定的打印请求生成打印作业和用于执行打印作业的打印请求信号到第一打印机。 第一计算机还根据用户请求执行打印作业到第二打印机的持续打印请求，生成包含用户唯一的信息的连续打印请求信号。 打印作业和每个信号从第一计算机的通信单元发送到通信网络。 第二台计算机通过通信网络接收打印作业和每个信号。 第二计算机进一步使第一打印机根据打印请求信号执行由用户指定的打印作业。 在接收到包含连续打印请求的信号和用户唯一的信息时，第二计算机判定用户唯一的信息属于指定打印作业的用户。 在确定包含连续打印请求的信号和用户唯一的信息属于用户的情况下，第二计算机使得第二打印机根据连续打印请求执行打印作业。

    Variable-resistance memory device with charge sharing that discharges pre-charge voltage of a selected bit line to share charge with unselected bit lines
    60.
    发明授权
    Variable-resistance memory device with charge sharing that discharges pre-charge voltage of a selected bit line to share charge with unselected bit lines 失效
    具有电荷共享的可变电阻存储器件，其放电所选位线的预充电电压以与未选择的位线共享电荷

    公开(公告)号：US08559253B2

    公开(公告)日：2013-10-15

    申请号：US13067933

    申请日：2011-07-08

    申请人： Makoto Kitagawa ,  Hiroshi Yoshihara

    发明人： Makoto Kitagawa ,  Hiroshi Yoshihara

    IPC分类号： G11C7/00

    CPC分类号： G11C13/0009 ,  G11C7/12 ,  G11C13/0007 ,  G11C13/004 ,  G11C13/0069 ,  G11C2013/0042 ,  G11C2013/0054 ,  G11C2013/0073 ,  G11C2213/56 ,  G11C2213/79

    摘要： A variable-resistance memory device that includes a memory-cell array employing a plurality of memory cells each including a storage element and an access transistor. The storage element has a resistance varying in accordance with the direction of a voltage applied to the storage element and the access transistor is connected in series to the storage element between a bit line and a source line. A voltage supplying circuit sets a read voltage used for reading out the resistance of the storage element on a selected bit line connected to the memory cell serving as a read object in an operation to supply the read voltage to the selected bit line.

    摘要翻译： 一种可变电阻存储器件，包括采用包括存储元件和存取晶体管的多个存储单元的存储单元阵列。 存储元件具有根据施加到存储元件的电压的方向而变化的电阻，并且存取晶体管与位线和源极线之间的存储元件串联连接。 电压提供电路在将读取电压提供给所选位线的操作中设置用于读出连接到用作读取对象的存储单元的选定位线上的存储元件的电阻的读取电压。