Resistive memory devices having a stacked structure and methods of operation thereof
    52.
    发明授权
    Resistive memory devices having a stacked structure and methods of operation thereof 有权
    具有堆叠结构的电阻式存储器件及其操作方法

    公开(公告)号:US08345464B2

    公开(公告)日:2013-01-01

    申请号:US12714950

    申请日:2010-03-01

    IPC分类号: G11C11/00

    摘要: A memory device includes a stacked resistive memory cell array comprising a plurality of resistive memory cell layers stacked on a semiconductor substrate, wherein respective memory cell layers are configured to store data according to respective program modes comprising a number of bits per cell. The memory device further includes a control circuit configured to identify a program mode of a selected memory cell layer responsive to an address signal and to access the selected memory cell layer responsive to the address signal according to the identified program mode. The program modes may include a single-level cell mode and at least one multi-level cell mode.

    摘要翻译: 存储器件包括堆叠在半导体衬底上的多个电阻存储器单元层的堆叠电阻性存储单元阵列,其中相应的存储单元层被配置为根据包括每个单元的位数的各自的程序模式来存储数据。 该存储装置还包括控制电路,该控制电路被配置为响应于地址信号来识别所选择的存储器单元层的编程模式,并且根据所识别的程序模式响应于地址信号访问所选择的存储单元层。 程序模式可以包括单级单元模式和至少一个多级单元模式。

    Pilot signal power control apparatus and operation method of pilot signal power control apparatus
    54.
    发明授权
    Pilot signal power control apparatus and operation method of pilot signal power control apparatus 有权
    导频信号功率控制装置及导频信号功率控制装置的运行方法

    公开(公告)号:US08099051B2

    公开(公告)日:2012-01-17

    申请号:US12038995

    申请日:2008-02-28

    IPC分类号: H04B1/00 H04B15/00 H04B17/00

    摘要: A pilot signal power control apparatus to determine a power level of a pilot signal of a primary network to indicate an availability of a wireless resource of thereof to a secondary user of a secondary network according to a cognitive radio technology, the pilot signal power control apparatus and an operation method thereof, the pilot signal power control apparatus including: a prediction unit to predict a noise increase and/or a sensing probability, the noise increase occurring in a primary user of the primary network due to a channel estimation error, and the sensing probability being a probability that a secondary user senses the pilot signal of; a channel capacity calculation unit to calculate a channel capacity of the primary user based on the predicted noise increase and/or sensing probability; and a power level determination unit to determine the power level of the pilot signal using the calculated channel capacity.

    摘要翻译: 一种导频信号功率控制装置,用于根据认知无线电技术确定主网络的导频信号的功率电平,以指示辅助网络的辅助用户的无线资源的可用性,所述导频信号功率控制装置 导频信号功率控制装置包括:预测单元,用于预测噪声增加和/或感测概率,由于信道估计误差而在主网络的主要用户中发生的噪声增加,以及 感测概率是次要用户感测导频信号的概率; 信道容量计算单元,用于基于预测的噪声增加和/或感测概率来计算主用户的信道容量; 以及功率电平确定单元,用于使用所计算的信道容量来确定导频信号的功率电平。

    Display Device and Backlight Unit
    56.
    发明申请
    Display Device and Backlight Unit 有权
    显示设备和背光单元

    公开(公告)号:US20100254157A1

    公开(公告)日:2010-10-07

    申请号:US12679185

    申请日:2008-12-01

    申请人: Hyun Ho Choi

    发明人: Hyun Ho Choi

    IPC分类号: F21V7/22 F21V7/04

    摘要: Disclosed are a display device and a backlight unit. The display device comprises a flexible light guide plate, a light source disposed at one side of the light guide plate, and a support member disposed in opposition to the light guide plate and the light source to support the light guide plate. The support member allows the light source and the light guide plate to have constant interval therebetween, and prevents the light source and the light guide plate from being tilted each other. The display device and the backlight unit ensure improved brightness and brightness uniformity.

    摘要翻译: 公开了一种显示装置和背光单元。 显示装置包括柔性导光板,设置在导光板一侧的光源和与导光板和光源相对设置的支撑件,以支撑导光板。 支撑构件允许光源和导光板之间具有恒定的间隔,并且防止光源和导光板彼此倾斜。 显示装置和背光单元确保改善的亮度和亮度均匀性。

    SYSTEMS, DEVICES AND METHODS USING REDUNDANT ERROR CORRECTION CODE BIT STORAGE
    58.
    发明申请
    SYSTEMS, DEVICES AND METHODS USING REDUNDANT ERROR CORRECTION CODE BIT STORAGE 有权
    使用冗余错误修正代码位存储的系统,设备和方法

    公开(公告)号:US20100223532A1

    公开(公告)日:2010-09-02

    申请号:US12713853

    申请日:2010-02-26

    IPC分类号: H03M13/05 G06F11/10

    CPC分类号: G06F11/1048 G11C2029/0411

    摘要: A device, e.g., a semiconductor memory device, includes a plurality of memory cells, each configured to store at least one data bit and a plurality of error correction code (ECC) cells configured to redundantly store ECC bits for the memory cells. According to some embodiments, the plurality of ECC cells includes a plurality of pairs of ECC cells configured to store an ECC bit and a complement thereof. According to further embodiments, the plurality of ECC cells includes a plurality of groups of at least three ECC cells configured to store identical copies of an ECC bit.

    摘要翻译: 诸如半导体存储器件的器件包括多个存储器单元,每个存储单元被配置为存储至少一个数据位和多个纠错码(ECC)单元,配置为冗余地存储用于存储器单元的ECC位。 根据一些实施例,多个ECC单元包括配置成存储ECC位及其补码的多对ECC单元。 根据另外的实施例,多个ECC小区包括被配置为存储ECC比特的相同副本的至少三个ECC小区的多个组。