Abstract:
An embodiment of a method for manufacturing a semiconductor device includes: providing a monocrystalline semiconductor substrate having a first side; forming a plurality of recess structures in the semiconductor substrate at the first side; filling the recess structures with a dielectric material to form dielectric islands in the recess structures; forming a semiconductor layer on the first side of the semiconductor substrate to cover the dielectric islands; and subjecting the semiconductor layer to heat treatment and recrystallizing the semiconductor layer to form a recrystallized semiconductor layer, so that a crystal structure of the recrystallized semiconductor layer adapts to a crystal structure of the semiconductor substrate, and so that the semiconductor substrate and the semiconductor layer together form a compound wafer with the dielectric islands at least partially buried in the semiconductor material of the compound wafer.
Abstract:
A semiconductor device includes transistor cells and enhancement cells. Each transistor cell includes a body zone that forms a first pn junction with a drift structure. The transistor cells may form, in the body zones, inversion channels when a first control signal exceeds a first threshold. The inversion channels form part of a connection between the drift structure and a first load electrode. A delay unit generates a second control signal which trailing edge is delayed with respect to a trailing edge of the first control signal. The enhancement cells form inversion layers in the drift structure when the second control signal falls below a second threshold lower than the first threshold. The inversion layers are effective as minority charge carrier emitters.
Abstract:
A semiconductor device includes a semiconductor mesa having source zones and at least one body zone forming first pn junctions with the source zones and a second pn junction with a drift zone. Electrode structures are provided on opposite sides of the semiconductor mesa, at least one of the electrode structures having a gate electrode configured to control a charge carrier flow through the at least one body zone. A separation region is arranged along an extension direction of the semiconductor mesa. In the separation region, the semiconductor mesa has a constricted portion that is partially or completely oxidized. Additional semiconductor device embodiments are described.
Abstract:
A method of manufacturing a semiconductor device includes forming electrode trenches in a semiconductor substrate between semiconductor mesas that separate the electrode trenches, the semiconductor mesas including portions of a drift layer of a first conductivity type and a body layer of a second, complementary conductivity type between a first surface of the semiconductor substrate and the drift layer, respectively. The method further includes forming isolated source zones of the first conductivity type in the semiconductor mesas, the source zones extending from the first surface into the body layer. The method also includes forming separation structures in the semiconductor mesas between neighboring source zones arranged along an extension direction of the semiconductor mesas, the separation structures forming partial or complete constrictions of the semiconductor mesa, respectively.
Abstract:
A semiconductor switching device includes a first load terminal electrically connected to source zones of transistor cells. The source zones form first pn junctions with body zones. A second load terminal is electrically connected to a drain construction that forms second pn junctions with the body zones. Control structures, which include a control electrode and charge storage structures, directly adjoin the body zones. The control electrode controls a load current through the body zones. The charge storage structures insulate the control electrode from the body zones and contain a control charge adapted to induce inversion channels in the body zones in the absence of a potential difference between the control electrode and the first load electrode.
Abstract:
A semiconductor device includes a semiconductor mesa having source zones separated from each other along a longitudinal axis of the semiconductor mesa and at least one body zone forming first pn junctions with the source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa, at least one of which includes a gate electrode configured to control a charge carrier flow through the at least one body zone. First portions of the at least one body zone are formed between the source zones and separation regions. In the separation regions, at least one of (i) a capacitive coupling between the gate electrode and the semiconductor mesa and (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region.
Abstract:
A semiconductor device includes a body zone in a semiconductor mesa, which is formed between neighboring control structures that extend from a first surface into a semiconductor body. A drift zone forms a first pn junction with the body zone. In the semiconductor mesa, the drift zone includes a first drift zone section that includes a constricted section of the semiconductor mesa. A minimum horizontal width of the constricted section parallel to the first surface is smaller than a maximum horizontal width of the body zone. An emitter layer between the drift zone and the second surface parallel to the first surface includes at least one first zone of a conductivity type of the drift zone.