公开(公告)号：US20190148217A1

公开(公告)日：2019-05-16

申请号：US16192277

申请日：2018-11-15

Applicant: Infineon Technologies AG

Inventor： Andreas Moser ,  Matteo Dainese ,  Matthias Kuenle ,  Hans-Joachim Schulze

IPC: H01L21/762 ,  H01L21/324 ,  H01L21/02 ,  H01L21/78

Abstract: An embodiment of a method for manufacturing a semiconductor device includes: providing a monocrystalline semiconductor substrate having a first side; forming a plurality of recess structures in the semiconductor substrate at the first side; filling the recess structures with a dielectric material to form dielectric islands in the recess structures; forming a semiconductor layer on the first side of the semiconductor substrate to cover the dielectric islands; and subjecting the semiconductor layer to heat treatment and recrystallizing the semiconductor layer to form a recrystallized semiconductor layer, so that a crystal structure of the recrystallized semiconductor layer adapts to a crystal structure of the semiconductor substrate, and so that the semiconductor substrate and the semiconductor layer together form a compound wafer with the dielectric islands at least partially buried in the semiconductor material of the compound wafer.

公开(公告)号：US09997602B2

公开(公告)日：2018-06-12

申请号：US14975761

申请日：2015-12-19

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Roman Baburske ,  Matteo Dainese ,  Christian Jaeger

IPC: H01L29/40 ,  H01L29/739 ,  H01L29/10 ,  H01L29/423 ,  H01L29/08 ,  H01L29/861 ,  H01L27/082 ,  H01L27/088 ,  H01L29/06 ,  H01L29/36

CPC classification number: H01L29/407 ,  H01L27/0825 ,  H01L27/0883 ,  H01L29/0619 ,  H01L29/0834 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/7397 ,  H01L29/8613

Abstract: A semiconductor device includes transistor cells and enhancement cells. Each transistor cell includes a body zone that forms a first pn junction with a drift structure. The transistor cells may form, in the body zones, inversion channels when a first control signal exceeds a first threshold. The inversion channels form part of a connection between the drift structure and a first load electrode. A delay unit generates a second control signal which trailing edge is delayed with respect to a trailing edge of the first control signal. The enhancement cells form inversion layers in the drift structure when the second control signal falls below a second threshold lower than the first threshold. The inversion layers are effective as minority charge carrier emitters.

公开(公告)号：US20180090594A1

公开(公告)日：2018-03-29

申请号：US15830789

申请日：2017-12-04

Applicant: Infineon Technologies AG

Inventor： Roman Baburske ,  Matteo Dainese ,  Peter Lechner ,  Hans-Joachim Schulze ,  Johannes Georg Laven

IPC: H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L21/762 ,  H01L29/04 ,  H01L29/08 ,  H01L29/10 ,  H01L29/40 ,  H01L29/423 ,  H01L29/739

CPC classification number: H01L29/66348 ,  H01L21/02238 ,  H01L21/76224 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0696 ,  H01L29/0843 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/6634 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397

Abstract: A semiconductor device includes a semiconductor mesa having source zones and at least one body zone forming first pn junctions with the source zones and a second pn junction with a drift zone. Electrode structures are provided on opposite sides of the semiconductor mesa, at least one of the electrode structures having a gate electrode configured to control a charge carrier flow through the at least one body zone. A separation region is arranged along an extension direction of the semiconductor mesa. In the separation region, the semiconductor mesa has a constricted portion that is partially or completely oxidized. Additional semiconductor device embodiments are described.

公开(公告)号：US20170148893A1

公开(公告)日：2017-05-25

申请号：US15422049

申请日：2017-02-01

Applicant: Infineon Technologies AG

Inventor： Roman Baburske ,  Matteo Dainese ,  Peter Lechner ,  Hans-Joachim Schulze ,  Johannes Georg Laven

IPC: H01L29/66 ,  H01L29/10 ,  H01L29/06 ,  H01L29/739 ,  H01L21/02 ,  H01L29/04 ,  H01L21/762 ,  H01L29/40 ,  H01L29/423 ,  H01L29/08

CPC classification number: H01L29/66348 ,  H01L21/02238 ,  H01L21/76224 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0649 ,  H01L29/0696 ,  H01L29/0843 ,  H01L29/0865 ,  H01L29/1095 ,  H01L29/404 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/6634 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397

Abstract: A method of manufacturing a semiconductor device includes forming electrode trenches in a semiconductor substrate between semiconductor mesas that separate the electrode trenches, the semiconductor mesas including portions of a drift layer of a first conductivity type and a body layer of a second, complementary conductivity type between a first surface of the semiconductor substrate and the drift layer, respectively. The method further includes forming isolated source zones of the first conductivity type in the semiconductor mesas, the source zones extending from the first surface into the body layer. The method also includes forming separation structures in the semiconductor mesas between neighboring source zones arranged along an extension direction of the semiconductor mesas, the separation structures forming partial or complete constrictions of the semiconductor mesa, respectively.

公开(公告)号：US09543398B2

公开(公告)日：2017-01-10

申请号：US14814758

申请日：2015-07-31

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Anton Mauder ,  Matteo Dainese ,  Franz Hirler ,  Christian Jaeger ,  Maximilian Roesch ,  Wolfgang Roesner ,  Martin Stiftinger ,  Robert Strenz

IPC: H01L29/423 ,  H01L27/02 ,  H01L27/06 ,  H01L27/115 ,  H01L29/792 ,  H01L21/28 ,  H01L29/788

CPC classification number: H01L29/42344 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/0623 ,  H01L27/11521 ,  H01L27/11556 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11582 ,  H01L29/0619 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/42376 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7803 ,  H01L29/7813 ,  H01L29/7883 ,  H01L29/792

Abstract: A semiconductor switching device includes a first load terminal electrically connected to source zones of transistor cells. The source zones form first pn junctions with body zones. A second load terminal is electrically connected to a drain construction that forms second pn junctions with the body zones. Control structures, which include a control electrode and charge storage structures, directly adjoin the body zones. The control electrode controls a load current through the body zones. The charge storage structures insulate the control electrode from the body zones and contain a control charge adapted to induce inversion channels in the body zones in the absence of a potential difference between the control electrode and the first load electrode.

Abstract translation: 半导体开关器件包括电连接到晶体管单元的源极区的第一负载端子。 源区与身体区形成第一个pn结。 第二负载端子电连接到与主体区域形成第二pn结的排水构造。 包括控制电极和电荷存储结构的控制结构直接与身体区相邻。 控制电极控制穿过身体区域的负载电流。 电荷存储结构将控制电极与体区绝缘，并且在控制电极和第一负载电极之间没有电位差的情况下，包含适于在体区中诱导反转通道的控制电荷。

公开(公告)号：US20160093724A1

公开(公告)日：2016-03-31

申请号：US14963456

申请日：2015-12-09

Applicant: Infineon Technologies AG

Inventor： Roman Baburske ,  Matteo Dainese ,  Peter Lechner ,  Hans-Joachim Schulze ,  Johannes Georg Laven

IPC: H01L29/739 ,  H01L29/06

CPC classification number: H01L29/7393 ,  H01L29/045 ,  H01L29/0619 ,  H01L29/0696 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/42368 ,  H01L29/4238 ,  H01L29/66333 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7396 ,  H01L29/7397 ,  H01L29/8613 ,  H01L2924/13055

Abstract: A semiconductor device includes a semiconductor mesa having source zones separated from each other along a longitudinal axis of the semiconductor mesa and at least one body zone forming first pn junctions with the source zones and a second pn junction with a drift zone. Electrode structures are on opposite sides of the semiconductor mesa, at least one of which includes a gate electrode configured to control a charge carrier flow through the at least one body zone. First portions of the at least one body zone are formed between the source zones and separation regions. In the separation regions, at least one of (i) a capacitive coupling between the gate electrode and the semiconductor mesa and (ii) a conductivity of majority charge carriers of the drift zone is lower than outside of the separation region.

Abstract translation: 半导体器件包括半导体台面，其具有沿着半导体台面的纵向轴线彼此分离的源极区域，以及形成与源极区域形成第一pn结的至少一个体区域和具有漂移区域的第二pn结点。 电极结构位于半导体台面的相对侧上，其中至少一个包括配置成控制通过至少一个体区的电荷载流子的栅电极。 至少一个体区的第一部分形成在源区和分离区之间。 在分离区域中，（i）栅电极和半导体台面之间的电容耦合和（ii）漂移区的多数电荷载流子的电导率中的至少一个低于分离区域的外部。

公开(公告)号：US20150295034A1

公开(公告)日：2015-10-15

申请号：US14248371

申请日：2014-04-09

Applicant: Infineon Technologies AG

Inventor： Johannes Georg Laven ,  Roman Baburske ,  Matteo Dainese ,  Peter Lechner

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/739

CPC classification number: H01L29/0619 ,  H01L29/0623 ,  H01L29/0696 ,  H01L29/0834 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66325 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7395 ,  H01L29/7397

Abstract: A semiconductor device includes a body zone in a semiconductor mesa, which is formed between neighboring control structures that extend from a first surface into a semiconductor body. A drift zone forms a first pn junction with the body zone. In the semiconductor mesa, the drift zone includes a first drift zone section that includes a constricted section of the semiconductor mesa. A minimum horizontal width of the constricted section parallel to the first surface is smaller than a maximum horizontal width of the body zone. An emitter layer between the drift zone and the second surface parallel to the first surface includes at least one first zone of a conductivity type of the drift zone.

Abstract translation: 半导体器件包括在半导体台面中的主体区域，其形成在从第一表面延伸到半导体本体的相邻控制结构之间。 漂移区与身体区形成第一个pn结。 在半导体台面中，漂移区包括包括半导体台面的收缩部分的第一漂移区段。 平行于第一表面的收缩部分的最小水平宽度小于身体区域的最大水平宽度。 漂移区和平行于第一表面的第二表面之间的发射极层包括漂移区的导电类型的至少一个第一区。