公开(公告)号：US08034655B2

公开(公告)日：2011-10-11

申请号：US12099267

申请日：2008-04-08

Applicant: John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

Inventor： John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu

IPC: H01L21/8239

CPC classification number: H01L45/04 ,  G11C11/56 ,  G11C13/00 ,  H01L27/2463 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1666

Abstract: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Insulative material is deposited over the first electrode. An opening is formed into the insulative material over the first electrode. The opening includes sidewalls and a base. The opening sidewalls and base are lined with a multi-resistive state layer comprising multi-resistive state metal oxide-comprising material which less than fills the opening. A second conductive electrode of the memory cell is formed within the opening laterally inward of the multi-resistive state layer lining the sidewalls and elevationally over the multi-resistive state layer lining the base. Other aspects and implementations are contemplated.

Abstract translation: 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 绝缘材料沉积在第一电极上。 在第一电极上形成绝缘材料的开口。 开口包括侧壁和底座。 开口侧壁和基底衬有包含少于填充开口的多电阻态金属氧化物材料的多电阻状态层。 存储单元的第二导电电极形成在多个电阻状态层的横向内侧的开口的内部，该电阻层衬在侧壁上，并且在衬底基底上的多电阻状态层的顶部形成。 考虑了其他方面和实现。

公开(公告)号：US07851307B2

公开(公告)日：2010-12-14

申请号：US11840485

申请日：2007-08-17

Applicant: Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

Inventor： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

IPC: H01L21/336

CPC classification number: H01L21/31691 ,  H01L21/28273 ,  H01L21/3142 ,  H01L29/42332 ,  H01L29/7881

Abstract: Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated pulses of a titanium source material, a strontium source material, and an oxygen source material capable of forming an oxide with the titanium source material and the strontium source material to form the charge trapping layer on the substrate.

Abstract translation: 公开了方法和装置，例如涉及为例如可以包括闪速存储器单元的存储器件形成电荷阱的那些。 将衬底暴露于钛源材料，锶源材料和能够与钛源材料和锶源材料形成氧化物的氧源材料的时间分离的脉冲，以在衬底上形成电荷捕获层。

公开(公告)号：US07811840B2

公开(公告)日：2010-10-12

申请号：US12128334

申请日：2008-05-28

Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

IPC: H01L21/00

CPC classification number: H01L45/00 ,  Y10S257/91 ,  Y10S438/90 ,  Y10S438/902 ,  Y10S438/983

Abstract: Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of an oxidizable material over a conductive electrode, and subsequent oxidation of the oxidizable material to form an oxide layer over the conductive electrode. In some embodiments, the methods may include formation of a metal halide layer over a conductive electrode. Some embodiments include diodes that contain a metal halide layer between a pair of diode electrodes.

Abstract translation: 一些实施例包括形成二极管的方法。 所述方法可以包括氧化导电电极的上表面以在导电电极上形成氧化物层。 在一些实施方案中，所述方法可包括在导电电​​极上形成可氧化材料，以及随后氧化可氧化材料以在导电电极上形成氧化物层。 在一些实施例中，所述方法可包括在导电电​​极上形成金属卤化物层。 一些实施例包括在一对二极管电极之间包含金属卤化物层的二极管。

公开(公告)号：US20100129980A1

公开(公告)日：2010-05-27

申请号：US12323978

申请日：2008-11-26

Applicant: Gurtej S. Sandhu ,  Bhaskar Srinivasan

Inventor： Gurtej S. Sandhu ,  Bhaskar Srinivasan

IPC: H01L21/329

CPC classification number: H01L21/04 ,  H01L27/1021 ,  H01L27/2418 ,  H01L29/1606 ,  H01L45/00

Abstract: Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a sacrificial material, at least one dielectric material, and a second conductive material. Spacers may be formed along opposing sidewalls of the stack, and then an entirety of the sacrificial material may be removed to leave a gap between the first conductive material and the at least one dielectric material. In some embodiments of forming diodes, a layer may be formed over a first conductive material, with the layer containing supports interspersed in sacrificial material. At least one dielectric material may be formed over the layer, and a second conductive material may be formed over the at least one dielectric material. An entirety of the sacrificial material may then be removed.

Abstract translation: 一些实施例包括形成二极管的方法。 可以在第一导电材料上形成堆叠。 堆叠可以按升序包括牺牲材料，至少一种电介质材料和第二导电材料。 间隔物可以沿着堆叠的相对侧壁形成，然后可以去除整个牺牲材料以在第一导电材料和至少一个电介质材料之间留下间隙。 在形成二极管的一些实施例中，可以在第一导电材料上形成层，其中包含支撑体的层散布在牺牲材料中。 可以在该层上形成至少一种介电材料，并且可以在该至少一种电介质材料的上方形成第二导电材料。 然后可以去除整个牺牲材料。

公开(公告)号：US20100003782A1

公开(公告)日：2010-01-07

申请号：US12166604

申请日：2008-07-02

Applicant: Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  Neil Greeley ,  Kunal Parekh

Inventor： Nishant Sinha ,  John Smythe ,  Bhaskar Srinivasan ,  Gurtej Sandhu ,  Neil Greeley ,  Kunal Parekh

IPC: H01L21/16

CPC classification number: H01L45/1683 ,  H01L27/2472 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146 ,  H01L45/147 ,  H01L45/16

Abstract: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. Metal oxide-comprising material is formed over the first conductive electrode. Etch stop material is deposited over the metal oxide-comprising material. Conductive material is deposited over the etch stop material. A second conductive electrode of the memory cell which comprises the conductive material received is formed over the etch stop material. Such includes etching through the conductive material to stop relative to the etch stop material and forming the non-volatile resistive oxide memory cell to comprise the first and second conductive electrodes having both the metal oxide-comprising material and the etch stop material therebetween. Other implementations are contemplated.

Abstract translation: 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 含金属氧化物的材料形成在第一导电电极上。 蚀刻停止材料沉积在包含金属氧化物的材料上。 导电材料沉积在蚀刻停止材料上。 包含所接收的导电材料的存储单元的第二导电电极形成在蚀刻停止材料上。 这样包括通过导电材料蚀刻以相对于蚀刻停止材料停止并且形成非易失性电阻氧化物存储单元，以包括具有包含金属氧化物的材料和其间的蚀刻停止材料的第一和第二导电电极。 考虑其他实现。

公开(公告)号：US20070257839A1

公开(公告)日：2007-11-08

申请号：US11418665

申请日：2006-05-05

Applicant: Bhaskar Srinivasan ,  Lakshmi Venkatraman ,  Abtin Keshavarzian

Inventor： Bhaskar Srinivasan ,  Lakshmi Venkatraman ,  Abtin Keshavarzian

IPC: H01Q3/00 ,  G01S3/02

CPC classification number: G01S5/02 ,  H04W64/003

Abstract: A method and system for determining a location of at least one stationary node of a wireless network, which includes providing a predetermined path within a geographic space of the wireless network, prior to localization, moving a mobile node along the predetermined path, measuring a network parameter with respect to the mobile node as it moves along the predetermined path, and performing a localization scheme to estimate the location of the at least one stationary node using the measured network parameter.

Abstract translation: 一种用于确定无线网络的至少一个固定节点的位置的方法和系统，其包括在定位之前在所述无线网络的地理空间内提供预定路径，沿着所述预定路径移动移动节点，测量网络 参数相对于移动节点沿着预定路径移动，并且执行定位方案以使用测量的网络参数来估计至少一个固定节点的位置。

公开(公告)号：US20070076762A1

公开(公告)日：2007-04-05

申请号：US11241298

申请日：2005-09-30

Applicant: Arati Manjeshwar ,  Lakshmi Venkatraman ,  Bhaskar Srinivasan

Inventor： Arati Manjeshwar ,  Lakshmi Venkatraman ,  Bhaskar Srinivasan

IPC: H04J1/10 ,  H04B7/14 ,  H04J3/06 ,  H04J3/08

CPC classification number: H04B7/2696 ,  H04J3/0638 ,  H04L7/0008

Abstract: A method of synchronizing a network includes transmitting a tone signal to convey time information and setting a local time according to the conveyed time information.

Abstract translation: 一种同步网络的方法包括发送音调信号以传送时间信息并根据传送的时间信息设置本地时间。

公开(公告)号：US20060269811A1

公开(公告)日：2006-11-30

申请号：US11137084

申请日：2005-05-24

Applicant: Dirk Lange ,  Wilhelm Frey ,  Bhaskar Srinivasan

Inventor： Dirk Lange ,  Wilhelm Frey ,  Bhaskar Srinivasan

IPC: H01M12/06 ,  H01M2/08 ,  H01M8/04

CPC classification number: H01M6/5044 ,  H01M6/425 ,  H01M6/44 ,  H01M6/5011 ,  H01M12/06

Abstract: A zinc/air battery includes a plurality zinc/air battery cells and an arrangement for exposing the plurality of zinc/air battery cells to air wherein the exposing arrangement opens the plurality of zinc/air battery cells in a serial manner such that only one cell is operative at a time.

公开(公告)号：US09577186B2

公开(公告)日：2017-02-21

申请号：US13488190

申请日：2012-06-04

Applicant: Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

Inventor： Bhaskar Srinivasan ,  Gurtej Sandhu ,  John Smythe

IPC: H01L21/00 ,  H01L45/00 ,  H01L27/24

CPC classification number: H01L45/04 ,  H01L27/2463 ,  H01L27/2472 ,  H01L45/1233 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1675

Abstract: A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. The first conductive electrode has an elevationally outermost surface and opposing laterally outermost edges at the elevationally outermost surface in one planar cross section. Multi-resistive state metal oxide-comprising material is formed over the first conductive electrode. Conductive material is deposited over the multi-resistive state metal oxide-comprising material. A second conductive electrode of the memory cell which comprises the conductive material is received over the multi-resistive state metal oxide-comprising material. The forming thereof includes etching through the conductive material to form opposing laterally outermost conductive edges of said conductive material in the one planar cross section at the conclusion of said etching which are received laterally outward of the opposing laterally outermost edges of the first conductive electrode in the one planar cross section.

Abstract translation: 形成非易失性电阻氧化物存储单元的方法包括：形成存储单元的第一导电电极作为衬底的一部分。 第一导电电极在一个平面横截面中具有垂直最外表面和在最外表面处的相对的横向最外边缘。 在第一导电电极上形成包含多电阻态金属氧化物的材料。 导电材料沉积在多电阻状态的含金属氧化物的材料上。 包含导电材料的存储单元的第二导电电极被接收在多电阻状态的含金属氧化物的材料上。 其形成包括通过导电材料的蚀刻，以在所述蚀刻结束时在一个平面截面中形成所述导电材料的相对的横向最外面的导电边缘，其在第一导电电极的相对的横向最外边缘的横向外侧接收 一个平面截面。

公开(公告)号：US08861179B2

公开(公告)日：2014-10-14

申请号：US13597708

申请日：2012-08-29

Applicant: Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jeff Hull ,  Chris Carlson

Inventor： Rishikesh Krishnan ,  John Smythe ,  Vishwanath Bhat ,  Noel Rocklein ,  Bhaskar Srinivasan ,  Jeff Hull ,  Chris Carlson

IPC: H01G4/06 ,  H01G4/20 ,  H01G4/10

CPC classification number: H01L28/56 ,  H01G4/10 ,  H01L27/108

Abstract: Capacitors and methods of forming capacitors are disclosed, and which include an inner conductive metal capacitor electrode and an outer conductive metal capacitor electrode. A capacitor dielectric region is received between the inner and the outer conductive metal capacitor electrodes and has a thickness no greater than 150 Angstroms. Various combinations of materials of thicknesses and relationships relative one another are disclosed which enables and results in the dielectric region having a dielectric constant k of at least 35 yet leakage current no greater than 1×10−7 amps/cm2 at from −1.1V to +1.1V.

Abstract translation: 公开了形成电容器的电容器和方法，其包括内部导电金属电容器电极和外部导电金属电容器电极。 电容器电介质区域被容纳在内导电金属电容电极和外导电金属电容器电极之间，并且具有不大于150埃的厚度。 公开了厚度和关系的材料的各种组合，其相互之间可以实现和导致电介质区域的介电常数k至少为35，而在-1.1V至-1.0V的范围内漏电流不大于1×10-7Aps / + 1.1V。