Regrouping of video data in host memory
    51.
    发明申请

    公开(公告)号:US20200245016A1

    公开(公告)日:2020-07-30

    申请号:US16850036

    申请日:2020-04-16

    Abstract: Apparatus for data communications includes a host interface, which is configured to be connected to a bus of a host computer having a processor and a memory. Processing circuitry, which is coupled to the host interface, is configured to receive video data with respect to a sequence of pixels, the video data including data words of more than eight bits per pixel for at least one pixel component of the pixels, and to write the video data, via the host interface, to at least one buffer in the memory while justifying the video data in the memory so that the successive pixels in the sequence are byte-aligned in the at least one buffer.

    Hardware-based congestion control for TCP traffic

    公开(公告)号:US20170093699A1

    公开(公告)日:2017-03-30

    申请号:US15278143

    申请日:2016-09-28

    CPC classification number: H04L69/16 H04L47/263 H04L47/28 H04L47/33 Y02D50/10

    Abstract: A method for congestion control includes receiving at a destination computer a packet transmitted on a given flow, in accordance with a predefined transport protocol, through a network by a transmitting network interface controller (NIC) of a source computer, and marked by an element in the network with a forward congestion notification. Upon receiving the marked packet in a receiving NIC of the destination computer, a congestion notification packet (CNP) indicating a flow to be throttled is immediately queued for transmission from the receiving NIC through the network to the source computer. Upon receiving the CNP in the transmitting NIC, transmission of further packets on at least the flow indicated by the CNP from the transmitting NIC to the network is immediately throttled, and an indication of the given flow is passed from the transmitting NIC to a protocol processing software stack running on the source computer.

    Network interface controller supporting network virtualization

    公开(公告)号:US09462047B2

    公开(公告)日:2016-10-04

    申请号:US14637414

    申请日:2015-03-04

    CPC classification number: H04L67/10 G06F9/45533 H04L12/4633 H04L45/64

    Abstract: A network interface device includes a host interface for connection to a host processor having a memory. A network interface is configured to transmit and receive data packets over a data network, which supports multiple tenant networks overlaid on the data network. Processing circuitry is configured to receive, via the host interface, a work item submitted by a virtual machine running on the host processor, and to identify, responsively to the work item, a tenant network over which the virtual machine is authorized to communicate, wherein the work item specifies a message to be sent to a tenant destination address. The processing circuitry generates, in response to the work item, a data packet containing an encapsulation header that is associated with the tenant network, and to transmit the data packet over the data network to at least one data network address corresponding to the specified tenant destination address.

    Sharing address translation between CPU and peripheral devices
    56.
    发明授权
    Sharing address translation between CPU and peripheral devices 有权
    共享CPU和外围设备之间的地址转换

    公开(公告)号:US09298642B2

    公开(公告)日:2016-03-29

    申请号:US13665946

    申请日:2012-11-01

    CPC classification number: G06F12/1081

    Abstract: A method for memory access includes maintaining in a host memory, under control of a host operating system running on a central processing unit (CPU), respective address translation tables for multiple processes executed by the CPU. Upon receiving, in a peripheral device, a work item that is associated with a given process, having a respective address translation table in the host memory, and specifies a virtual memory address, the peripheral device translates the virtual memory address into a physical memory address by accessing the respective address translation table of the given process in the host memory. The work item is executed in the peripheral device by accessing data at the physical memory address in the host memory.

    Abstract translation: 一种用于存储器访问的方法包括在主机操作系统在中央处理单元(CPU)上运行的主机操作系统的控制下维护主机存储器,用于由CPU执行的多个进程的各自的地址转换表。 在外围设备中接收与给定进程相关联的工作项,在主机存储器中具有相应的地址转换表,并指定虚拟存储器地址时,外围设备将虚拟存储器地址转换为物理存储器地址 通过访问主机存储器中给定进程的相应地址转换表。 通过访问主机存储器中的物理存储器地址上的数据,在外围设备中执行工作项。

    NETWORK-ATTACHED MEMORY
    57.
    发明申请
    NETWORK-ATTACHED MEMORY 有权
    网络连接记忆

    公开(公告)号:US20150293881A1

    公开(公告)日:2015-10-15

    申请号:US14644400

    申请日:2015-03-11

    Abstract: A method for memory access is applied in a cluster of computers linked by a network. For a given computer, a respective physical memory range is defined including a local memory range within the local RAM of the given computer and a remote memory range allocated to the given compute within the local RAM of at least one other computer in the cluster, which is accessible via the network using the network interface controllers of the computers. When a memory operation is requested at a given address in the respective physical memory range, the operation is executed on the data in the local RAM of the given computer when the data at the given address are valid in the local memory range. Otherwise the data are fetched from the given address in the remote memory range to the local memory range before executing the operation on the data.

    Abstract translation: 用于存储器访问的方法被应用于由网络链接的计算机的集群中。 对于给定的计算机,定义相应的物理存储器范围,其包括给定计算机的本地RAM内的本地存储器范围和分配给集群中的至少另一台计算机的本地RAM内的给定计算的远程存储器范围, 可通过网络使用计算机的网络接口控制器访问。 当在相应物理存储器范围内的给定地址处请求存储器操作时,当给定地址的数据在本地存储器范围内有效时,对给定计算机的本地RAM中的数据执行操作。 否则,在对数据执行操作之前,将数据从远程存储器范围中的给定地址提取到本地存储器范围。

    NIC WITH SWITCHING FUNCTIONALITY BETWEEN NETWORK PORTS
    58.
    发明申请
    NIC WITH SWITCHING FUNCTIONALITY BETWEEN NETWORK PORTS 审中-公开
    网络端口之间切换功能的网卡

    公开(公告)号:US20150271244A1

    公开(公告)日:2015-09-24

    申请号:US14658260

    申请日:2015-03-16

    Abstract: A network interface device includes a host interface for connection to a host processor and a network interface, which is configured to transmit and receive data packets over a network, and which comprises multiple distinct physical ports configured for connection to the network. Processing circuitry is configured to receive, via one of the physical ports, a data packet from the network and to decide, responsively to a destination identifier in the packet, whether to deliver a payload of the data packet to the host processor via the host interface or to forward the data packet to the network via another one of the physical ports.

    Abstract translation: 网络接口设备包括用于连接到主处理器的主机接口和网络接口,网络接口被配置为通过网络发送和接收数据分组,并且包括被配置为连接到网络的多个不同的物理端口。 处理电路被配置为经由物理端口中的一个接收来自网络的数据分组,并且响应于分组中的目的地标识符来决定是否经由主机接口将数据分组的有效载荷传送到主机处理器 或者通过另一个物理端口将数据分组转发到网络。

    Reducing size of completion notifications
    60.
    发明授权
    Reducing size of completion notifications 有权
    减少完成通知的大小

    公开(公告)号:US08959265B2

    公开(公告)日:2015-02-17

    申请号:US13682772

    申请日:2012-11-21

    CPC classification number: G06F3/016 G06F13/128 G06F13/14

    Abstract: A computer peripheral device includes a host interface, which is configured to communicate over a bus with a host processor and with a system memory of the host processor. Processing circuitry in the peripheral device is configured to receive and execute work items submitted to the peripheral device by client processes running on the host processor, and responsively to completing execution of the work items, to write completion reports to the system memory, including first completion reports of a first data size and second completion reports of a second data size, which is smaller than the first data size.

    Abstract translation: 计算机外围设备包括主机接口,其被配置为通过总线与主处理器和主机处理器的系统存储器进行通信。 外围设备中的处理电路被配置为通过在主处理器上运行的客户端进程来接收和执行提交给外围设备的工作项目,并且响应于完成工作项目的执行,将完成报告写入系统存储器,包括首先完成 报告第一数据大小和第二数据大小的第二完成报告,其小于第一数据大小。

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