Electronic Device System
    51.
    发明申请
    Electronic Device System 有权
    电子设备系统

    公开(公告)号:US20080126965A1

    公开(公告)日:2008-05-29

    申请号:US11791965

    申请日:2006-01-27

    IPC分类号: G06F3/048

    摘要: Provided is an electronic device system with improved user convenience that is capable of controlling plural electronic devices connected via a network or the like from any of such electronic devices. The electronic device system according to the present invention is composed of: a first electronic device (100) that includes a first manipulation information sending unit (103) that sends, to a second electronic device (200), a first manipulation information that is information for causing the first electronic device (100) to operate, a first manipulation information receiving unit (106) that receives, from the second electronic device (200), a second manipulation information that is information for causing the second electronic device (200) to operate, and a first manipulation information accumulation unit (107) that accumulates the second manipulation information; and the second electronic device (200) that includes a second manipulation information sending unit (203) that sends the second manipulation information to the first electronic device (100), a second manipulation information receiving unit (206) that receives the first manipulation information from the first electronic device (100) and a second manipulation information accumulation unit (207) that accumulates the first manipulation information.

    摘要翻译: 提供一种电子设备系统,其具有改进的用户便利性,其能够通过任何这样的电子设备来控制经由网络等连接的多个电子设备。 根据本发明的电子设备系统包括:第一电子设备(100),其包括第一操作信息发送单元(103),其向第二电子设备(200)发送作为信息的第一操作信息 用于使所述第一电子设备(100)操作的第一操作信息接收单元(106)从所述第二电子设备(200)接收第二操作信息,所述第二操作信息是用于使所述第二电子设备(200) 操作,以及累积第二操作信息的第一操作信息存储单元(107) 以及第二电子设备(200),其包括向第一电子设备(100)发送第二操作信息的第二操作信息发送单元(203);第二操作信息接收单元(206),其从第 第一电子设备(100)和累积第一操作信息的第二操作信息存储单元(207)。

    Memory device, memory circuit and semiconductor integrated circuit having variable resistance
    53.
    发明申请
    Memory device, memory circuit and semiconductor integrated circuit having variable resistance 有权
    存储器件,存储器电路和具有可变电阻的半导体集成电路

    公开(公告)号:US20070159867A1

    公开(公告)日:2007-07-12

    申请号:US10584617

    申请日:2004-10-22

    IPC分类号: G11C17/00

    摘要: A first variable resistor (5) is connected between a first terminal (7) and a third terminal (9) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the first terminal (7) and the third terminal (9). A second variable resistor (6) is connected between the third terminal (9) and a second terminal (8) and increases/reduces its resistance value in accordance with the polarity of a pulse voltage applied between the third terminal (9) and the second terminal (8). Given pulse voltages are applied between the first terminal (7) and the third terminal (9) and between the third terminal (9) and the second terminal (8) to reversibly change the resistance values of the first and second variable resistors (5, 6), thereby recording one bit or multiple bits of information.

    摘要翻译: 第一可变电阻器(5)连接在第一端子(7)和第三端子(9)之间,并且根据施加在第一端子(7)和第三端子(7)之间的脉冲电压的极性来增大/减小其电阻值 终端(9)。 第二可变电阻器(6)连接在第三端子(9)和第二端子(8)之间,并根据在第三端子(9)和第二端子(8)之间施加的脉冲电压的极性来增大/减小其电阻值 端子(8)。 给定脉冲电压施加在第一端子(7)和第三端子(9)之间以及第三端子(9)和第二端子(8)之间,以可逆地改变第一和第二可变电阻器(5)的电阻值, 6),从而记录一位或多位信息。

    Tracking error detector with comparison of amplitude detected pilot
signals leaking in from tracks adjacent to the target track
    59.
    发明授权
    Tracking error detector with comparison of amplitude detected pilot signals leaking in from tracks adjacent to the target track 失效
    跟踪误差检测器,与检测到的导频信号的幅度进行比较,导频信号从与目标轨道相邻的轨道泄漏

    公开(公告)号:US5754356A

    公开(公告)日:1998-05-19

    申请号:US612816

    申请日:1996-03-22

    CPC分类号: G11B15/1875 G11B15/4678

    摘要: A magnetic recording and reproducing apparatus includes: a recorder for recording information signals so as to form tracks obliquely on a magnetic tape, and for recording pilot signals so that the frequency may differ between different modes such as SP and LP; a reproducing head for reproducing recorded information; an error detecting circuit for comparing the level difference of pilot signals recorded in both tracks adjacent to the track to be scanned by there producing head and for outputting a tracking error signal; and a controller for controlling the feed of the magnetic tape so that the tracking error signal may be balanced. Preferably, in the LP mode, a pilot signal of a higher frequency than that used in the SP mode is recorded. In a tracking error detector for a magnetic recording and reproducing apparatus for detecting the pilot signal, the reproduced signals are sampled at a frequency at a common multiple of each pilot frequency, a pilot signal is detected, and a tracking error signal is output.

    摘要翻译: 一种磁记录和再现装置,包括:用于记录信息信号以便在磁带上倾斜地形成轨道并用于记录导频信号的记录器,使得频率在诸如SP和LP的不同模式之间可能不同; 用于再现记录信息的再现头; 误差检测电路,用于比较由所述制造头在与要扫描的轨道相邻的两个轨道中记录的导频信号的电平差,并输出跟踪误差信号; 以及控制器,用于控制磁带的馈送,使得跟踪误差信号可以被平衡。 优选地,在LP模式中,记录频率高于SP模式中使用的频率的导频信号。 在用于检测导频信号的磁记录和再现装置的跟踪误差检测器中,以每个导频的公倍数的频率对再生信号进行采样,检测导频信号,并输出跟踪误差信号。

    Timing recovering apparatus having window periods determined by period
of clock signal
    60.
    发明授权
    Timing recovering apparatus having window periods determined by period of clock signal 失效
    具有由时钟信号周期确定的窗口周期的定时恢复装置

    公开(公告)号:US5490181A

    公开(公告)日:1996-02-06

    申请号:US391295

    申请日:1995-02-21

    摘要: A timing recovering apparatus comprises an equalizer for equalizing a digital data signal subjected to interleaved NRZI such that the digital data signal has partial response (1, 0, -1), two comparators for comparing the equalized data signal with two different reference levels, two phase comparing portions for detecting phase difference between the outputs of the comparators and a reproduced clock signal separately, an adder for summing the outputs of the phase comparators, and a VCO for generating the reproduce clock signal in accordance with the output of the adder. This timing recovering apparatus performs phase comparing with two different phase comparators and PLL control is performed on the sum of the outputs of the two different phase comparators, so that the clock signal is not affected by data pattern of the data signal. An automatic slice apparatus comprises the equalizer for equalizing a digital data signal subjected to interleaved NRZI, and two comparators supplied with reference levels, and the timing recovering apparatus, detects amplitude of the output of the equalizer in response to the reproduced clock signal to compensate the reference levels.

    摘要翻译: 定时恢复装置包括均衡器,用于对经过交错NRZI的数字数据信号进行均衡,使得数字数据信号具有部分响应(1,0,-1),两个比较器,用于将均衡数据信号与两个不同的参考电平进行比较,两个比较器 相位比较部分,用于分别检测比较器的输出和再生时钟信号之间的相位差,用于对相位比较器的输出求和的加法器和用于根据加法器的输出产生再生时钟信号的VCO。 该定时恢复装置与两个不同的相位比较器进行相位比较,并且对两个不同相位比较器的输出之和执行PLL控制,使得时钟信号不受数据信号的数据模式的影响。 自动切片装置包括均衡器,用于对经过交织的NRZI的数字数据信号进行均衡,两个比较器被提供参考电平,定时恢复装置响应于再现的时钟信号检测均衡器的输出的幅度,以补偿 参考水平