公开(公告)号：US09054678B2

公开(公告)日：2015-06-09

申请号：US13928590

申请日：2013-06-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru ,  Hidetomo Kobayashi

IPC: H01L25/00 ,  H03K3/012 ,  G11C5/00 ,  H03K3/356 ,  H01L27/108 ,  H01L27/12 ,  H01L27/115

CPC classification number: H03K17/687 ,  G11C5/005 ,  G11C5/148 ,  G11C11/403 ,  G11C11/4076 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/1207 ,  H03K3/012 ,  H03K3/356008

Abstract: A novel semiconductor device and a driving method thereof are provided. In the semiconductor device, a (volatile) node which holds data that is rewritten by arithmetic processing as appropriate and a node in which the data is stored are electrically connected through a source and a drain of a transistor whose channel is formed in an oxide semiconductor layer. The off-state current value of the transistor is extremely low. Therefore, electric charge scarcely leaks through the transistor from the latter node, and thus data can be held in the latter node even in a period during which supply of power source voltage is stopped. In the semiconductor device, a means of setting the potential of the latter node to a predetermined potential is provided. Specifically, a means of supplying a potential corresponding to “1” or “0” that is data stored in the latter node from the former node is provided.

Abstract translation: 提供了一种新颖的半导体器件及其驱动方法。 在半导体器件中，通过适当的算术处理保存的数据和存储数据的节点的（易失性）节点通过其沟道形成在氧化物半导体中的晶体管的源极和漏极电连接 层。 晶体管的截止电流值极低。 因此，即使在停止供给电源电压的期间，电荷几乎不会从后一个节点通过晶体管泄漏，因此数据也可以被保持在后一个节点中。 在半导体装置中，提供将后一个节点的电位设定为预定电位的装置。 具体地说，提供了从前一个节点提供与后一个节点中存储的数据相对应的“1”或“0”的电位的装置。

公开(公告)号：US09024669B2

公开(公告)日：2015-05-05

申请号：US14068217

申请日：2013-10-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru ,  Masami Endo

IPC: H03K3/356 ,  H01L27/108 ,  G11C11/24 ,  H01L29/26

CPC classification number: H01L27/1052 ,  G06F1/3275 ,  G11C11/24 ,  G11C14/0009 ,  G11C19/184 ,  H01L23/5226 ,  H01L27/0629 ,  H01L27/108 ,  H01L27/10805 ,  H01L27/10897 ,  H01L28/20 ,  H01L28/40 ,  H01L29/24 ,  H01L29/26 ,  H01L29/7869 ,  Y02D10/13 ,  Y02D10/14

Abstract: A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.

Abstract translation: 提供能够抑制功耗的信号处理电路。 在不向存储元件提供电源电压的期间中，存储在与非易失性存储器相对应的第一存储电路中的数据可以由设置在第二存储电路中的第一电容器保持。 通过使用在氧化物半导体层中形成沟道的晶体管，保持在第一电容器中的信号被保持很长时间。 因此，存储元件也可以在停止供给电源电压的期间保持存储的内容（数据）。 可以将由第一电容器保持的信号转换为与第二晶体管的状态（导通状态或截止状态）对应的信号，并从第二存储电路读取。 因此，可以准确地读取原始信号。

公开(公告)号：US08981367B2

公开(公告)日：2015-03-17

申请号：US13683029

申请日：2012-11-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi Yoneda ,  Takuro Ohmaru

IPC: H01L29/78

CPC classification number: H01L27/1251 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/045 ,  H01L29/78 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78648 ,  H01L29/7869

Abstract: A semiconductor device includes a first transistor which includes a first gate electrode below its oxide semiconductor layer and a second gate electrode above its oxide semiconductor layer, and a second transistor which includes a first gate electrode above its oxide semiconductor layer and a second gate electrode below its oxide semiconductor layer and is provided so as to at least partly overlap with the first transistor. In the semiconductor device, a conductive film serving as the second gate electrode of the first transistor and the second gate electrode of the second transistor is shared between the first transistor and the second transistor. Note that the second gate electrode not only controls the threshold voltages (Vth) of the first transistor and the second transistor but also has an effect of reducing interference of an electric field applied from respective first gate electrodes of the first transistor and the second transistor.

Abstract translation: 半导体器件包括：第一晶体管，其包括在其氧化物半导体层下方的第一栅极电极和位于其氧化物半导体层上方的第二栅电极;以及第二晶体管，其在其氧化物半导体层上方包括第一栅极电极和第二栅电极， 其氧化物半导体层被设置成至少部分地与第一晶体管重叠。 在半导体器件中，用作第一晶体管的第二栅电极的导电膜和第二晶体管的第二栅电极在第一晶体管和第二晶体管之间共用。 注意，第二栅电极不仅控制第一晶体管和第二晶体管的阈值电压（Vth），而且还具有减小从第一晶体管和第二晶体管的各个第一栅电极施加的电场的干扰的效果。

公开(公告)号：US08704221B2

公开(公告)日：2014-04-22

申请号：US13716924

申请日：2012-12-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiichi Yoneda ,  Takuro Ohmaru

IPC: H01L29/12

CPC classification number: H01L27/1255 ,  H01L27/0688 ,  H01L27/108 ,  H01L27/10873 ,  H01L27/1225 ,  H01L28/60

Abstract: A semiconductor device with high productivity and high yield is provided. The semiconductor device includes a word line, a capacitor line, a first bit line, a second bit line, and a first transistor and a second transistor each of which includes a gate, a source, and a drain. The first transistor and the second transistor at least partly overlap with each other, and the gates of the first transistor and the second transistor are connected to the word line. A capacitor is formed between at least part of the capacitor line and each of the drains of the first transistor and the second transistor. The first bit line is connected to the source of the first transistor, and the second bit line is connected to the source of the second transistor.

Abstract translation: 提供了高生产率和高产量的半导体器件。 半导体器件包括字线，电容线，第一位线，第二位线，以及包括栅极，源极和漏极的第一晶体管和第二晶体管。 第一晶体管和第二晶体管彼此至少部分重叠，并且第一晶体管和第二晶体管的栅极连接到字线。 电容器形成在电容器线的至少一部分与第一晶体管和第二晶体管的漏极中的每一个之间。 第一位线连接到第一晶体管的源极，第二位线连接到第二晶体管的源极。

公开(公告)号：US20140048802A1

公开(公告)日：2014-02-20

申请号：US14068217

申请日：2013-10-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru ,  Masami Endo

IPC: H01L27/108 ,  H01L29/26

CPC classification number: H01L27/1052 ,  G06F1/3275 ,  G11C11/24 ,  G11C14/0009 ,  G11C19/184 ,  H01L23/5226 ,  H01L27/0629 ,  H01L27/108 ,  H01L27/10805 ,  H01L27/10897 ,  H01L28/20 ,  H01L28/40 ,  H01L29/24 ,  H01L29/26 ,  H01L29/7869 ,  Y02D10/13 ,  Y02D10/14

Abstract: A signal processing circuit whose power consumption can be suppressed is provided. In a period during which a power supply voltage is not supplied to a storage element, data stored in a first storage circuit corresponding to a nonvolatile memory can be held by a first capacitor provided in a second storage circuit. With the use of a transistor in which a channel is formed in an oxide semiconductor layer, a signal held in the first capacitor is held for a long time. The storage element can accordingly hold the stored content (data) also in a period during which the supply of the power supply voltage is stopped. A signal held by the first capacitor can be converted into the one corresponding to the state (the on state or off state) of the second transistor and read from the second storage circuit. Consequently, an original signal can be accurately read.

Abstract translation: 提供能够抑制功耗的信号处理电路。 在不向存储元件提供电源电压的期间中，存储在与非易失性存储器相对应的第一存储电路中的数据可以由设置在第二存储电路中的第一电容器保持。 通过使用在氧化物半导体层中形成沟道的晶体管，保持在第一电容器中的信号被保持很长时间。 因此，存储元件也可以在停止供给电源电压的期间保持存储的内容（数据）。 可以将由第一电容器保持的信号转换为与第二晶体管的状态（导通状态或截止状态）对应的信号，并从第二存储电路读取。 因此，可以准确地读取原始信号。

公开(公告)号：US10992891B2

公开(公告)日：2021-04-27

申请号：US16529135

申请日：2019-08-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru ,  Naoto Kusumoto ,  Kentaro Hayashi

IPC: H04N5/3745 ,  H01L27/146 ,  H04N5/232 ,  H04N5/347 ,  H04N5/369

Abstract: An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.

公开(公告)号：US10917597B2

公开(公告)日：2021-02-09

申请号：US16812441

申请日：2020-03-09

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Takuro Ohmaru ,  Naoto Kusumoto

IPC: H04N5/225 ,  H04N5/3745 ,  H01L31/0272

Abstract: An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A node AN (a first charge retention portion), a node FD (a second charge retention portion), and a node FDX (the charge detection portion) are provided. Imaging data obtained in the node AN is transferred to the node FD, and the imaging data is sequentially transferred from the node FD to the node FDX to be read.

公开(公告)号：US10199411B2

公开(公告)日：2019-02-05

申请号：US15887033

申请日：2018-02-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru

IPC: H01L27/146 ,  H04N5/3745 ,  H04N5/355 ,  H04N5/232 ,  H04N5/353 ,  H04N5/369 ,  H04N5/374

Abstract: An imaging device whose dynamic range is broadened is provided. The imaging device includes a pixel including a first photoelectric conversion element and a first circuit including a second photoelectric conversion element. The first circuit switches the operation mode of the pixel to a normal imaging mode or a wide dynamic range mode and switches the operation region of the first photoelectric conversion element to a normal region or an avalanche region in accordance with the illuminance of light with which the second photoelectric conversion element is irradiated. When the illuminance of light with which the first photoelectric conversion element is irradiated is increased, the increase rate of a writing current flowing to the pixel is higher in the avalanche region than in the normal region. However, in the wide dynamic range mode, the increase rate of current can be lowered, and thus the dynamic range can be broadened.

公开(公告)号：US10163948B2

公开(公告)日：2018-12-25

申请号：US15211113

申请日：2016-07-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuro Ohmaru

IPC: H01L29/10 ,  H01L27/146 ,  H01L29/786 ,  H01L31/0272 ,  H04N5/3745 ,  H04N5/378

Abstract: An imaging device capable of obtaining high-quality imaging data is provided. The imaging device can correct variation in the threshold voltage of amplifier transistors included in pixel circuits. The amplifier transistor includes two gates facing each other with a channel formation region provided therebetween. The amplifier transistor operates in such a manner that one of the gates holds a potential for correcting variation in the threshold voltage and the other thereof is supplied with a potential corresponding to imaging data.

公开(公告)号：US10134789B2

公开(公告)日：2018-11-20

申请号：US14746926

申请日：2015-06-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa ,  Hiroki Inoue ,  Takuro Ohmaru

IPC: H01L27/146 ,  H01L29/786 ,  H01L31/105 ,  H01L31/0272

Abstract: An imaging device with high productivity and improved dynamic range is provided. The imaging device includes a pixel driver circuit and a photoelectric conversion element including a p-type semiconductor, an n-type semiconductor, and an i-type semiconductor. In a plan view, the total area of a part of the i-type semiconductor overlapped with neither a metal material nor a semiconductor material constituting the pixel driver circuit is preferably greater than or equal to 65%, more preferably greater than or equal to 80%, and still more preferably greater than or equal to 90% of the area of the whole i-type semiconductor. Plural photoelectric conversion elements are provided in the same semiconductor, whereby a process for separating the photoelectric conversion elements can be omitted. The i-type semiconductors in the plural photoelectric conversion elements are separated from each other by the p-type semiconductor or the n-type semiconductor.