公开(公告)号：US20150364513A1

公开(公告)日：2015-12-17

申请号：US14731954

申请日：2015-06-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hironobu TAKAHASHI ,  Yukinori SHIMA ,  Kengo AKIMOTO ,  Junichi KOEZUKA ,  Naoto KUSUMOTO

IPC: H01L27/146 ,  H01L29/786

CPC classification number: H01L27/14616 ,  H01L27/1225 ,  H01L27/14632 ,  H01L27/14663

Abstract: An imaging device with high imaging quality capable of being manufactured at low cost is provided. The imaging device includes a first transistor, a second transistor, a third transistor, a fourth transistor, a photodiode, and a capacitor. Each of the first to the fourth transistors includes a first gate electrode and a second gate electrode, and the second gate electrode of each of the first to the fourth transistors and one electrode of the capacitor are electrically connected to an anode electrode of the photodiode.

Abstract translation: 提供了能够以低成本制造的具有高成像质量的成像装置。 成像装置包括第一晶体管，第二晶体管，第三晶体管，第四晶体管，光电二极管和电容器。 第一至第四晶体管中的每一个包括第一栅电极和第二栅电极，第一至第四晶体管中的每一个的第二栅电极和电容器的一个电极与光电二极管的阳极电连接。

公开(公告)号：US20150263174A1

公开(公告)日：2015-09-17

申请号：US14640379

申请日：2015-03-06

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Daisuke KUROSAKI ,  Masataka NAKADA

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/36 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78621 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: In a semiconductor device including a transistor, the transistor is provided over a first insulating film, and the transistor includes an oxide semiconductor film over the first insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode over the gate insulating film, a second insulating film over the oxide semiconductor film and the gate electrode, and a source and a drain electrodes electrically connected to the oxide semiconductor film. The first insulating film includes oxygen. The second insulating film includes hydrogen. The oxide semiconductor film includes a first region in contact with the gate insulating film and a second region in contact with the second insulating film. The first insulating film includes a third region overlapping with the first region and a fourth region overlapping with the second region. The impurity element concentration of the fourth region is higher than that of the third region.

Abstract translation: 在包括晶体管的半导体器件中，晶体管设置在第一绝缘膜上，并且晶体管包括在第一绝缘膜上的氧化物半导体膜，氧化物半导体膜上的栅极绝缘膜，栅极绝缘膜上的栅电极 ，在氧化物半导体膜和栅电极之上的第二绝缘膜，以及电连接到氧化物半导体膜的源极和漏极。 第一绝缘膜包括氧。 第二绝缘膜包括氢。 氧化物半导体膜包括与栅极绝缘膜接触的第一区域和与第二绝缘膜接触的第二区域。 第一绝缘膜包括与第一区域重叠的第三区域和与第二区域重叠的第四区域。 第四区域的杂质元素浓度高于第三区域的杂质元素浓度。

公开(公告)号：US20140291672A1

公开(公告)日：2014-10-02

申请号：US14220681

申请日：2014-03-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Masami JINTYOU ,  Yasutaka NAKAZAWA ,  Yukinori SHIMA

IPC: H01L27/12

Abstract: The stability of steps of processing a wiring formed using copper or the like is increased. The concentration of impurities in a semiconductor film is reduced. Electrical characteristics of a semiconductor device are improved. A semiconductor device includes a semiconductor film, a pair of first protective films in contact with the semiconductor film, a pair of conductive films containing copper or the like in contact with the pair of first protective films, a pair of second protective films in contact with the pair of conductive films on the side opposite the pair of first protective films, a gate insulating film in contact with the semiconductor film, and a gate electrode overlapping with the semiconductor film with the gate insulating film therebetween. In a cross section, side surfaces of the pair of second protective films are located on the outer side of side surfaces of the pair of conductive films.

Abstract translation: 处理使用铜等形成的布线的步骤的稳定性增加。 半导体膜中的杂质浓度降低。 提高了半导体器件的电气特性。 半导体器件包括半导体膜，与半导体膜接触的一对第一保护膜，与一对第一保护膜接触的包含铜等的一对导电膜，与第一保护膜接触的一对第二保护膜 一对导电膜位于与该对第一保护膜相对的一侧上，与该半导体膜接触的栅极绝缘膜以及与该半导体膜重叠的栅电极与该栅极绝缘膜之间。 在横截面中，一对第二保护膜的侧面位于一对导电膜的侧面的外侧。

公开(公告)号：US20250169175A1

公开(公告)日：2025-05-22

申请号：US18839558

申请日：2023-02-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu HOSAKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Masataka NAKADA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI

IPC: H10D84/85 ,  H10D30/01 ,  H10D30/67 ,  H10D86/01 ,  H10D86/40 ,  H10D86/60

Abstract: A novel semiconductor device is provided. The semiconductor device combines a lateral-channel transistor and a vertical-channel transistor. The lateral-channel transistor is employed as a p-channel transistor and the vertical-channel transistor is employed as an n-channel transistor to achieve a CMOS semiconductor device. An opening is provided in the insulating layer in a region overlapping with a gate electrode of the lateral-channel transistor, and the vertical-channel transistor is formed in the opening. An oxide semiconductor is used for a semiconductor layer of the vertical-channel transistor.

公开(公告)号：US20250148942A1

公开(公告)日：2025-05-08

申请号：US19018661

申请日：2025-01-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yukinori SHIMA ,  Masami JINTYOU

IPC: G09F9/30 ,  H10D30/67 ,  H10K50/00 ,  H10K59/00

Abstract: A semiconductor device that can be highly integrated is provided.
The semiconductor device includes a semiconductor layer, a first insulating layer, a second insulating layer, a third insulating layer, and a first conductive layer. The third insulating layer is positioned over the semiconductor layer and includes a first opening over the semiconductor layer. The first conductive layer is positioned over the semiconductor layer, the first insulating layer is positioned between the first conductive layer and the semiconductor layer, and the second insulating layer is provided in a position that is in contact with a side surface of the first opening, the semiconductor layer, and the first insulating layer. The semiconductor layer includes a first portion overlapping with the first insulating layer, a pair of second portions between which the first portion is sandwiched and which overlap with the second insulating layer, and a pair of third portions between which the first portion and the pair of second portions are sandwiched and which overlap with neither the first insulating layer nor the second insulating layer. The first portion has a smaller width than the first opening and has a thinner shape of the semiconductor layer than the second portions, and the second portions have a thinner shape of the semiconductor layer than the third portions.

公开(公告)号：US20250098439A1

公开(公告)日：2025-03-20

申请号：US18729577

申请日：2023-01-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yasuharu HOSAKA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Masataka NAKADA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI

IPC: H10K59/124 ,  H10K59/123

Abstract: A display apparatus with high definition is provided. The display apparatus includes a transistor, a light-emitting device and a first insulating layer. The transistor includes a semiconductor layer, first to third conductive layers, and second and third insulating layers. The second insulating layer is provided over the first conductive layer and includes a first opening reaching the first conductive layer. The second conductive layer is provided over the second insulating layer and includes a second opening in a region overlapping with the first opening. The semiconductor layer is in contact with the top surface of the first conductive layer, the side surface of the second insulating layer, and the top surface and the side surface of the second conductive layer. The third insulating layer is provided over the semiconductor layer. The third conductive layer is provided over the third insulating layer. The first insulating layer is provided over the transistor. The first insulating layer and the third insulating layer include a third opening reaching the second conductive layer. The light-emitting device is provided over the first insulating layer and includes a pixel electrode, a common electrode, and an EL layer. The pixel electrode is electrically connected to the second conductive layer through the third opening. The EL layer includes a region in contact with the top surface and the side surface of the pixel electrode.

公开(公告)号：US20240407211A1

公开(公告)日：2024-12-05

申请号：US18695104

申请日：2022-09-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Masahiro KATAYAMA ,  Yukinori SHIMA ,  Masataka NAKADA ,  Shingo EGUCHI ,  Daiki NAKAMURA ,  Koji KUSUNOKI ,  Kensuke YOSHIZUMI

IPC: H10K59/131 ,  H10K50/19 ,  H10K59/38

Abstract: A display device in which a voltage drop is inhibited adequately is provided. The display device includes a common electrode included in a first light-emitting device in which a plurality of light-emitting layers are stacked and a second light-emitting device in which a plurality of light-emitting layers are stacked and an auxiliary wiring electrically connected to the common electrode. The auxiliary wiring includes a first wiring layer and a second wiring layer, the second wiring layer is electrically connected to the first wiring layer through a contact hole of an insulating layer, and the first wiring laver has a lattice shape in a top view.

公开(公告)号：US20240213356A1

公开(公告)日：2024-06-27

申请号：US18402852

申请日：2024-01-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Masami JINTYOU ,  Yukinori SHIMA

IPC: H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  H01L29/49 ,  H01L29/786

CPC classification number: H01L29/66969 ,  H01L21/02326 ,  H01L21/0234 ,  H01L21/02472 ,  H01L21/02483 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02573 ,  H01L21/0262 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/4966 ,  H01L29/78621 ,  H01L29/7869

Abstract: Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.

公开(公告)号：US20240152012A1

公开(公告)日：2024-05-09

申请号：US18415901

申请日：2024-01-18

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yasuharu HOSAKA ,  Yukinori SHIMA ,  Kenichi OKAZAKI ,  Shunpei YAMAZAKI

IPC: G02F1/1368 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1337 ,  G02F1/1345 ,  G02F1/1362 ,  H01L27/12

CPC classification number: G02F1/1368 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/1337 ,  G02F1/13454 ,  G02F1/136227 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248

Abstract: The display device includes a first substrate provided with a driver circuit region that is located outside and adjacent to a pixel region and includes at least one second transistor which supplies a signal to the first transistor in each of the pixels in the pixel region, a second substrate facing the first substrate, a liquid crystal layer between the first substrate and the second substrate, a first interlayer insulating film including an inorganic insulating material over the first transistor and the second transistor, a second interlayer insulating film including an organic insulating material over the first interlayer insulating film, and a third interlayer insulating film including an inorganic insulating material over the second interlayer insulating film. The third interlayer insulating film is provided in part of an upper region of the pixel region, and has an edge portion on an inner side than the driver circuit region.

公开(公告)号：US20240105734A1

公开(公告)日：2024-03-28

申请号：US18531767

申请日：2023-12-07

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Junichi KOEZUKA ,  Yasutaka NAKAZAWA ,  Yukinori SHIMA ,  Masami JINTYOU ,  Masayuki SAKAKURA ,  Motoki NAKASHIMA

IPC: H01L27/12

CPC classification number: H01L27/1225

Abstract: The stability of a step of processing a wiring formed using copper, aluminum, gold, silver, molybdenum, or the like is increased. Moreover, the concentration of impurities in a semiconductor film is reduced. Moreover, the electrical characteristics of a semiconductor device are improved. In a transistor including an oxide semiconductor film, an oxide film in contact with the oxide semiconductor film, and a pair of conductive films being in contact with the oxide film and including copper, aluminum, gold, silver, molybdenum, or the like, the oxide film has a plurality of crystal parts and has c-axis alignment in the crystal parts, and the c-axes are aligned in a direction parallel to a normal vector of a top surface of the oxide semiconductor film or the oxide film.