METHOD OF EXECUTING DATA SCRUBBING INSIDE A SMART STORAGE DEVICE

    公开(公告)号:US20180039437A1

    公开(公告)日:2018-02-08

    申请号:US15275337

    申请日:2016-09-23

    Abstract: A secure memory (145) is disclosed. The memory (145) may include data storage (310, 315, 320, 325, 330, 335, 340, 345) for data, along with a data read logic (405) and a data write logic (410) to read and write data from the data storage (310, 315, 320, 325, 330, 335, 340, 345). A password storage (355) may store a stored password (510). A receiver may receive a received password (505) from a memory controller (205). A comparator may compare the received password (505) with the stored password (510). An erase logic (435) may erase data in the data storage (310, 315, 320, 325, 330, 335, 340, 345) if the received password (505) does not match the stored password (510). Finally, a block logic (425) may block access to the memory (145) from the memory controller (205) until after the comparator (430) completes its operation.

    COST-EFFECTIVE SOLID STATE DISK DATA PROTECTION METHOD FOR HOT REMOVAL EVENT

    公开(公告)号:US20230288974A1

    公开(公告)日:2023-09-14

    申请号:US18200562

    申请日:2023-05-22

    CPC classification number: G06F1/30 G06F1/28 G06F3/0679 G06F3/0659 G06F3/0604

    Abstract: A system is disclosed that provides emergency backup power to a solid-state drive (SSD) that may not contain any internal supercapacitors. The SSD may include a first connector and a hold-up power supply. The first connector may have a predetermined form factor and may being capable of being connected to a corresponding connector of a midplane of a storage system. The first connector may include a main power connection that is connected to a main power supply of the midplane if the first connector is connected to the corresponding connector of the midplane. The hold-up power supply may be internal to the SSD, and may receive hold-up energy from an external energy source for a predetermined amount of time after the first connector has been disconnected from the main power connection of the midplane so that the SSD may store any host data write requests that the SSD has acknowledged.

    HIGH-SPEED DATA TRANSFERS THROUGH STORAGE DEVICE CONNECTORS

    公开(公告)号:US20230074672A1

    公开(公告)日:2023-03-09

    申请号:US17986883

    申请日:2022-11-14

    Abstract: Data storage systems, devices and methods may use a switch board configured to communicate using a high-speed multi-level signaling protocol, and a midplane having one or more multi-protocol storage device connectors configured to couple the midplane to one or more storage devices, wherein the midplane may be coupled to the switch board and configured to enable the one or more storage devices to communicate with the switch board through the one or more multi-protocol storage device connectors using the high-speed multi-level signaling protocol. The midplane may be coupled to the switch board through one or more high-speed connectors. One or more re-timers may be coupled between one or more of the high-speed connectors and one or more of the multi-protocol storage device connectors. One or more cables may be used to transfer data to and from the multi-protocol storage device connectors.

    SYSTEM AND METHOD FOR DETECTING MALICIOUS SOFTWARE IN NVME OVER FABRICS DEVICES

    公开(公告)号:US20220129549A1

    公开(公告)日:2022-04-28

    申请号:US17567865

    申请日:2022-01-03

    Abstract: A system and a method to detect malicious software written to an Ethernet solid-state drive (eSSD). The system includes an Ethernet switch, at least one SSD, and a baseboard management controller (BMC). The Ethernet switch receives write data from a communication network in response to a write command. The at least one SSD receives the write data from the Ethernet switch and stores the received write data. The BMC receives from the at least one SSD the received write data. The BMC determines whether the received write data contains malicious software. The received write data may be contained in a plurality of Ethernet packets in which case the BMC stores the received write data in a scan buffer in an order that is based on an assembled order of the received write data.

    DEVICES CAPABLE OF DETECTING AND ALLOCATING POWER AND ASSOCIATED METHOD

    公开(公告)号:US20210405733A1

    公开(公告)日:2021-12-30

    申请号:US17023360

    申请日:2020-09-16

    Abstract: A device capable of self-detecting and self-allocating additional power and associated method are disclosed. The device includes a first module to route current from first power pins to a voltage rail having the first voltage level. The device includes a second module coupled to second power pins associated with a second voltage level. The second module routes current from the second power pins to the voltage rail having the first voltage level via a connecting voltage rail. The method includes determining, by the device, whether or not a presence of unused power pins is detected. Based on the detection, the method includes calculating a total amount of available additional power, repurposing the unused power pins as actively used power pins, and updating a power budget value based on the total amount of available additional power. The device may dynamically allocate power to accelerators based on a power allocation table and the power budget value.

    MODULAR SYSTEM ARCHITECTURE FOR SUPPORTING MULTIPLE SOLID-STATE DRIVES

    公开(公告)号:US20210374085A1

    公开(公告)日:2021-12-02

    申请号:US17405770

    申请日:2021-08-18

    Abstract: A rack-mountable data storage system includes: a chassis including one or more switchboards; a midplane interfacing with the one or more switchboards; and one or more data storage devices removably coupled to the midplane using a connector. At least one data storage device of the one or more data storage devices include a logic device to interface with the midplane. The logic device provides a device-specific interface of a corresponding data storage device with the midplane. The at least one data storage device is configured using the logic device according to a first protocol based on a signal on a pin of the connector, and the at least one data storage device is reconfigurable according to a second protocol based on a change of the signal on the pin of the connector using the logic device.

Patent Agency Ranking