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252 条记录 (耗时 0.047 秒)

    V-shaped resonators for addition of broad-area laser diode arrays
    51.
    发明授权
    V-shaped resonators for addition of broad-area laser diode arrays 有权
    用于添加广域激光二极管阵列的V形谐振器

    公开(公告)号：US08340151B2

    公开(公告)日：2012-12-25

    申请号：US12966423

    申请日：2010-12-13

    申请人： Bo Liu ,  Yun Liu ,  Yehuda Y. Braiman

    发明人： Bo Liu ,  Yun Liu ,  Yehuda Y. Braiman

    IPC分类号： H01S3/08

    CPC分类号： G02B27/14

    摘要： A system and method for addition of broad-area semiconductor laser diode arrays are described. The system can include an array of laser diodes, a V-shaped external cavity, and grating systems to provide feedback for phase-locking of the laser diode array. A V-shaped mirror used to couple the laser diode emissions along two optical paths can be a V-shaped prism mirror, a V-shaped stepped mirror or include multiple V-shaped micro-mirrors. The V-shaped external cavity can be a ring cavity. The system can include an external injection laser to further improve coherence and phase-locking.

    摘要翻译： 描述了用于添加广域半导体激光二极管阵列的系统和方法。 该系统可以包括激光二极管阵列，V形外腔和光栅系统，为激光二极管阵列的相位锁定提供反馈。 用于将激光二极管发射沿着两个光学路径耦合的V形镜可以是V形棱镜，V形阶梯镜或者包括多个V形微镜。 V形外腔可以是环形腔。 该系统可以包括外部注入激光器，以进一步提高相干性和相位锁定。

    Bit Scan Circuits and Method in Non-volatile Memory
    52.
    发明申请
    Bit Scan Circuits and Method in Non-volatile Memory 有权
    位扫描电路和非易失性存储器中的方法

    公开(公告)号：US20120321032A1

    公开(公告)日：2012-12-20

    申请号：US13164618

    申请日：2011-06-20

    申请人： Bo Liu ,  Jongmin Park ,  Chen Chen ,  Tien-chien Kuo

    发明人： Bo Liu ,  Jongmin Park ,  Chen Chen ,  Tien-chien Kuo

    IPC分类号： H03K23/40

    CPC分类号： G11C29/40 ,  G11C29/44

    摘要： A circuit for counting in an N-bit string a number of bits M, having a first binary value includes N latch circuits in a daisy chain where each latch circuit has a tag bit that controls each to be either in a no-pass or pass state. Initially the tag bits are set according to the bits of the N-bit string where the first binary value corresponds to a no-pass state. A clock signal having a pulse train is run through the daisy chain to “interrogate” any no-pass latch circuits. It races right through any pass latch circuit. However, for a no-pass latch circuit, a leading pulse while being blocked also resets after a pulse period the tag bit from “no-pass” to “pass” state to allow subsequent pulses to pass. After all no-pass latch circuits have been reset, M is given by the number of missing pulses from the pulse train.

    摘要翻译： 用于以N位串计数具有第一二进制值的位数M的电路包括菊花链中的N个锁存电路，其中每个锁存电路具有控制每个锁存电路处于非通过或通过状态的标签位 州。 最初，标签位根据N位串的位进行设置，其中第一个二进制值对应于无通状态。 具有脉冲串的时钟信号通过菊花链行进，以询问任何无通路锁存电路。 它可以通过任何通过锁存电路进行比赛。 然而，对于无通路锁存电路，被阻塞的前导脉冲也在标签位从不通过到通过状态的脉冲周期之后复位，以允许随后的脉冲通过。 在所有无通路锁存电路复位之后，M由脉冲序列的丢失脉冲数给出。

    Structure and method for shuffling data within non-volatile memory devices
    55.
    发明授权
    Structure and method for shuffling data within non-volatile memory devices 有权
    在非易失性存储器件内混洗数据的结构和方法

    公开(公告)号：US08102705B2

    公开(公告)日：2012-01-24

    申请号：US12635449

    申请日：2009-12-10

    申请人： Bo Liu ,  Yan Li ,  Alexander Kwok-Tung Mak ,  Chi-Ming Wang ,  Eugene Jinglun Tam ,  Kwang-ho Kim

    发明人： Bo Liu ,  Yan Li ,  Alexander Kwok-Tung Mak ,  Chi-Ming Wang ,  Eugene Jinglun Tam ,  Kwang-ho Kim

    IPC分类号： G11C16/04 ,  G11C7/10

    CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C16/34 ,  G11C2211/5641 ,  G11C2211/5642

    摘要： Techniques for the reading and writing of data in multi-state non-volatile memories are described. Data is written into the memory in a binary format, read into the data registers on the memory, and “folded” within the registers, and then written back into the memory in a multi-state format. In the folding operation, binary data from a single word line is folded into a multi-state format and, when rewritten in multi-state form, is written into a only a portion of another word line. A corresponding reading technique, where the data is “unfolded” is also described. The techniques further allow for the data to be encoded with an error correction code (ECC) on the controller that takes into account its eventual multi-state storage prior to transferring the data to the memory to be written in binary form. A register structure allowing such a “folding” operation is also presented. One set of embodiments include a local internal data bus that allows data to between the registers of different read/write stacks, where the internal bus can used in the internal data folding process.

    摘要翻译： 描述用于在多状态非易失性存储器中读取和写入数据的技术。 数据以二进制格式写入存储器，读入存储器中的数据寄存器，并在寄存器内“折叠”，然后以多状态格式写入存储器。 在折叠操作中，来自单个字线的二进制数据被折叠为多状态格式，并且当以多状态形式重写时，被写入另一个字线的仅一部分。 还描述了数据“展开”的相应的读取技术。 这些技术还允许在控制器上用纠错码（ECC）对数据进行编码，该错误校正码在将数据传送到存储器以二进制形式写入之前考虑其最终的多状态存储。 还提出了允许这种“折叠”操作的寄存器结构。 一组实施例包括本地内部数据总线，其允许在不同读/写堆栈的寄存器之间的数据，其中内部总线可以在内部数据折叠处理中使用。

    Top-mounted digital-control tower pumping unit
    56.
    发明申请
    Top-mounted digital-control tower pumping unit 有权
    顶级数控塔式抽油机

    公开(公告)号：US20110250081A1

    公开(公告)日：2011-10-13

    申请号：US13132898

    申请日：2009-06-10

    申请人： Hongwei Mao ,  Bo Liu

    发明人： Hongwei Mao ,  Bo Liu

    IPC分类号： F04B19/04

    CPC分类号： F04B47/02 ,  E21B43/126

    摘要： A top-mounted digital-control tower pumping unit includes a tower frame (1), a power system (2), a drive system, a control system (3), a balance weight box (4), a balance weight positioning cable (5), a driving cable (6), a plurality of cable hangers (7) and a guide wheel mechanism, wherein the guide wheel mechanism is fixed on an operation platform by a rotating shaft, so that the top-mounted digital-control tower pumping unit of the present invention has the advantages of simple structure, convenient maintenance and so on.

    摘要翻译： 一种顶部安装的数字控制塔泵单元包括塔架（1），动力系统（2），驱动系统，控制系统（3），平衡重箱（4），平衡重定位缆索 5），驱动电缆（6），多个电缆吊架（7）和导轮机构，其中导轮机构通过旋转轴固定在操作平台上，使得顶部安装的数字控制塔 本发明的抽油机具有结构简单，维修方便等优点。