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公开(公告)号:US11245005B2
公开(公告)日:2022-02-08
申请号:US16868625
申请日:2020-05-07
Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Inventor: Ta-Chun Lin , Kuo-Hua Pan , Jhon-Jhy Liaw , Chao-Ching Cheng , Hung-Li Chiang , Shih-Syuan Huang , Tzu-Chiang Chen , I-Sheng Chen , Sai-Hooi Yeong
IPC: H01L29/76 , H01L31/113 , H01L29/06 , H01L29/78 , H01L29/66 , H01L21/02 , H01L21/8234 , H01L21/8238 , H01L27/088 , H01L27/092 , H01L29/423
Abstract: Methods for forming semiconductor structures are provided. The method includes alternately stacking first semiconductor layers and second semiconductor layers over a substrate and patterning the first semiconductor layers and the second semiconductor layers to form a first fin structure. The method further includes forming a first trench in the first fin structure and forming a first source/drain structure in the first trench. The method further includes partially removing the first source/drain structure to form a second trench in the first source/drain structure and forming a first contact in the second trench.
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公开(公告)号:US11037831B2
公开(公告)日:2021-06-15
申请号:US16737447
申请日:2020-01-08
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/311 , H01L29/66 , H01L21/3105
Abstract: A semiconductor structure includes a fin active region extruded from a semiconductor substrate; and a gate stack disposed on the fin active region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. The gate dielectric layer includes a first dielectric material. The semiconductor structure further includes a dielectric gate of a second dielectric material disposed on the fin active region. The gate dielectric layer extends from a sidewall of the gate electrode to a sidewall of the dielectric gate. The second dielectric material is different from the first dielectric material in composition.
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公开(公告)号:US10998237B2
公开(公告)日:2021-05-04
申请号:US16853474
申请日:2020-04-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ta-Chun Lin , Buo-Chin Hsu , Kuo-Hua Pan , Jhon Jhy Liaw , Chih-Yung Lin
IPC: H01L21/8234 , H01L27/088 , H01L29/06 , H01L21/311 , H01L29/66 , H01L21/3105
Abstract: A semiconductor structure includes a fin active region extruded from a semiconductor substrate; and a gate stack disposed on the fin active region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. The gate dielectric layer includes a first dielectric material. The semiconductor structure further includes a dielectric gate of a second dielectric material disposed on the fin active region. The gate dielectric layer extends from a sidewall of the gate electrode to a sidewall of the dielectric gate. The second dielectric material is different from the first dielectric material in composition.
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公开(公告)号:US09805970B2
公开(公告)日:2017-10-31
申请号:US15364955
申请日:2016-11-30
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Tai-I Yang , Jung-I Lin , Ta-Chun Lin , Tien-Lu Lin , Chen-Jong Wang
IPC: H01L21/764 , H01L27/146 , H01L27/092 , H01L29/94 , H01L21/768 , H01L21/762 , H01L21/8234 , H01L21/8238 , H01L27/12
CPC classification number: H01L21/764 , H01L21/76224 , H01L21/76227 , H01L21/76289 , H01L21/7682 , H01L21/76834 , H01L21/823481 , H01L21/823878 , H01L27/0921 , H01L27/1203 , H01L27/14612 , H01L27/1463 , H01L27/14632 , H01L27/14643 , H01L27/14654 , H01L27/14689 , H01L29/945
Abstract: A method for manufacturing an image sensor with deep trench spacing isolation is provided. A trench is formed in a semiconductor substrate, around and between a plurality of pixel regions of the semiconductor substrate. A cap is formed using epitaxy to seal a gap between sidewalls of the trench. Pixel sensors corresponding to the plurality of pixel regions are formed over or within the corresponding pixel regions. An image sensor resulting from the method is also provided.
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