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公开(公告)号：US20100239024A1
公开(公告)日：2010-09-23
申请号：US12743033
申请日：2008-11-14
IPC分类号： H04N7/12
CPC分类号： H04N19/436 , H04N19/44 , H04N19/51 , H04N19/52 , H04N19/61
摘要： To decode coded pictures each of which has dependencies within the picture, using conventional decoding circuits and without deteriorating the efficiency in parallel processing.An image decoding device (100) includes: a stream segmentation unit (110) which segments a bit stream such that each of the coded pictures are segmented into two areas; and decoding processing units (120, 130) each of which decodes a corresponding one of the two segmented bit streams. The respective decoding processing units (120, 130) include: decoding units (123, 133) each of which generates decoded data including pixel data and control data; transfer determination units (124, 134) each of which determines whether or not the decoded data is referred to in another one of the processing units; data transfer units (125, 135) each of which transfers decoded data to the other processing unit; and decoding determination units (122, 132) each of which determines whether or not the decoded data to be referred to has been obtained. Each of the decoding units (123, 133) decodes a corresponding one of the segmented bit streams when reference decoded data has been obtained.
摘要翻译： 为了解码每个图像中具有依赖性的编码图像，使用传统的解码电路并且不降低并行处理的效率。 图像解码装置（100）包括：流分割单元（110），其分割位流，使得每个编码图像被分割成两个区域; 以及解码处理单元（120,130），每个解码处理单元解码两个分段比特流中的对应的一个。 相应的解码处理单元（120,130）包括：解码单元（123,133），每个解码单元生成包括像素数据和控制数据的解码数据; 转移确定单元（124,134），每个确定单元确定在另一个处理单元中是否参考解码数据; 数据传送单元（125,135），每个数据传送单元将解码的数据传送到另一个处理单元; 以及解码确定单元（122,132），每个解码确定单元确定是否已经获得了要被提及的解码数据。 当已经获得参考解码数据时，解码单元（123,133）中的每一个解码对应的一个分段比特流。
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公开(公告)号：US20100133237A1
公开(公告)日：2010-06-03
申请号：US11883999
申请日：2006-10-24
申请人： Yasuo Onodera , Tatsushi Sato , Yoshikazu Ukai , Takashi Hashimoto , Koichiro Hattori , Hisashi Yamada
发明人： Yasuo Onodera , Tatsushi Sato , Yoshikazu Ukai , Takashi Hashimoto , Koichiro Hattori , Hisashi Yamada
IPC分类号： B23H1/02
摘要： A wire-discharge machining apparatus controls a short circuit between a wire electrode and a workpiece and wire-breakage, and makes it easy to improve productivity, by performing power supply control to mix an upper-side power supply state in which a high-frequency pulse voltage is applied from an upper-side power supplying unit, a lower-side power supply state in which the high-frequency pulse voltage is applied from a lower-side power supplying unit, and a both-sides power supply state in which the high-frequency pulse voltage is applied to the wire electrode from both power supplying units in synchronization with each other during a period of electric discharge machining.
摘要翻译： 放线加工装置控制线电极和工件之间的短路以及断线，并且通过进行电源控制来容易地提高生产率，以混合高频率的上侧电源状态 从上侧供电单元施加脉冲电压，从下侧供电单元向其施加高频脉冲电压的下侧电源状态，以及双侧供电状态， 在放电加工期间，高频脉冲电压从两个供电单元同时施加到线电极上。
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公开(公告)号：US20100084378A1
公开(公告)日：2010-04-08
申请号：US12445207
申请日：2006-10-24
申请人： Yasuo Onodera , Tatsushi Sato , Takashi Hashimoto , Hisashi Yamada , Koichiro Hattori , Yoshikazu Ukai
发明人： Yasuo Onodera , Tatsushi Sato , Takashi Hashimoto , Hisashi Yamada , Koichiro Hattori , Yoshikazu Ukai
IPC分类号： B23H1/02
CPC分类号： B23H7/04
摘要： A machining-energy calculating unit accumulates a discharge current value for each discharge position to calculate a machining energy in a certain time period from the present time to the past time. An energy-distribution changing unit determines the presence or absence of imbalance in the energy by obtaining a machining energy distribution in an up-down direction of the machining gap based on the machining energy, and when there is imbalance, the energy-distribution changing unit produces a new open/close pattern in which a machining energy distribution that eliminates the imbalance. Power feeding is then performed based on the new open/close pattern.
摘要翻译： 加工能量计算单元累积针对每个排出位置的排出电流值，以计算从当前时间到过去时间的一定时间段内的加工能量。 能量分配改变单元通过基于加工能量获得加工间隙的上下方向的加工能量分布来确定能量的不平衡，并且当存在不平衡时，能量分配改变单元 产生新的开/关模式，其中消除不平衡的加工能量分布。 然后基于新的开/关模式进行供电。
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公开(公告)号：US20090256193A1
公开(公告)日：2009-10-15
申请号：US12490147
申请日：2009-06-23
申请人： YASUSHI ISHII , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
发明人： YASUSHI ISHII , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
IPC分类号： H01L29/792
CPC分类号： H01L27/115 , H01L21/823462 , H01L27/0629 , H01L27/0922 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L29/6653
摘要： In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.
摘要翻译： 在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。 控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于 存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构 同时作为控制栅极的电极材料膜8A。
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公开(公告)号：US07557005B2
公开(公告)日：2009-07-07
申请号：US11727591
申请日：2007-03-27
申请人： Yasushi Ishii , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
发明人： Yasushi Ishii , Takashi Hashimoto , Yoshiyuki Kawashima , Koichi Toba , Satoru Machida , Kozo Katayama , Kentaro Saito , Toshikazu Matsui
IPC分类号： H01L21/336
CPC分类号： H01L27/115 , H01L21/823462 , H01L27/0629 , H01L27/0922 , H01L27/105 , H01L27/11526 , H01L27/11546 , H01L27/11568 , H01L29/6653
摘要： In a semiconductor device which includes a split-gate type memory cell having a control gate and a memory gate, a low withstand voltage MISFET and a high withstand voltage MISFET, variations of the threshold voltage of the memory cell are suppressed. A gate insulating film of a control gate is thinner than a gate insulating film of a high withstand voltage MISFET, the control gate is thicker than a gate electrode 14 of the low withstand voltage MISFET and the ratio of thickness of a memory gate with respect to the gate length of the memory gate is larger than 1. The control gate and a gate electrode 15 are formed in a multilayer structure including an electrode material film 8A and an electrode material layer 8B, and the gate electrode 14 is a single layer structure formed at the same time as the electrode material film 8A of the control gate.
摘要翻译： 在包括具有控制栅极和存储器栅极的分离栅极型存储单元，低耐压MISFET和高耐压MISFET的半导体器件中，抑制了存储单元的阈值电压的变化。 控制栅极的栅极绝缘膜比高耐压MISFET的栅极绝缘膜薄，控制栅极比低耐压MISFET的栅电极14厚，存储栅的厚度比相对于 存储器栅极的栅极长度大于1.控制栅极和栅电极15形成为包括电极材料膜8A和电极材料层8B的多层结构，并且栅电极14是形成的单层结构 同时作为控制栅极的电极材料膜8A。
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公开(公告)号：US07519396B2
公开(公告)日：2009-04-14
申请号：US11182556
申请日：2005-07-15
申请人： Takashi Hashimoto
发明人： Takashi Hashimoto
摘要： The integrated circuit package according to the present invention comprises: a plurality of functioning units operable to perform processing on input data and output a result of the processing; a plurality of antenna units each of which is positioned to (i) receive radio-transmitted data from at least another one of the plurality of antenna units by radio and (ii) transmit data to at least another one of the plurality of antenna units by radio; a first switching unit operable to selectively connect output of a first functioning unit, which is one of the plurality of functioning units, and a first antenna unit, which is one of the plurality of antenna units; and a second switching unit operable to selectively connect a second antenna unit, which is positioned to receive the radio-transmitted data from the first antenna unit by radio, and input of a second functioning unit different from the first functioning unit.
摘要翻译： 根据本发明的集成电路封装包括：多个功能单元，用于对输入数据执行处理并输出处理结果; 多个天线单元，每个天线单元定位成（i）通过无线电从多个天线单元中的至少另一个天线单元接收无线电发送的数据;以及（ii）通过以下方式将数据发送到所述多个天线单元中的至少另一个天线单元 无线电; 第一切换单元，其可操作以选择性地连接作为所述多个功能单元中的一个的第一功能单元的输出和作为所述多个天线单元之一的第一天线单元; 以及第二切换单元，其可操作以选择性地连接第二天线单元，所述第二天线单元被定位成通过无线电从第一天线单元接收无线电发送的数据，以及与第一功能单元不同的第二功能单元的输入。
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公开(公告)号：US20090045423A1
公开(公告)日：2009-02-19
申请号：US12159919
申请日：2006-12-27
申请人： Takashi Hashimoto , Takaki Yasuda
发明人： Takashi Hashimoto , Takaki Yasuda
IPC分类号： H01L33/00
CPC分类号： H01L33/60 , H01L2224/13 , H01L2224/45144 , H01L2224/48091 , H01L2224/48465 , H01L2924/00014 , H01L2924/00
摘要： An object of the present invention is to provide a light-emitting device with a high output and a high efficiency by improving the efficiency for utilizing light emitted from a semiconductor light-emitting element.The inventive semiconductor light-emitting device comprises a package substrate, a sub-mount provided on the package substrate, a semiconductor light-emitting element provided on the sub-mount, and a reflector surrounding the sub-mount and the semiconductor light-emitting element, wherein the positions and sizes of the sub-mount, light-emitting element and reflector satisfy the following relationship (A) on a cross section perpendicular to the package substrate that passes through the center of the semiconductor light-emitting element, r−1s≦(hs−d)×(1s−1c)/hc (A) wherein r, 1s and 1c are distances from the drooping portion of the reflector, from the outer circumference of the sub-mount and from the outer circumference of the semiconductor light-emitting element to the center of the semiconductor light-emitting element, respectively, hs and d are heights of the sub-mount and of the drooping portion of the reflector, respectively, and hc is a height of the upper surface of the semiconductor light-emitting element from the upper surface of the sub-mount.
摘要翻译： 本发明的目的是通过提高利用从半导体发光元件发出的光的效率来提供具有高输出和高效率的发光装置。 本发明的半导体发光装置包括封装基板，设置在封装基板上的副安装座，设置在副安装座上的半导体发光元件以及围绕副安装座和半导体发光元件的反射器 其中，子载体，发光元件和反射体的位置和尺寸在垂直于穿过半导体发光元件的中心的封装衬底的横截面上满足以下关系式（A）：< -line-formula description =“In-line Formulas”end =“lead”？> r-1s <=（hs-d）x（1s-1c）/ hc（A）<？in-line-formula description = 其中r，1s和1c是与反射器的下垂部分相距离子载体的外圆周和半导体发光元件的外圆周的距离， 半导体发光元件的中心分别为hs和d为子的高度 和反射器的下垂部分的高度，hc是半导体发光元件的上表面的高度。
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公开(公告)号：US20080289285A1
公开(公告)日：2008-11-27
申请号：US12110761
申请日：2008-04-28
IPC分类号： B60J10/00
摘要： A weather strip includes a bottom wall that faces or is in contact with an end face of a fixed window glass that closes a window opening of a side door. An outer wall extends from the bottom wall on an outer side of the vehicle body with respect to the fixed window glass, and an inner wall extends from the bottom wall on an inner side of the vehicle body with respect to the fixed window glass so that the inner wall and the outer wall sandwich a peripheral portion of the fixed window glass in a thickness direction. The inner wall is provided with a spacing groove for creating a space between the fixed window glass and the inner wall.
摘要翻译： 防风条包括面向或与固定窗玻璃的端面接触的底壁，该固定窗玻璃封闭侧门的窗口。 外壁相对于固定窗玻璃从车身外侧的底壁延伸，内壁相对于固定窗玻璃从车身内侧的底壁延伸，使得 内壁和外壁夹着固定窗玻璃的厚度方向的周边部分。 内壁设置有用于在固定窗玻璃和内壁之间产生空间的间隔凹槽。
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59.发明申请公开(公告)号：US20080110865A1
公开(公告)日：2008-05-15
申请号：US11665683
申请日：2006-04-05
IPC分类号： B23H1/00
摘要： A discharge-generation control unit applies at least a preliminary-discharge voltage pulse and a main-discharge voltage pulse between a wire electrode and a work. A discharge-position determining unit determines a discharge position from results of measurement by a plurality of current measuring units. A machining-energy adjusting unit adjusts machining energy generated by the main-discharge voltage pulse based on a discharge position determined before applying the main-discharge voltage pulse, and reflects a result of the adjustment on the generation of an electric discharge by feeding the result to the discharge-generation control unit.
摘要翻译： 放电产生控制单元在线电极和工件之间至少施加预放电电压脉冲和主放电电压脉冲。 放电位置确定单元通过多个电流测量单元从测量结果确定放电位置。 加工能量调节单元基于在施加主放电电压脉冲之前确定的放电位置来调整由主放电电压脉冲产生的加工能量，并且通过馈送结果来反映对放电产生的调整结果 到放电产生控制单元。
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公开(公告)号：US07369817B2
公开(公告)日：2008-05-06
申请号：US11012120
申请日：2004-12-16
IPC分类号： H04B1/38
CPC分类号： H01L24/49 , H01L23/50 , H01L23/66 , H01L24/48 , H01L2223/6611 , H01L2223/6644 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/49176 , H01L2924/00014 , H01L2924/01013 , H01L2924/01015 , H01L2924/1305 , H01L2924/14 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/30111 , H01L2924/00 , H01L2224/45099 , H01L2224/05599
摘要： A pin layout which prevents degradation of a frequency characteristic of a low noise amplifier and a receiving mixer included in a semiconductor integrated circuit for dual-band transmission/reception wherein the circuit of the low noise amplifier is provided at a position where the distance from the end of a pin outside the package of the low noise amplifier to the pad is the shortest; ground pins of two low noise amplifiers and the high frequency signal pins are arranged respectively so as not to be adjacent to each other; the power source and ground pin of the low noise amplifier, and the power source and ground pin of the bias circuit are respectively separated; and high frequency signal wires do not intersect each other.
摘要翻译： 一种防止低噪声放大器和接收混频器的频率特性劣化的引脚布局，包括在用于双频带发送/接收的半导体集成电路中，其中低噪声放大器的电路设置在距离 低端放大器封装外的引脚到焊盘最短; 两个低噪声放大器的接地引脚和高频信号引脚分别布置为不彼此相邻; 低噪声放大器的电源和接地引脚以及偏置电路的电源和接地引脚分别分开; 高频信号线不会相交。
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