Method of manufacturing self-ordered nanochannel-array and method of manufacturing nanodot using the nanochannel-array
    52.
    发明授权
    Method of manufacturing self-ordered nanochannel-array and method of manufacturing nanodot using the nanochannel-array 失效
    使用纳米通道阵列制造自定序纳米通道阵列的方法和制造纳米点的方法

    公开(公告)号:US07901586B2

    公开(公告)日:2011-03-08

    申请号:US11882112

    申请日:2007-07-30

    IPC分类号: B44C1/22 H01L21/302

    摘要: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

    摘要翻译: 提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。 纳米通道阵列制造方法包括:执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部,其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。 阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。

    Magnetic random access memory devices, methods of driving the same and data writing and reading methods for the same
    54.
    发明申请
    Magnetic random access memory devices, methods of driving the same and data writing and reading methods for the same 有权
    磁性随机存取存储器件,驱动方法和数据写入和读取方法相同

    公开(公告)号:US20090251956A1

    公开(公告)日:2009-10-08

    申请号:US12385124

    申请日:2009-03-31

    摘要: A magnetic memory device includes a lower structure or an antiferromagnetic layer, a pinned layer, an information storage layer, and a free layer formed on the lower structure or the antiferromagnetic layer. In a method of operating a magnetic memory device, information from the storage information layer is read or stored after setting the magnetization of the free layer in a first magnetization direction. The information is stored when the first magnetization direction is opposite to a magnetization direction of the pinned layer, but is read when the first magnetization direction is the same as the magnetization direction of the pinned layer.

    摘要翻译: 磁存储器件包括下结构或反铁磁层,钉扎层,信息存储层和形成在下结构或反铁磁层上的自由层。 在操作磁存储器件的方法中,在将自由层的磁化设定为第一磁化方向之后,来自存储信息层的信息被读取或存储。 当第一磁化方向与被钉扎层的磁化方向相反时,存储信息,但是当第一磁化方向与被钉扎层的磁化方向相同时被读取。

    Magnetic track using magnetic domain wall movement and information storage device including the same
    55.
    发明申请
    Magnetic track using magnetic domain wall movement and information storage device including the same 有权
    磁轨使用磁畴壁运动和信息存储装置包括相同

    公开(公告)号:US20090040883A1

    公开(公告)日:2009-02-12

    申请号:US12073103

    申请日:2008-02-29

    IPC分类号: G11B11/00

    摘要: Provided are a magnetic track using magnetic domain wall movement and an information storage device including the same. A magnetic track may comprise a zigzag shaped storage track including a plurality of first magnetic layers in parallel with each other, and stacked separate from each other, and a plurality of second magnetic layers for connecting the plurality of first magnetic layers. The information storage device may include the magnetic track having a plurality of magnetic domains, current applying device connected to the magnetic track, and a read/write device on a middle portion of the magnetic track.

    摘要翻译: 提供了使用磁畴壁移动的磁迹和包括该磁迹的信息存储装置。 磁迹可以包括一个之字形存储轨道,该轨道包括彼此平行并彼此分开堆叠的多个第一磁性层,以及用于连接多个第一磁性层的多个第二磁性层。 信息存储装置可以包括具有多个磁畴的磁道,连接到磁道的电流施加装置,以及在磁道的中间部分的读/写装置。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    57.
    发明申请
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件,其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号:US20070247913A1

    公开(公告)日:2007-10-25

    申请号:US11812574

    申请日:2007-06-20

    摘要: Disclosed are a multi-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the multi-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译: 公开了一种多位非易失性存储器件,其操作方法以及制造该多位非易失性存储器件的方法。 多位非易失性存储器件的单元可以形成在半导体衬底上,可以包括:垂直于半导体衬底的上表面设置的多个通道; 多个存储节点,其设置在所述通道的相对侧,垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间,通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    58.
    发明授权
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件,其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号:US07256447B2

    公开(公告)日:2007-08-14

    申请号:US11181724

    申请日:2005-07-15

    IPC分类号: H01L29/788

    摘要: Disclosed are a muli-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the muli-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译: 公开了多位非易失性存储器件,其操作方法以及制造多位非易失性存储器件的方法。 多晶硅非易失性存储器件的单元可以形成在半导体衬底上,可以包括:垂直于半导体衬底的上表面设置的多个沟道; 多个存储节点,其设置在所述通道的相对侧,垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间,通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。

    Method of manufacturing memory with nano dots
    59.
    发明授权
    Method of manufacturing memory with nano dots 有权
    用纳米点制造记忆的方法

    公开(公告)号:US06913984B2

    公开(公告)日:2005-07-05

    申请号:US10743377

    申请日:2003-12-23

    摘要: A method of fabricating memory with nano dots includes sequentially depositing a first insulating layer, a charge storage layer, a sacrificial layer, and a metal layer on a substrate in which source and drain electrodes are formed, forming a plurality of holes on the resultant structure by anodizing the metal layer and oxidizing portions of the sacrificial layer that are exposed through the holes, patterning the charge storage layer to have nano dots by removing the oxidized metal layer, and etching the sacrificial layer and the charge storage layer using the oxidized sacrificial layer as a mask, and removing the oxidized sacrificial layer, depositing a second insulating layer and a gate electrode on the patterned charge storage layer, and patterning the first insulating layer, the patterned charge storage layer, the second insulating layer, and the gate electrode to a predetermined shape, for forming memory having uniformly distributed nano-scale storage nodes.

    摘要翻译: 利用纳米点制造存储器的方法包括在形成源极和漏极的衬底上依次沉积第一绝缘层,电荷存储层,牺牲层和金属层,在所得结构上形成多个孔 通过阳极氧化金属层并氧化通过孔露出的牺牲层的部分,通过去除氧化的金属层将电荷存储层图案化成具有纳米点,并且使用氧化的牺牲层蚀刻牺牲层和电荷存储层 作为掩模,并且去除氧化的牺牲层,在图案化的电荷存储层上沉积第二绝缘层和栅电极,并且将第一绝缘层,图案化电荷存储层,第二绝缘层和栅电极图案化,以 用于形成具有均匀分布的纳米级存储节点的存储器的预定形状。