公开(公告)号：US20150008488A1

公开(公告)日：2015-01-08

申请号：US13933203

申请日：2013-07-02

Applicant: STMICROELECTRONICS, INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： LINDSEY HALL ,  VIRAJ Y. SARDESAI ,  CUNG D. TRAN

IPC: H01L29/66 ,  H01L29/78

CPC classification number: H01L29/66636 ,  H01L21/31053 ,  H01L21/76834 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L21/823871 ,  H01L29/165 ,  H01L29/4966 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/7848

Abstract: A method of manufacturing a semiconductor structure includes forming a raised source-drain region in a semiconductor substrate adjacent to a dummy gate and forming a chemical mechanical polish (CMP) stop layer over the gate structure and above a top surface of the semiconductor substrate. A first ILD layer is formed above the CMP stop layer. The first ILD layer is removed to a portion of the CMP stop layer located above the gate structure and a portion of the CMP stop layer located above the gate structure is also removed to expose the dummy gate. The dummy gate is replaced with a metal gate and the metal gate is polished until the CMP stop layer located above the raised source-drain region is reached.

Abstract translation: 制造半导体结构的方法包括在半导体衬底中邻近虚拟栅极形成凸起的源极 - 漏极区域，并在栅极结构之上并在半导体衬底的顶表面上方形成化学机械抛光（CMP）阻挡层。 在CMP停止层上方形成第一ILD层。 第一ILD层被移除到位于栅极结构上方的CMP停止层的一部分，并且位于栅极结构上方的CMP停止层的一部分也被去除以暴露伪栅极。 虚拟栅极被金属栅极替代，并且金属栅极被抛光直到达到位于升高的源极 - 漏极区域上方的CMP停止层。

公开(公告)号：US08927375B2

公开(公告)日：2015-01-06

申请号：US13646754

申请日：2012-10-08

Applicant: International Business Machines Corporation ,  STMicroelectronics, Inc.

Inventor： Emre Alptekin ,  Abhishek Dube ,  Henry K. Utomo ,  Reinaldo A. Vega ,  Bei Liu

IPC: H01L21/336

CPC classification number: H01L21/02686 ,  H01L21/02529 ,  H01L21/02658 ,  H01L21/02667 ,  H01L21/26506 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7843 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/78654

Abstract: Embodiment of the present invention provides a method of forming a semiconductor device. The method includes providing a semiconductor substrate; epitaxially growing a silicon-carbon layer on top of the semiconductor substrate; amorphizing the silicon-carbon layer; covering the amorphized silicon-carbon layer with a stress liner; and subjecting the amorphized silicon-carbon layer to a solid phase epitaxy (SPE) process to form a highly substitutional silicon-carbon film. In one embodiment, the highly substitutional silicon-carbon film is formed to be embedded stressors in the source/drain regions of an nFET transistor, and provides tensile stress to a channel region of the nFET transistor for performance enhancement.

Abstract translation: 本发明的实施例提供了形成半导体器件的方法。 该方法包括：提供半导体衬底; 在半导体衬底的顶部上外延生长硅 - 碳层; 硅碳层非晶化; 用应力衬垫覆盖非晶硅碳层; 并将非晶硅碳层进行固相外延（SPE）工艺以形成高度取代的硅 - 碳膜。 在一个实施例中，高度替代的硅碳膜被形成为在nFET晶体管的源极/漏极区域中的嵌入的应力源，并且为了性能提高而向nFET晶体管的沟道区域提供拉伸应力。

公开(公告)号：US20150005610A1

公开(公告)日：2015-01-01

申请号：US13931138

申请日：2013-06-28

Applicant: STMicroelectronics, Inc.

Inventor： John H. Zhang

IPC: A61B5/04 ,  A61B5/00

CPC classification number: A61B5/04001 ,  A61B5/6877 ,  A61B5/688 ,  B82Y30/00 ,  G01N27/4145 ,  Y10T29/4913

Abstract: It is recognized that, because of its unique properties, graphene can serve as an interface with biological cells that communicate by an electrical impulse, or action potential. Responding to a sensed signal can be accomplished by coupling a graphene sensor to a low power digital electronic switch that is activatable by the sensed low power electrical signals. It is further recognized that low power devices such as tunneling diodes and TFETs are suitable for use in such biological applications in conjunction with graphene sensors. While tunneling diodes can be used in diagnostic applications, TFETs, which are three-terminal devices, further permit controlling the voltage on one cell according to signals received by other cells. Thus, by the use of a biological sensor system that includes graphene nanowire sensors coupled to a TFET, charge can be redistributed among different biological cells, potentially with therapeutic effects.

Abstract translation: 人们认识到，由于其独特的性质，石墨烯可以作为通过电脉冲或动作电位进行通信的生物细胞的界面。 响应感测的信号可以通过将石墨烯传感器耦合到由感测的低功率电信号激活的低功率数字电子开关来实现。 进一步认识到，诸如隧道二极管和TFET的低功率器件适用于与石墨烯传感器相结合的这种生物学应用中。 虽然隧道二极管可以用于诊断应用，但是作为三端子器件的TFET还允许根据其他单元接收的信号来控制一个单元上的电压。 因此，通过使用包括耦合到TFET的石墨烯纳米线传感器的生物传感器系统，电荷可以在不同的生物细胞中重新分布，潜在地具有治疗效果。

公开(公告)号：US20140362298A1

公开(公告)日：2014-12-11

申请号：US13912164

申请日：2013-06-06

Applicant: STMICROELECTRONICS, INC.

Inventor： Tanu Malhotra

IPC: H04N5/63

CPC classification number: H04N5/63 ,  H04N21/43615 ,  H04N21/4424 ,  H04N21/4436

Abstract: Embodiments of the present disclosure are directed to MOCA networks including power-saving MOCA-capable devices. Each of the MOCA-capable devices is operable during a normal or active mode to perform the specific multimedia functionality for which the device is designed, such as to function as a digital video recorder (DVR) and content server, set-top box, and so on. Moreover, each of the MOCA-capable devices is also operable to automatically enter a low-power or standby mode, which reduces the power consumption of the device, when the device need not operate in the active mode. In this way, power savings in each of the MOCA devices results in overall power savings in the MOCA network. A global user-configurable low-power or standby mode parameter can be utilized to override the automatic standby mode operation if desired.

Abstract translation: 本公开的实施例涉及包括功率节省MOCA能力的设备的MOCA网络。 每个具有MOCA能力的设备在正常或主动模式期间可操作以执行设备被设计的特定多媒体功能，例如用作数字录像机（DVR）和内容服务器，机顶盒和 所以。 此外，每个具有MOCA能力的设备也可操作以在设备不需要以活动模式操作时自动进入低功率或待机模式，这降低了设备的功耗。 以这种方式，每个MOCA设备的功率节省都可以节省MOCA网络的总体功耗。 如果需要，可以利用全局用户可配置的低功耗或待机模式参数来覆盖自动待机模式操作。

公开(公告)号：US20140356990A1

公开(公告)日：2014-12-04

申请号：US13906447

申请日：2013-05-31

Applicant: STMICROELECTRONICS, INC.

Inventor： Paul MIKULAN ,  Kenneth J. STEWART ,  Virginia L. HWANG

IPC: B41J2/335

CPC classification number: B41J2/1603 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1635 ,  B41J2/1637 ,  B41J2/1639 ,  Y10T29/49083 ,  Y10T29/49087 ,  Y10T29/49401

Abstract: A method of making inkjet print heads may include forming a first wafer including a sacrificial substrate layer, and a first dielectric layer thereon having first openings therein defining inkjet orifices. The method may also include forming a second wafer having inkjet chambers defined thereon, and joining the first and second wafers together so that each inkjet orifice is aligned with a respective inkjet chamber. The method may further include removing the sacrificial substrate layer thereby defining the inkjet print heads.

Abstract translation: 制造喷墨打印头的方法可以包括形成包括牺牲基底层的第一晶片和其上具有限定喷墨孔的第一开口的第一介电层。 该方法还可以包括形成具有限定在其上的喷墨室的第二晶片，并且将第一和第二晶片接合在一起，使得每个喷墨孔与相应的喷墨室对准。 该方法还可以包括去除牺牲衬底层从而限定喷墨打印头。

公开(公告)号：US20140354736A1

公开(公告)日：2014-12-04

申请号：US13906466

申请日：2013-05-31

Applicant: STMICROELECTRONICS, INC.

Inventor： Kenneth J. Stewart

IPC: B41J2/045 ,  B41J2/175

CPC classification number: B41J2/1433 ,  B41J2/16 ,  B41J2/1635 ,  B41J2202/20

Abstract: A method of making an inkjet print head may include forming, by sawing with a rotary saw blade, continuous slotted recesses in a first surface of a wafer. The continuous slotted recesses may be arranged in parallel, spaced apart relation, and each continuous slotted recess may extend continuously across the first surface. The method may further include forming discontinuous slotted recesses in a second surface of the wafer to be aligned and coupled in communication with the continuous slotted recesses to define alternating through-wafer channels and slotted recess portions. The method may further include selectively filling the residual slotted recess portions to define through-wafer ink channels.

Abstract translation: 制造喷墨打印头的方法可以包括通过用旋转锯片锯切在晶片的第一表面中形成连续的狭槽。 连续的开槽凹槽可以平行布置，间隔开的关系，并且每个连续的开槽凹槽可以连续延伸穿过第一表面。 该方法可以进一步包括在晶片的第二表面中形成不连续的开槽的凹槽，以与待连接的开槽的凹槽对准和耦合，以限定交替的晶片通道和开槽凹部。 该方法还可以包括选择性地填充剩余的开槽凹部以限定贯穿晶片墨水通道。

公开(公告)号：US20140340450A1

公开(公告)日：2014-11-20

申请号：US13893482

申请日：2013-05-14

Applicant: STMICROELECTRONICS ASIA PACIFIC PTE. LTD. ,  STMICROELECTRONICS, INC.

Inventor： MADANAGOPAL KUNNAVAKKAM ,  TECK KHIM NEO ,  KENNETH W. SMILEY

IPC: B41J2/14 ,  B41J2/16

CPC classification number: B41J2/14 ,  B41J2/14129 ,  B41J2/1603 ,  B41J2/1621 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/164

Abstract: An ink jet printhead device includes a substrate and at least one first dielectric layer above the substrate. A resistive layer is above the at least one first dielectric layer. An electrode layer is above the resistive layer and defines first and second electrodes coupled to the resistive layer. At least one second dielectric layer is above the electrode layer and contacts the resistive layer through the at least one opening. The at least one second dielectric layer has a compressive stress magnitude of at least 340 MPa.

Abstract translation: 喷墨打印头装置包括基底和在基底上方的至少一个第一介电层。 电阻层在至少一个第一介电层之上。 电极层位于电阻层之上，并且限定了耦合到电阻层的第一和第二电极。 至少一个第二电介质层在电极层之上，并且通过至少一个开口接触电阻层。 所述至少一个第二电介质层具有至少340MPa的压应力大小。

公开(公告)号：US20140299938A1

公开(公告)日：2014-10-09

申请号：US13856325

申请日：2013-04-03

Applicant: STMicroelectronics, Inc.

Inventor： John H. Zhang ,  Chengyu Niu ,  Heng Yang

IPC: H01L27/092 ,  H01L21/8238

CPC classification number: H01L21/823842 ,  H01L21/28088 ,  H01L21/28132 ,  H01L21/2855 ,  H01L21/823807 ,  H01L21/823814 ,  H01L21/82385 ,  H01L21/823864 ,  H01L27/092 ,  H01L29/41783 ,  H01L29/42376 ,  H01L29/495 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/78 ,  H01L29/7843 ,  H01L29/7845 ,  H01L2924/04941 ,  H01L2924/0465 ,  H01L2924/04541 ,  H01L2924/01074 ,  H01L2924/04953 ,  H01L2924/01029 ,  H01L2924/01022 ,  H01L2924/01007 ,  H01L2924/0505 ,  H01L2924/01013

Abstract: Methods and devices for enhancing mobility of charge carriers. An integrated circuit may include semiconductor devices of two types. The first type of device may include a metallic gate and a channel strained in a first manner. The second type of device may include a metallic gate and a channel strained in a second manner. The gates may include, collectively, three or fewer metallic materials. The gates may share a same metallic material. A method of forming the semiconductor devices on an integrated circuit may include depositing first and second metallic layers in first and second regions of the integrated circuit corresponding to the first and second gates, respectively.

Abstract translation: 增强载流子迁移率的方法和装置。 集成电路可以包括两种类型的半导体器件。 第一类型的装置可以包括金属门和以第一方式应变的通道。 第二类型的装置可以包括金属门和以第二方式应变的通道。 这些门可以共同地包括三种或更少的金属材料。 门可以共享相同的金属材料。 在集成电路上形成半导体器件的方法可以包括分别在对应于第一和第二栅极的集成电路的第一和第二区域中沉积第一和第二金属层。

公开(公告)号：US20140291750A1

公开(公告)日：2014-10-02

申请号：US13852720

申请日：2013-03-28

Applicant: STMICROELECTRONICS, INC. ,  INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Prasanna KHARE ,  Stephane Allegret-Maret ,  Nicolas Loubet ,  Qing Liu ,  Hemanth Jagannathan ,  Lisa Edge ,  Kangguo Cheng ,  Bruce Doris

IPC: H01L29/423 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L29/792 ,  H01L21/28273 ,  H01L27/11546 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7881

Abstract: A memory device may include a semiconductor substrate, and a memory transistor in the semiconductor substrate. The memory transistor may include source and drain regions in the semiconductor substrate and a channel region therebetween, and a gate stack having a first dielectric layer over the channel region, a second dielectric layer over the first dielectric layer, a first diffusion barrier layer over the second dielectric layer, a first electrically conductive layer over the first diffusion barrier layer, a second diffusion barrier layer over the first electrically conductive layer, and a second electrically conductive layer over the second diffusion barrier layer. The first and second dielectric layers may include different dielectric materials, and the first diffusion barrier layer may be thinner than the second diffusion barrier layer.

Abstract translation: 存储器件可以包括半导体衬底和半导体衬底中的存储晶体管。 存储晶体管可以包括半导体衬底中的源极和漏极区域以及它们之间的沟道区域，以及栅极堆叠，其在沟道区域上具有第一介电层，在第一介电层上方具有第二介电层，第一扩散阻挡层 第一介电层，第一扩散阻挡层上的第一导电层，第一导电层上的第二扩散阻挡层，以及第二扩散阻挡层上的第二导电层。 第一和第二电介质层可以包括不同的电介质材料，并且第一扩散阻挡层可以比第二扩散阻挡层薄。

公开(公告)号：US08788870B2

公开(公告)日：2014-07-22

申请号：US13850564

申请日：2013-03-26

Applicant: STMicroelectronics, Inc.

Inventor： Alan Osamu Kobayashi

IPC: G06F1/04 ,  H04N5/44

CPC classification number: G06F1/04 ,  G09G5/006 ,  G09G2330/021 ,  G09G2370/10 ,  G09G2370/14

Abstract: Methods and systems are described for enabling display system data transmission during use. An integrated circuit package includes input interface circuitry configured to receive an audio-video data stream having a video signal and timing information and timing extraction circuitry that can identify blanking patterns for the video signal. The package includes input processing circuitry for receiving audio-video signal and converting the audio-video data stream input into a low voltage differential signal (LVDS). The package includes a timing controller having timing extraction circuitry, a set of symbol buffers, a scheduler, and timing control circuitry. All configured to implement LVDS data transfer and in some implementation enable point to point data transfer from data buffers to associated column drivers.

Abstract translation: 描述了在使用期间使显示系统数据传输的方法和系统。 集成电路封装包括输入接口电路，其被配置为接收具有视频信号和定时信息的音频 - 视频数据流以及可识别视频信号的消​​隐模式的定时提取电路。 该包装包括用于接收音频 - 视频信号并将音频 - 视频数据流输入转换成低电压差分信号（LVDS）的输入处理电路。 该封装包括具有定时提取电路，一组符号缓冲器，调度器和定时控制电路的定时控制器。 所有这些都配置为实现LVDS数据传输，并且在某些实现中，使得能够从数据缓冲区到相关列驱动器进行点对点数据传输。