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公开(公告)号：US08451651B2
公开(公告)日：2013-05-28
申请号：US13027543
申请日：2011-02-15
IPC分类号： G11C11/24
CPC分类号： G11C16/0408 , H01L27/11519 , H01L27/11521 , H01L27/1156
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device is formed using a material capable of sufficiently reducing the off-state current of a transistor, such as an oxide semiconductor material that is a widegap semiconductor. The use of a semiconductor material capable of sufficiently reducing the off-state current of a transistor allows data to be held for a long time. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也可以保存存储的数据。 使用能够充分降低诸如大孔半导体的氧化物半导体材料的晶体管的截止电流的材料形成半导体器件。 能够充分降低晶体管的截止电流的半导体材料的使用允许长时间保持数据。 此外，信号线中的电位变化的定时相对于写入字线的电位变化的定时被延迟。 这使得可以防止数据写入错误。
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公开(公告)号：US08406038B2
公开(公告)日：2013-03-26
申请号：US13094863
申请日：2011-04-27
IPC分类号： G11C11/24
CPC分类号： H01L29/78 , G11C11/403 , G11C11/406 , G11C16/0416 , G11C2211/4065 , H01L27/11521 , H01L27/1156 , H01L27/1207 , H01L27/1225
摘要： A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel formation region contain different materials as their respective main components. A first gate electrode is electrically connected to one of a second source electrode and a second drain electrode. The other of the second source electrode and the second drain electrode is electrically connected to one of input terminals of the amplifier circuit. An output terminal of the amplifier circuit is connected to the other of the second source electrode and the second drain electrode through the switch element. The refresh control circuit is configured to control whether the switch element is turned on or off.
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公开(公告)号：US08339837B2
公开(公告)日：2012-12-25
申请号：US13206547
申请日：2011-08-10
IPC分类号： G11C11/24
CPC分类号： G11C16/0433 , G11C11/404
摘要： A semiconductor device with a novel structure and a driving method thereof are provided. A semiconductor device includes a non-volatile memory cell including a writing transistor including an oxide semiconductor, a reading p-channel transistor including a semiconductor material different from that of the writing transistor, and a capacitor. Data is written to the memory cell by turning on the writing transistor so that a potential is supplied to a node where a source electrode of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of electric charge is held in the node. In a holding period, the memory cell is brought into a selected state and a source electrode and a drain electrode of the reading transistor are set to the same potential, whereby the electric charge stored in the node is held.
摘要翻译： 提供具有新颖结构的半导体器件及其驱动方法。 一种半导体器件包括：非易失性存储单元，包括包括氧化物半导体的写入晶体管，包括与写入晶体管的半导体材料不同的半导体材料的读取P沟道晶体管，以及电容器。 通过接通写入晶体管将数据写入存储单元，使得电位被提供给写入晶体管的源电极，电容器的一个电极和读取晶体管的栅极电连接的节点，以及 然后关闭写入晶体管，使得节点中保持预定量的电荷。 在保持期间，将存储单元置于选择状态，将读取晶体管的源电极和漏电极设定为相同的电位，由此保存存储在节点中的电荷。
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公开(公告)号：US20120269013A1
公开(公告)日：2012-10-25
申请号：US13446661
申请日：2012-04-13
申请人： Takanori Matsuzaki
发明人： Takanori Matsuzaki
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C11/404 , G11C16/0416 , H01L27/1156 , H01L27/1225
摘要： A signal processing circuit including a nonvolatile storage circuit with a novel structure. The signal processing circuit includes a circuit that is supplied with a power supply voltage and has a first node to which a first high power supply potential is applied, and a nonvolatile storage circuit for holding a potential of the first node. The nonvolatile storage circuit includes a transistor whose channel is formed in an oxide semiconductor layer, and a second node that is brought into a floating state when the transistor is turned off. A second high power supply potential or a ground potential is input to a gate of the transistor. When the power supply voltage is not supplied, the ground potential is input to the gate of the transistor and the transistor is kept off. The second high power supply potential is higher than the first high power supply potential.
摘要翻译： 一种包括具有新颖结构的非易失性存储电路的信号处理电路。 信号处理电路包括被提供有电源电压并具有施加第一高电源电位的第一节点的电路和用于保持第一节点的电位的非易失性存储电路。 非易失性存储电路包括其沟道形成在氧化物半导体层中的晶体管，以及当晶体管截止时成为浮置状态的第二节点。 第二高电源电位或接地电位被输入到晶体管的栅极。 当不提供电源电压时，接地电位被输入到晶体管的栅极，并且晶体管保持截止。 第二个高电源电位高于第一个高电源电位。
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公开(公告)号：US20120033510A1
公开(公告)日：2012-02-09
申请号：US13197839
申请日：2011-08-04
IPC分类号： G11C7/00
CPC分类号： G11C7/00 , G11C11/403 , G11C11/4087 , H01L27/11517 , H01L27/1156 , H01L27/1207 , H01L27/1225
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when power is not supplied and which has an unlimited number of write cycles. The semiconductor device is formed using a memory cell including a wide band gap semiconductor such as an oxide semiconductor. The semiconductor device includes a potential change circuit having a function of outputting a potential lower than a reference potential for reading data from the memory cell. When the wide band gap semiconductor which allows a sufficient reduction in of state current of a transistor included in the memory cell is used, a semiconductor device which can hold data for a long period can be provided.
摘要翻译： 目的是提供具有新颖结构的半导体器件，其即使在不提供电力且具有无限数量的写周期的情况下也可以保存存储的数据。 使用包括诸如氧化物半导体的宽带隙半导体的存储单元形成半导体器件。 半导体器件包括具有输出低于用于从存储单元读取数据的参考电位的电位的功能的电位变化电路。 当使用允许存储单元中包括的晶体管的状态电流充分降低的宽带隙半导体时，可以提供能够长期保存数据的半导体器件。
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公开(公告)号：US20120025284A1
公开(公告)日：2012-02-02
申请号：US13185965
申请日：2011-07-19
申请人： Kiyoshi Kato , Takanori Matsuzaki
发明人： Kiyoshi Kato , Takanori Matsuzaki
IPC分类号： H01L27/108
CPC分类号： H01L27/11521 , H01L27/108 , H01L27/11524 , H01L27/11551 , H01L27/1156 , H01L27/1225
摘要： A semiconductor device includes a material with which off-state current of a transistor can be sufficiently small; for example, an oxide semiconductor material is used. Further, transistors of memory cells of the semiconductor device, which include an oxide semiconductor material, are connected in series. Further, the same wiring (the j-th word line (j is a natural number greater than or equal to 2 and less than or equal to m)) is used as a wiring electrically connected to one of terminals of a capacitor of the j-th memory cell and a wiring electrically connected to a gate terminal of a transistor, in which a channel is formed in an oxide semiconductor layer, of the (j−1)-th memory cell. Therefore, the number of wirings per memory cell and the area occupied by one memory cell are reduced.
摘要翻译： 半导体器件包括晶体管的截止电流足够小的材料; 例如，使用氧化物半导体材料。 此外，包括氧化物半导体材料的半导体器件的存储单元的晶体管串联连接。 此外，使用相同的布线（第j字线（j为大于等于2且小于等于m的自然数））作为与j的电容器的端子之一电连接的布线 第（j-1）个存储单元和与第一第（j-1）个存储单元形成沟道的晶体管的栅极端子电连接的布线。 因此，每个存储单元的布线数和一个存储单元占用的面积减少。
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公开(公告)号：US20120025064A1
公开(公告)日：2012-02-02
申请号：US13271300
申请日：2011-10-12
申请人： Jun Koyama , Takeshi Osada , Takanori Matsuzaki , Kazuo Nishi , Junya Maruyama
发明人： Jun Koyama , Takeshi Osada , Takanori Matsuzaki , Kazuo Nishi , Junya Maruyama
IPC分类号： H01J40/14
CPC分类号： H01L27/14609 , H01L27/12 , H01L27/14692
摘要： In an optical sensor device employing an amorphous silicon photodiode, an external amplifier IC and the like are required due to low current capacity of the sensor element in order to improve the load driving capacity. It to increase in cost and mounting space of the optical sensor device. In addition, noise may easily superimpose since the photodiode and the amplifier IC are connected to each other over a printed circuit board. According to the invention, an amorphous silicon photodiode and an amplifier configured by a thin film transistor are formed integrally over a substrate so that the load driving capacity is improved while reducing cost and mounting space. Superimposing noise can also be reduced.
摘要翻译： 在采用非晶硅光电二极管的光学传感器装置中，由于传感器元件的低电流容量需要外部放大器IC等，以提高负载驱动能力。 这导致光学传感器装置的成本和安装空间的增加。 此外，由于光电二极管和放大器IC在印刷电路板上彼此连接，噪声可能容易地叠加。 根据本发明，非晶硅光电二极管和由薄膜晶体管构成的放大器一体地形成在基板上，从而提高负载驱动能力，同时降低成本和安装空间。 叠加噪音也可以减少。
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公开(公告)号：US20120014157A1
公开(公告)日：2012-01-19
申请号：US13175090
申请日：2011-07-01
IPC分类号： G11C5/06
CPC分类号： H01L27/1156 , G11C11/404 , G11C16/0441 , H01L27/1207
摘要： A plurality of memory cells included in a memory cell array are divided into a plurality of blocks every plural rows. A common bit line is electrically connected to the divided bit lines through selection transistors in the blocks. One of the memory cells includes a first transistor, a second transistor, and a capacitor. The first transistor includes a first channel formation region. The second transistor includes a second channel formation region. The first channel formation region includes a semiconductor material different from the semiconductor material of the second channel formation region.
摘要翻译： 包括在存储单元阵列中的多个存储单元被分成多个块，每个多行。 公共位线通过块中的选择晶体管电连接到分割位线。 一个存储单元包括第一晶体管，第二晶体管和电容器。 第一晶体管包括第一沟道形成区。 第二晶体管包括第二沟道形成区域。 第一沟道形成区域包括与第二沟道形成区域的半导体材料不同的半导体材料。
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公开(公告)号：US20110255325A1
公开(公告)日：2011-10-20
申请号：US13082464
申请日：2011-04-08
IPC分类号： G11C5/06
CPC分类号： G11C11/4093 , G11C11/405 , G11C11/4074 , G11C11/4085 , G11C11/4096 , H01L27/1156 , H01L27/1203
摘要： An object is to provide a semiconductor device having a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor. The memory cell includes a writing transistor, a reading transistor, and a selecting transistor. Using a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and holding data for a long time can be provided.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也能够保存存储的数据。 半导体器件包括具有宽栅半导体的存储单元，例如氧化物半导体。 存储单元包括写入晶体管，读取晶体管和选择晶体管。 使用宽栅半导体，可以提供能够充分降低存储单元中包含的晶体管的截止电流并长时间保持数据的半导体器件。
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公开(公告)号：US20110080774A1
公开(公告)日：2011-04-07
申请号：US12890856
申请日：2010-09-27
CPC分类号： G11C13/004 , G11C17/16 , G11C2213/33 , G11C2213/34 , G11C2213/79 , H01L27/24
摘要： Objects of the present invention are to improve the manufacturing yield of semiconductor devices, reduce manufacturing cost of the semiconductor device, and reduce the circuit area of an integrated circuit included in the semiconductor device. A memory layer of a memory element and a resistive layer of a resistor included in the semiconductor device are formed of the same material. Therefore, the memory layer and the resistive layer are formed in the same step, whereby the number of manufacturing steps of the semiconductor device can be reduced. As a result, the manufacturing yield of the semiconductor devices can be improved and the manufacturing cost can be reduced. In addition, the semiconductor device includes a resistor having a resistive component which has high resistance value. Consequently, the area of the integrated circuit included in the semiconductor device can be reduced.
摘要翻译： 本发明的目的是提高半导体器件的制造成品率，降低半导体器件的制造成本，并且减小包括在半导体器件中的集成电路的电路面积。 存储元件的存储层和包含在半导体器件中的电阻器的电阻层由相同的材料形成。 因此，在相同的步骤中形成存储层和电阻层，从而可以减少半导体器件的制造步骤的数量。 结果，可以提高半导体器件的制造成品率，并且可以降低制造成本。 此外，半导体器件包括具有高电阻值的电阻元件的电阻器。 因此，可以减少包括在半导体器件中的集成电路的面积。
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