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公开(公告)号：US20110080774A1
公开(公告)日：2011-04-07
申请号：US12890856
申请日：2010-09-27
CPC分类号： G11C13/004 , G11C17/16 , G11C2213/33 , G11C2213/34 , G11C2213/79 , H01L27/24
摘要： Objects of the present invention are to improve the manufacturing yield of semiconductor devices, reduce manufacturing cost of the semiconductor device, and reduce the circuit area of an integrated circuit included in the semiconductor device. A memory layer of a memory element and a resistive layer of a resistor included in the semiconductor device are formed of the same material. Therefore, the memory layer and the resistive layer are formed in the same step, whereby the number of manufacturing steps of the semiconductor device can be reduced. As a result, the manufacturing yield of the semiconductor devices can be improved and the manufacturing cost can be reduced. In addition, the semiconductor device includes a resistor having a resistive component which has high resistance value. Consequently, the area of the integrated circuit included in the semiconductor device can be reduced.
摘要翻译： 本发明的目的是提高半导体器件的制造成品率，降低半导体器件的制造成本，并且减小包括在半导体器件中的集成电路的电路面积。 存储元件的存储层和包含在半导体器件中的电阻器的电阻层由相同的材料形成。 因此，在相同的步骤中形成存储层和电阻层，从而可以减少半导体器件的制造步骤的数量。 结果，可以提高半导体器件的制造成品率，并且可以降低制造成本。 此外，半导体器件包括具有高电阻值的电阻元件的电阻器。 因此，可以减少包括在半导体器件中的集成电路的面积。
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公开(公告)号：US20110280061A1
公开(公告)日：2011-11-17
申请号：US13094863
申请日：2011-04-27
CPC分类号： H01L29/78 , G11C11/403 , G11C11/406 , G11C16/0416 , G11C2211/4065 , H01L27/11521 , H01L27/1156 , H01L27/1207 , H01L27/1225
摘要： A semiconductor device includes a plurality of memory cells including a first transistor and a second transistor, a reading circuit including an amplifier circuit and a switch element, and a refresh control circuit. A first channel formation region and a second channel formation region contain different materials as their respective main components. A first gate electrode is electrically connected to one of a second source electrode and a second drain electrode. The other of the second source electrode and the second drain electrode is electrically connected to one of input terminals of the amplifier circuit. An output terminal of the amplifier circuit is connected to the other of the second source electrode and the second drain electrode through the switch element. The refresh control circuit is configured to control whether the switch element is turned on or off.
摘要翻译： 一种半导体器件包括多个包括第一晶体管和第二晶体管的存储单元，包括放大器电路和开关元件的读取电路以及刷新控制电路。 第一通道形成区域和第二通道形成区域包含不同的材料作为它们各自的主要成分。 第一栅电极电连接到第二源电极和第二漏极之一。 第二源极和第二漏极中的另一个电连接到放大器电路的一个输入端。 放大器电路的输出端子通过开关元件连接到第二源电极和第二漏电极中的另一个。 刷新控制电路被配置为控制开关元件是打开还是关闭。
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公开(公告)号：US20120286268A1
公开(公告)日：2012-11-15
申请号：US13558694
申请日：2012-07-26
IPC分类号： H01L27/07
CPC分类号： H03D1/18 , H01L27/1225
摘要： An object is to provide a demodulation circuit having a sufficient demodulation ability. Another object is to provide an RFID tag which uses a demodulation circuit having a sufficient demodulation ability. A material which enables a reverse current to be small enough, for example, an oxide semiconductor material, which is a wide bandgap semiconductor, is used in part of a transistor included in a demodulation circuit. By using the semiconductor material which enables a reverse current of a transistor to be small enough, a sufficient demodulation ability can be secured even when an electromagnetic wave having a high amplitude is received.
摘要翻译： 目的在于提供具有足够的解调能力的解调电路。 另一个目的是提供使用具有足够的解调能力的解调电路的RFID标签。 在解调电路中包括的晶体管的一部分中使用能使反向电流足够小的材料，例如，宽带隙半导体的氧化物半导体材料。 通过使用能够使晶体管的反向电流足够小的半导体材料，即使接收到具有高振幅的电磁波也能够确保足够的解调能力。
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公开(公告)号：US20120033484A1
公开(公告)日：2012-02-09
申请号：US13193756
申请日：2011-07-29
IPC分类号： G11C11/24
CPC分类号： G11C16/0408 , G11C11/405 , G11C16/02
摘要： The semiconductor device is formed using a material which allows a sufficient reduction in off-state current of a transistor; for example, an oxide semiconductor material, which is a wide gap semiconductor, is used. When a semiconductor material which allows a sufficient reduction in off-state current of a transistor is used, the semiconductor device can hold data for a long period. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error.
摘要翻译： 使用允许充分降低晶体管的截止电流的材料形成半导体器件; 例如，使用作为宽间隙半导体的氧化物半导体材料。 当使用允许充分降低晶体管的截止电流的半导体材料时，半导体器件可以长时间保存数据。 此外，信号线中的电位变化的定时相对于写入字线的电位变化的定时被延迟。 这使得可以防止数据写入错误。
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公开(公告)号：US20110227072A1
公开(公告)日：2011-09-22
申请号：US13041581
申请日：2011-03-07
IPC分类号： H01L29/786
CPC分类号： H01L27/11521 , G11C16/0408 , H01L27/11551 , H01L27/1156 , H01L27/1207 , H01L27/1225 , H01L28/60
摘要： A semiconductor device including a nonvolatile memory cell including a writing transistor which includes an oxide semiconductor, a reading transistor which includes a semiconductor material different from that of the writing transistor, and a capacitor is provided. Data is written to the memory cell by turning on the writing transistor and supplying a potential to a node where a source electrode (or a drain electrode) of the writing transistor, one electrode of the capacitor, and a gate electrode of the reading transistor are electrically connected to each other, and then turning off the writing transistor so that a predetermined amount of charge is held at the node. Further, when a p-channel transistor is used as the reading transistor, a reading potential is a positive potential.
摘要翻译： 提供一种半导体器件，其包括包括具有氧化物半导体的写入晶体管的非易失性存储单元，包括与写入晶体管不同的半导体材料的读取晶体管和电容器。 通过接通写入晶体管并将电位提供给写入晶体管的源极（或电极），电容器的一个电极和读取晶体管的栅电极的节点，将数据写入存储单元 彼此电连接，然后关闭写入晶体管，使得在节点处保持预定量的电荷。 此外，当使用p沟道晶体管作为读取晶体管时，读取电位为正电位。
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公开(公告)号：US20110205775A1
公开(公告)日：2011-08-25
申请号：US13027543
申请日：2011-02-15
IPC分类号： G11C5/06
CPC分类号： G11C16/0408 , H01L27/11519 , H01L27/11521 , H01L27/1156
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device is formed using a material capable of sufficiently reducing the off-state current of a transistor, such as an oxide semiconductor material that is a widegap semiconductor. The use of a semiconductor material capable of sufficiently reducing the off-state current of a transistor allows data to be held for a long time. In addition, the timing of potential change in a signal line is delayed relative to the timing of potential change in a write word line. This makes it possible to prevent a data writing error.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也可以保存存储的数据。 使用能够充分降低诸如大孔半导体的氧化物半导体材料的晶体管的截止电流的材料形成半导体器件。 能够充分降低晶体管的截止电流的半导体材料的使用允许长时间保持数据。 此外，信号线中的电位变化的定时相对于写入字线的电位变化的定时被延迟。 这使得可以防止数据写入错误。
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公开(公告)号：US20110255325A1
公开(公告)日：2011-10-20
申请号：US13082464
申请日：2011-04-08
IPC分类号： G11C5/06
CPC分类号： G11C11/4093 , G11C11/405 , G11C11/4074 , G11C11/4085 , G11C11/4096 , H01L27/1156 , H01L27/1203
摘要： An object is to provide a semiconductor device having a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor. The memory cell includes a writing transistor, a reading transistor, and a selecting transistor. Using a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and holding data for a long time can be provided.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也能够保存存储的数据。 半导体器件包括具有宽栅半导体的存储单元，例如氧化物半导体。 存储单元包括写入晶体管，读取晶体管和选择晶体管。 使用宽栅半导体，可以提供能够充分降低存储单元中包含的晶体管的截止电流并长时间保持数据的半导体器件。
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公开(公告)号：US20110205785A1
公开(公告)日：2011-08-25
申请号：US13027546
申请日：2011-02-15
IPC分类号： G11C11/24
CPC分类号： G11C8/08 , G11C11/413
摘要： An object is to provide a semiconductor device with a novel structure, which can hold stored data even when not powered and which has an unlimited number of write cycles. A semiconductor device includes a memory cell including a widegap semiconductor, for example, an oxide semiconductor and the semiconductor device includes a potential conversion circuit which functions to output a potential lower than a reference potential for reading data from the memory cell. With the use of a widegap semiconductor, a semiconductor device capable of sufficiently reducing the off-state current of a transistor included in a memory cell and capable of holding data for a long time can be provided.
摘要翻译： 目的是提供一种具有新颖结构的半导体器件，其即使在未被供电且具有无限数量的写周期的情况下也可以保存存储的数据。 半导体器件包括具有宽栅半导体例如氧化物半导体的存储单元，并且该半导体器件包括用于输出低于用于从存储单元读取数据的参考电位的电位的电位转换电路。 通过使用宽栅半导体，可以提供能够充分降低包含在存储单元中并能够长时间保持数据的晶体管的截止电流的半导体器件。
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公开(公告)号：US20110204968A1
公开(公告)日：2011-08-25
申请号：US13026508
申请日：2011-02-14
IPC分类号： H01L25/00
CPC分类号： H03D1/18 , H01L27/1225
摘要： An object is to provide a demodulation circuit having a sufficient demodulation ability. Another object is to provide an RFID tag which uses a demodulation circuit having a sufficient demodulation ability. A material which enables a reverse current to be small enough, for example, an oxide semiconductor material, which is a wide bandgap semiconductor, is used in part of a transistor included in a demodulation circuit. By using the semiconductor material which enables a reverse current of a transistor to be small enough, a sufficient demodulation ability can be secured even when an electromagnetic wave having a high amplitude is received.
摘要翻译： 目的在于提供具有足够的解调能力的解调电路。 另一个目的是提供使用具有足够的解调能力的解调电路的RFID标签。 在解调电路中包括的晶体管的一部分中使用能使反向电流足够小的材料，例如，宽带隙半导体的氧化物半导体材料。 通过使用能够使晶体管的反向电流足够小的半导体材料，即使接收到具有高振幅的电磁波也能够确保足够的解调能力。
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公开(公告)号：US20080258822A1
公开(公告)日：2008-10-23
申请号：US11875088
申请日：2007-10-19
申请人： Takanori MATSUZAKI
发明人： Takanori MATSUZAKI
IPC分类号： H03L9/00
CPC分类号： H01L27/1255 , H01L27/1214 , H01L27/1266 , H03K3/011 , H03K3/0315 , H03K5/133 , H03K2005/00039 , H03K2005/0013
摘要： A stable frequency is outputted by an oscillator circuit including a constant current circuit which is electrically connected between a first terminal and a second terminal, a voltage controlled oscillator circuit in which an oscillation frequency fluctuates in accordance with a potential difference between power supply voltage terminals, an n-channel transistor, a p-channel transistor in which a gate-source voltage is set to be constant by the constant current circuit, and a capacitor, in which a source electrode of the p-channel transistor is electrically connected to the first terminal, a drain electrode of the p-channel transistor is electrically connected a drain electrode and a gate electrode of the n-channel transistor, a source electrode of the n-channel transistor is electrically connected to the second terminal, and a gate electrode of the n-channel transistor is electrically connected to the second terminal through the capacitor.
摘要翻译： 稳定的频率由包括电连接在第一端子和第二端子之间的恒流电路的振荡器电路输出，其中振荡频率根据电源电压端子之间的电位差而波动， n沟道晶体管，其中通过恒流电路将栅极 - 源极电压设置为恒定的p沟道晶体管，以及电容器，其中p沟道晶体管的源极电连接到第一 端子，p沟道晶体管的漏电极与n沟道晶体管的漏电极和栅电极电连接，n沟道晶体管的源极电连接到第二端子，栅极电极 n沟道晶体管通过电容器电连接到第二端子。
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