公开(公告)号：US07545222B2

公开(公告)日：2009-06-09

申请号：US11620053

申请日：2007-01-05

Applicant: Yu-Pin Chou ,  Chi-Kung Kuan

Inventor： Yu-Pin Chou ,  Chi-Kung Kuan

IPC: H03L7/00

CPC classification number: H03L7/10 ,  H03L7/0814 ,  H03L7/0891 ,  H03L7/0991 ,  H03L7/0996 ,  H03L2207/06 ,  Y10S331/02

Abstract: A phase-locked loop (PLL) for rapid lock-in applicable to digital, analog, or hybrid digital-analog PLL circuits is provided. Besides the units for basic operation, including a phase-frequency detector (PFD), a charge pump, a loop filter, and/or a voltage/current/digital-controlled oscillator (VCO/ICO/DCO), an additional lock-in actuator circuit is provided for providing lock-in signals, achieving the purpose of rapid lock-in through operational processes.

Abstract translation: 提供了一种用于快速锁定的锁相环（PLL），适用于数字，模拟或混合数字 - 模拟PLL电路。 除了用于基本操作的单元，包括相位频率检测器（PFD），电荷泵，环路滤波器和/或电压/电流/数字控制振荡器（VCO / ICO / DCO），附加锁定 致动器电路被提供用于提供锁定信号，实现通过操作过程快速锁定的目的。

公开(公告)号：US07532028B2

公开(公告)日：2009-05-12

申请号：US11863286

申请日：2007-09-28

Applicant: Yu-Pin Chou

Inventor： Yu-Pin Chou

IPC: H03K17/16

CPC classification number: H03H7/40

Abstract: The invention relates to an impedance matching circuit including: an input terminal for receiving an input signal; a variable impedance unit, coupled to the input terminal, having an equivalent impedance for providing the input terminal with an input impedance; a signal quality evaluating unit, coupled to the input terminal, for evaluating a signal quality of the input signal; and a control unit coupled to the variable impedance unit and the signal quality evaluating unit, for outputting a target control signal according to an evaluating result of the signal quality evaluating unit to adjust the equivalent impedance of the variable impedance unit.

Abstract translation: 本发明涉及一种阻抗匹配电路，包括：输入端，用于接收输入信号; 耦合到输入端的可变阻抗单元具有用于向输入端提供输入阻抗的等效阻抗; 信号质量评估单元，耦合到输入端，用于评估输入信号的信号质量; 以及耦合到所述可变阻抗单元和所述信号质量评估单元的控制单元，用于根据所述信号质量评估单元的评估结果输出目标控制信号，以调整所述可变阻抗单元的等效阻抗。

公开(公告)号：US07489316B2

公开(公告)日：2009-02-10

申请号：US11222899

申请日：2005-09-08

Applicant: Jin Sheng Gong ,  Yu Pin Chou ,  Shiu Rong Tong

Inventor： Jin Sheng Gong ,  Yu Pin Chou ,  Shiu Rong Tong

IPC: G09G5/399 ,  G06F13/372

CPC classification number: H04N7/0105 ,  H04N7/0127

Abstract: A method for converting a frame rate of a video signal comprising a data enable signal by means of a first buffer and a second buffer is disclosed. The method comprises: alternatively accessing the first buffer and the second buffer according to a first frame rate; determining an accessing time point of the first and the second buffers according to the data enable signal; and accessing the buffer, which is one of the first and the second buffers and not accessed at the accessing time point, according to a second frame rate, wherein the second frame rate is faster than the first frame rate.

Abstract translation: 公开了一种通过第一缓冲器和第二缓冲器来转换包括数据使能信号的视频信号的帧速率的方法。 该方法包括：根据第一帧速率交替地访问第一缓冲器和第二缓冲器; 根据数据使能信号确定第一和第二缓冲器的访问时间点; 以及根据第二帧速率访问作为第一和第二缓冲器之一并且在访问时间点未被访问的缓冲器，其中第二帧速率比第一帧速率快。

公开(公告)号：US07483768B2

公开(公告)日：2009-01-27

申请号：US11166203

申请日：2005-06-27

Applicant: Yu Pin Chou

Inventor： Yu Pin Chou

IPC: G06F19/00

CPC classification number: G11C5/14

Abstract: An adaptive power managing device for an IC chip or a circuit system comprises a tunable voltage generator, a data generator, a data processing unit, a data checking unit and a control unit; the tunable voltage generator is used for providing the IC chip or the circuit system with an operating voltage; the data generator is used for generating a series of predetermined data to the data processing unit; the data processing unit is used for processing the series of predetermined data and then outputting a series of output data associated with the series of predetermined data; and the data checking unit is used for checking the validity of the series of output data; wherein if the series of output data is checked to be invalid, the control unit outputs a control signal for tuning up the operating voltage; if the series of output data is checked to be valid, the operating voltage is maintained or the control unit outputs another control signal for tuning down the operating voltage whereby efficiently achieving the objective of power management. The present invention also provides an adaptive power managing method.

Abstract translation: 一种用于IC芯片或电路系统的自适应功率管理装置，包括可调电压发生器，数据发生器，数据处理单元，数据检查单元和控制单元; 可调电压发生器用于为IC芯片或电路系统提供工作电压; 数据发生器用于向数据处理单元生成一系列预定数据; 数据处理单元用于处理一系列预定数据，然后输出与一系列预定数据相关联的一系列输出数据; 数据检查单元用于检查一系列输出数据的有效性; 其中如果所述一系列输出数据被检查为无效，则所述控制单元输出用于调谐所述工作电压的控制信号; 如果一系列输出数据被检查为有效，则维持工作电压，或者控制单元输出另一控制信号以调低工作电压，从而有效地实现电源管理的目的。 本发明还提供一种自适应功率管理方法。

公开(公告)号：US20080079511A1

公开(公告)日：2008-04-03

申请号：US11863286

申请日：2007-09-28

Applicant: Yu-Pin Chou

Inventor： Yu-Pin Chou

IPC: H03H7/40

CPC classification number: H03H7/40

Abstract: The invention relates to an impedance matching circuit including: an input terminal for receiving an input signal; a variable impedance unit, coupled to the input terminal, having an equivalent impedance for providing the input terminal with an input impedance; a signal quality evaluating unit, coupled to the input terminal, for evaluating a signal quality of the input signal; and a control unit coupled to the variable impedance unit and the signal quality evaluating unit, for outputting a target control signal according to an evaluating result of the signal quality evaluating unit to adjust the equivalent impedance of the variable impedance unit.

Abstract translation: 本发明涉及一种阻抗匹配电路，包括：输入端，用于接收输入信号; 耦合到输入端的可变阻抗单元具有用于向输入端提供输入阻抗的等效阻抗; 信号质量评估单元，耦合到输入端，用于评估输入信号的信号质量; 以及耦合到所述可变阻抗单元和所述信号质量评估单元的控制单元，用于根据所述信号质量评估单元的评估结果输出目标控制信号，以调整所述可变阻抗单元的等效阻抗。

公开(公告)号：US20080061854A1

公开(公告)日：2008-03-13

申请号：US11847343

申请日：2007-08-30

Applicant: Hsu-Jung Tung ,  Chi-Kung Kuan ,  Yu-Pin Chou

Inventor： Hsu-Jung Tung ,  Chi-Kung Kuan ,  Yu-Pin Chou

IPC: G06F1/04

CPC classification number: H04N7/56 ,  H04N5/04 ,  H04N5/126 ,  H04N5/602 ,  H04N21/2368 ,  H04N21/4305 ,  H04N21/4341 ,  H04N21/439

Abstract: An apparatus for generating an audio output clock is disclosed. The apparatus at least includes a plurality of dividers and a frequency synthesizer. The apparatus utilizes the dividers to achieve dispersive frequency-division operations such that the anti-noise ability of the apparatus can be improved. In addition, the apparatus also utilizes dynamic phase adjustment to increase accuracy of the frequency of the audio output clock.

Abstract translation: 公开了一种用于产生音频输出时钟的装置。 该装置至少包括多个分频器和频率合成器。 该装置利用分频器实现色散分频操作，从而可以提高装置的抗噪声能力。 此外，该装置还利用动态相位调整来提高音频输出时钟频率的精度。

公开(公告)号：US07218261B2

公开(公告)日：2007-05-15

申请号：US11306638

申请日：2006-01-05

Applicant: Jin-Sheng Gong ,  Yu-Pin Kuo ,  Yu-Pin Chou ,  Hung-Jen Chu

Inventor： Jin-Sheng Gong ,  Yu-Pin Kuo ,  Yu-Pin Chou ,  Hung-Jen Chu

IPC: H03M1/00

CPC classification number: H03M1/1245

Abstract: A method of adjusting a sampling condition to generate a sampling clock in an analog to digital converter includes performing an analog to digital conversion on an analog input signal to thereby produce a digital sampled signal having a plurality of samples; calculating a difference value between two adjacent samples in the digital sampled signal; comparing the difference value with a threshold; adding the difference value into a sum of differences value if the difference value is greater than the threshold; and generating the sampling clock for the analog to digital converter according to the sum of differences value.

Abstract translation: 一种调整采样条件以在模数转换器中产生采样时钟的方法包括对模拟输入信号执行模数转换，从而产生具有多个采样的数字采样信号; 计算数字采样信号中两个相邻采样之间的差值; 将差值与阈值进行比较; 如果所述差值大于所述阈值，则将所述差值加到差值的和中; 并根据差值的和生成模数转换器的采样时钟。

公开(公告)号：US20060164551A1

公开(公告)日：2006-07-27

申请号：US11279251

申请日：2006-04-11

Applicant: Chi-Feng Wang ,  Jui-Yuan Tsai ,  Yu-Pin Chou ,  Jin-Sheng Gong

Inventor： Chi-Feng Wang ,  Jui-Yuan Tsai ,  Yu-Pin Chou ,  Jin-Sheng Gong

IPC: H03M1/12 ,  H04N5/14 ,  H04N5/05 ,  H04N9/455 ,  H04N9/64 ,  H04N5/45 ,  H04N9/44

CPC classification number: G09G5/04 ,  G09G3/2092

Abstract: An analog front-end (AFE) circuit of a digital display is disclosed including: a first circuit to intermittently invert a working clock to generate a control signal and to generate a sampling signal, wherein the sampling signal is corresponding to the working clock; a first analog-to-digital converter (ADC) coupled to the first circuit for converting an analog video signal into a first digital video signal according to the sampling signal; a second analog-to-digital converter coupled to the first circuit for converting the analog video signal into a second digital video signal according to the sampling signal; and a first multiplexer for selectively outputting the first digital video signal or the second digital video signal according to the control signal.

Abstract translation: 公开了一种数字显示器的模拟前端（AFE）电路，包括：第一电路，间歇地反转工作时钟以产生控制信号并产生采样信号，其中采样信号对应于工作时钟; 耦合到第一电路的第一模数转换器（ADC），用于根据采样信号将模拟视频信号转换成第一数字视频信号; 耦合到第一电路的第二模数转换器，用于根据采样信号将模拟视频信号转换成第二数字视频信号; 以及第一多路复用器，用于根据控制信号选择性地输出第一数字视频信号或第二数字视频信号。

公开(公告)号：US20050286626A1

公开(公告)日：2005-12-29

申请号：US11165029

申请日：2005-06-24

Applicant: Yu-Pin Chou ,  Chao-Hsin Lu

Inventor： Yu-Pin Chou ,  Chao-Hsin Lu

IPC: H03K5/159 ,  H04L27/01

CPC classification number: H04L25/03019 ,  H04L2025/03764

Abstract: A method for adjusting parameters of an adaptive equalizer makes use of a transmitted signal received by a receiving end to adjust parameters of an adaptive equalizer. First, signal strengths of a first frequency band and a second frequency band in the transmitted signal are detected. The signal strengths of the first frequency band and the second frequency band are then compared to get a compensation ratio, i.e., the total compensation quantity of the first frequency band to the second frequency band. Finally, the parameter setting of the equalizer is adjusted according to feedback of the compensation ratio. Optimum gain control of the adaptive equalizer can thus be accomplished to compensate signal attenuation to the transmitted signal caused by the channel.

Abstract translation: 用于调整自适应均衡器的参数的方法利用由接收端接收到的发送信号来调整自适应均衡器的参数。 首先，检测发送信号中的第一频带和第二频带的信号强度。 然后比较第一频带和第二频带的信号强度，以获得补偿比，即第一频带到第二频带的总补偿量。 最后，根据补偿比的反馈调整均衡器的参数设置。 因此，可以实现自适应均衡器的最佳增益控制，以补偿由信道引起的对发射信号的信号衰减。

公开(公告)号：US20050275612A1

公开(公告)日：2005-12-15

申请号：US11160229

申请日：2005-06-14

Applicant: Yu-Pin Chou ,  Shiu-Rong Tong ,  Wen- Hsia Kung

Inventor： Yu-Pin Chou ,  Shiu-Rong Tong ,  Wen- Hsia Kung

IPC: G09G3/36

CPC classification number: G09G3/3614 ,  G09G3/3648 ,  G09G3/3688 ,  G09G2320/0247

Abstract: A method for controlling an LCD to display an image. The method includes receiving a display data flow, generating a polarity signal, generating a gray-scale signal according to the polarity signal and the display data flow, and driving a pixel unit to display image according to the gray-scale signal. The polarity signal is substantially DC-balanced. A display utilizing such method may reduce the influence of flicker phenomenon.

Abstract translation: 一种用于控制LCD以显示图像的方法。 该方法包括接收显示数据流，产生极性信号，根据极性信号和显示数据流产生灰度信号，并驱动像素单元根据灰度信号显示图像。 极性信号基本上是直流平衡的。 利用这种方法的显示器可以减少闪烁现象的影响。