公开(公告)号：US20250159931A1

公开(公告)日：2025-05-15

申请号：US19024444

申请日：2025-01-16

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Ce Ning ,  Hehe Hu ,  Tianmin Zhou ,  Jipeng Song

IPC: H10D30/67

Abstract: The present disclosure provides a thin film transistor, a GOA circuit and an array substrate, the thin film transistor comprising: a source electrode, including a source electrode wiring and a plurality of source electrode branches; a drain electrode, including a drain electrode wiring and a plurality of drain electrode branches; a gate; a semiconductor layer comprising a plurality of semiconductor branches; a plurality of source electrode branches, wherein the plurality of drain electrode branches are in contact with the plurality of semiconductor branches and are divided into a plurality of cells; the source electrode wiring and the drain electrode wiring are arranged in a parallel and spaced apart, and the number m of one of the source electrode wiring and the drain electrode wiring is an integer greater than or equal to 2, and the number n of the other is an integer greater than or equal to 1.

公开(公告)号：US20250142886A1

公开(公告)日：2025-05-01

申请号：US18686647

申请日：2021-08-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guangcai Yuan ,  Lingyan Liang ,  Hongtao Cao ,  Fengjuan Liu ,  Ce Ning ,  Fei Wang ,  Hehe Hu ,  Hengbo Zhang

IPC: H10D30/67 ,  H10D62/10 ,  H10D86/40

Abstract: A thin film transistor includes a substrate; and a semiconductor layer a gate, a source electrode and a drain electrode; which are arranged on the substrate. The semiconductor layer includes a first material layer and a second material layer which are stacked, wherein a material of the first material layer is selected from one of or a combination of first n-type metal oxide semiconductor materials, and a material of the second material layer is selected from one of or a combination of second n-type metal oxide semiconductor materials. A carrier mobility of a first n-type metal oxide semiconductor material is greater than or equal to 40 cm2/Vs, and a second n-type metal oxide semiconductor material is doped with Y, Y being selected from one of or a combination of rare earth elements. The first material layer is closer to the gate than the second material layer.

公开(公告)号：US12272754B2

公开(公告)日：2025-04-08

申请号：US17761549

申请日：2021-05-18

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu He ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Jie Huang ,  Nianqi Yao ,  Zhi Wang ,  Feng Guan

IPC: H01L29/786 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66

Abstract: A thin film transistor, a manufacturing method thereof, a display substrate, and a display device are provided. The thin film transistor includes: a substrate, an active layer, a gate, a source and a drain. The active layer is arranged on the substrate and formed as a grid, including silicon nanowires extending along a first direction, the active layer includes source and drain regions oppositely arranged along the first direction, and a channel region located therebetween. The gate is arranged on the substrate, and an orthographic projection of the gate onto the substrate overlaps with orthographic projections for silicon nanowires in the channel region onto the substrate. The source and drain are arranged on the substrate, the source contacts silicon nanowires in the source region, and the drain contacts silicon nanowires in the drain region.

公开(公告)号：US12235554B2

公开(公告)日：2025-02-25

申请号：US18026489

申请日：2022-06-22

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong Wang ,  Ce Ning ,  Dongfang Wang ,  Hui Guo

IPC: G02F1/1362 ,  G02F1/1368

Abstract: A display substrate, a display panel and a display apparatus. The display substrate includes a first base substrate; a plurality of gate lines and a plurality of data lines which are arranged on a side of the first base substrate; the plurality of gate lines and the plurality of data lines are arranged to be intersected with each other and insulated from each other; a planarization layer, arranged on a side of the gate lines and the data lines away from the first base substrate, and including a first via hole; and a supporting structure, arranged on a side of the planarization layer away from the first base substrate and filled into the first via hole; and in a direction perpendicular to the first base substrate, a height of the supporting structure is greater than a depth of the first via hole.

公开(公告)号：US12230340B2

公开(公告)日：2025-02-18

申请号：US17996293

申请日：2021-11-30

Applicant: BOE Technology Group Co., Ltd.

Inventor： Yunsik Im ,  Shunhang Zhang ,  Fuqiang Li ,  Changfeng Li ,  Liwei Liu ,  Hehe Hu ,  Ce Ning ,  Hui Zhang ,  Hongrun Wang ,  Zhuo Li

IPC: G11C19/28 ,  G09G3/20 ,  G09G3/3266 ,  G09G3/36

Abstract: The present disclosure provides a shift register unit, a gate driving circuit and a display device. The shift register unit provided by the present disclosure includes: an input sub-circuit, an output sub-circuit, at least one pull-down control sub-circuit, at least one pull-down sub-circuit, at least one first noise reduction sub-circuit, and a reverse bias sub-circuit; the reverse bias sub-circuit is configured to control transistors in at least part of sub-circuits connected to a pull-up node to be in a reverse bias state through a power voltage signal in response to a potential of the pull-up node, or control the transistors in at least part of the sub-circuits connected to the pull-up node to be in the reverse bias state through a cascade signal in response to a potential of a cascade signal terminal.

公开(公告)号：US12226772B2

公开(公告)日：2025-02-18

申请号：US17432580

申请日：2021-01-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen Ma ,  Ce Ning ,  Guangcai Yuan ,  Xin Gu ,  Zhengliang Li

IPC: B01L3/00 ,  C23C14/04 ,  C23C14/34

Abstract: A biochip and a method for manufacturing the same are provided. The biochip includes: a guide layer; a channel layer on the guide layer, wherein the channel layer has therein a plurality of first channels extending in a first direction; a plurality of second channels extending in a second direction, wherein each of the plurality of second channels is in communication with the plurality of first channels, the plurality of second channels are in a layer where the channel layer is located, or in a layer where the channel layer and the guide layer are located; an encapsulation cover plate on a side of the channel layer distal to the guide layer; and a driving unit configured to drive biomolecules to move.

公开(公告)号：US12222607B2

公开(公告)日：2025-02-11

申请号：US18024004

申请日：2022-05-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Yong Yu ,  Shi Shu ,  Chuanxiang Xu ,  Yang Yue ,  Xiang Li ,  Shaohui Li ,  Ce Ning ,  Jinchao Zhang ,  Qi Yao ,  Lizhong Wang

IPC: G02F1/1339 ,  G02F1/1333 ,  G02F1/1335 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1368

Abstract: The disclosure provides a liquid crystal display panel and a display apparatus. The liquid crystal display panel of the disclosure includes: first and second substrates assembled to form a cell, a plurality of main spacers therebetween, and an auxiliary spacer around at least a portion of the main spacers. Height of the auxiliary spacer is greater than or equal to that of the main spacer. The display panel further includes: pillows on side of the first substrate close to the second substrate and each abutting against a corresponding main spacer. An orthographic projection of the main spacer on the first substrate falls within an orthographic projection of the pillow on the first substrate, and an orthographic projection of the auxiliary spacer on the first substrate does not overlap with the orthographic projection of the pillow on the first substrate.

公开(公告)号：US12041825B2

公开(公告)日：2024-07-16

申请号：US17429935

申请日：2020-11-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu He ,  Ce Ning ,  Zhengliang Li ,  Hehe Hu ,  Jie Huang ,  Nianqi Yao ,  Xue Liu

IPC: H10K59/13 ,  H10K59/124 ,  H10K59/126 ,  H10K59/38 ,  H10K71/00 ,  H10K59/12

CPC classification number: H10K59/13 ,  H10K59/124 ,  H10K59/126 ,  H10K59/38 ,  H10K71/00 ,  H10K59/1201

Abstract: An organic electroluminescent display substrate is provided, which includes a base substrate, and a light-emitting unit and a light-sensing unit arranged on the base substrate, wherein the light-sensing unit is arranged on a light-emitting side of the light-emitting unit, and configured for sensing an intensity of light emitted from the light-emitting unit; a first planarization layer is arranged between the light-sensing unit and the light-emitting unit; the light-sensing unit comprises a first thin film transistor and a photosensitive sensor arranged sequentially in that order in a direction away from the base substrate, and a second planarization layer is arranged between the photosensitive sensor and the first thin film transistor. A display panel, a display device and a method for manufacturing the organic electroluminescent display substrate are further provided.

公开(公告)号：US11798959B2

公开(公告)日：2023-10-24

申请号：US16965495

申请日：2019-07-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei Yang ,  Guangcai Yuan ,  Ce Ning ,  Xinhong Lu ,  Tianmin Zhou ,  Lizhong Wang

IPC: H01L27/00 ,  H01L27/12

CPC classification number: H01L27/1288 ,  H01L27/1248

Abstract: Provided are an array substrate and a manufacturing method thereof, the manufacturing method includes: forming a first active layer on a base substrate; forming a second active layer; forming a second gate on the second active layer; forming a first insulating layer covering the first active layer on the second gate; patterning the first insulating layer to form first via holes at both sides of the second gate to expose the second active layer; depositing a first metal layer in the first via holes and on the first insulating layer; patterning the first metal layer, removing a part of the first metal layer above the first active layer to expose the first insulating layer; etching the first insulating layer using the patterned first metal layer as a mask, forming second via holes above the first active layer to expose the first active layer; cleaning the exposed first active layer.

公开(公告)号：US20230317740A1

公开(公告)日：2023-10-05

申请号：US18021090

申请日：2022-03-04

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong Wang ,  Ce Ning ,  Yunping Di ,  Binbin Tong ,  Rui Huang ,  Tianmin Zhou ,  Wei Yang ,  Liping Lei

IPC: H01L27/12 ,  G02F1/1362 ,  G02F1/1368

CPC classification number: H01L27/1251 ,  H01L27/1225 ,  H01L27/124 ,  G02F1/136209 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/127

Abstract: The present application provides an array substrate, a manufacturing method for the same, and a display panel. The array substrate includes a display area and a non-display area connected to the display area, and the display area includes a plurality of sub-pixels arranged in an array. The non-display area includes at least one polysilicon transistor, each of the sub-pixels includes an oxide transistor and a pixel electrode. A gate of the oxide transistor as well as a first electrode and a second electrode of the polysilicon transistor are arranged in a same layer; an active layer of the oxide transistor and the pixel electrode are arranged in a same layer, and are in contact with each other. The active layer of the oxide transistor includes an oxide semiconductor material, and the pixel electrode includes an oxide conductor material.