Minimizing network latency in interactive internet applications
    63.
    发明授权
    Minimizing network latency in interactive internet applications 有权
    最大限度地减少交互式互联网应用中的网络延迟

    公开(公告)号:US09059817B2

    公开(公告)日:2015-06-16

    申请号:US12951908

    申请日:2010-11-22

    摘要: A method and system that enhances a user's performance while interacting with an interactive internet application such as a Massively Multiplayer Online (MMO) game is provided. The network latency experienced by users participating in the MMO game is minimized by dynamically determining an optimal transmission action for a message generated by the MMO game. In one embodiment, determining the optimal transmission action for a message includes dynamically determining the optimal number of redundant Forward Error Correction (FEC) packets to add to a message prior to transmitting a message to a receiving device. The optimal number of FEC packets is determined based on a wide range of varying network conditions.

    摘要翻译: 提供了一种在与诸如大型多人在线(MMO)游戏之类的交互式互联网应用交互的同时增强用户表现的方法和系统。 通过动态地确定由MMO游戏产生的消息的最佳传输动作,使参与MMO游戏的用户经历的网络延迟最小化。 在一个实施例中,确定消息的最佳传输动作包括在将消息发送到接收设备之前动态地确定要添加到消息的冗余前向纠错(FEC)分组的最佳数量。 基于广泛的变化的网络条件来确定FEC分组的最佳数量。

    Compounds and methods for kinase modulation, and indications therefor
    64.
    发明授权
    Compounds and methods for kinase modulation, and indications therefor 有权
    用于激酶调节的化合物和方法及其适应症

    公开(公告)号:US08901118B2

    公开(公告)日:2014-12-02

    申请号:US13090969

    申请日:2011-04-20

    CPC分类号: C07D487/04 C07D471/04

    摘要: Compounds and salts thereof, formulations thereof, conjugates thereof, derivatives thereof, forms thereof and uses thereof are described, wherein the compounds have formula I: In certain aspects and embodiments, the described compounds or salts thereof, formulations thereof, conjugates thereof, derivatives thereof, forms thereof are active on one or more of Fms, Kit, Flt3, TrkA, TrkB and TrkC kinase protein. Also described are methods of use thereof to treat diseases and conditions, including diseases and conditions associated with activity of one or more of Fms, Kit, Flt3, TrkA, TrkB and TrkC, including rheumatoid arthiritis, osteoarthritis, osteoporosis, peri-prosthetic osteolysis, systemic sclerosis, demyelinating disorders, multiple sclerosis, Charcot Marie Tooth syndrome, amyotrophic lateral sclerosis, Alzheimer's disease, Parkinson's disease, global ischemia, ulcerative colitis, Crohn's disease, immune thrombocytopenic purpura, atherosclerosis, systemic lupus erythematosis, myelopreparation for autologous transplantation, transplant rejection, glomerulonephritis, interstitial nephritis, Lupus nephritis, tubular necrosis, diabetic nephropathy, renal hypertrophy, type I diabetes, acute pain, inflammatory pain, neuropathic pain, acute myeloid leukemia, melanoma, multiple myeloma, breast cancer, prostate cancer, pancreatic cancer, lung cancer, ovarian cancer, gliomas, glioblastoma, neurofibromatosis, osteolytic bone metastases, brain metasteses, gastrointestinal stromal tumors, and giant cell tumors.

    摘要翻译: 描述了其化合物和盐,其制剂,其缀合物,其衍生物,其形式及其用途,其中所述化合物具有式I:在某些方面和实施方案中,所述的化合物或其盐,其制剂,其缀合物,其衍生物 其形式在Fms,Kit,Flt3,TrkA,TrkB和TrkC激酶蛋白中的一种或多种上是有活性的。 还描述了其用于治疗疾病和病症的方法,包括与Fms,Kit,Flt3,TrkA,TrkB和TrkC中的一种或多种的活性相关的疾病和病症,包括类风湿性关节炎,骨关节炎,骨质疏松症,假体周围骨质溶解, 系统性硬化症,脱髓鞘疾病,多发性硬化症,Charcot玛丽牙综合征,肌萎缩性侧索硬化症,阿尔茨海默氏病,帕金森病,全球缺血,溃疡性结肠炎,克罗恩病,免疫性血小板减少性紫癜,动脉粥样硬化,系统性红斑狼疮,自体移植骨髓移植,移植排斥 肾小球肾炎,间质性肾炎,狼疮性肾炎,肾小管坏死,糖尿病性肾病,肾肥大,I型糖尿病,急性疼痛,炎性疼痛,神经性疼痛,急性骨髓性白血病,黑素瘤,多发性骨髓瘤,乳腺癌,前列腺癌,胰腺癌,肺癌 癌症,卵巢癌,神经胶质瘤,成胶质细胞瘤,神经 纤维瘤病,溶骨性骨转移,脑转移,胃肠道间质瘤和巨细胞瘤。

    Method of fabricating dual trench isolated epitaxial diode array
    66.
    发明授权
    Method of fabricating dual trench isolated epitaxial diode array 有权
    制造双沟槽隔离外延二极管阵列的方法

    公开(公告)号:US08476085B1

    公开(公告)日:2013-07-02

    申请号:US13203135

    申请日:2011-06-23

    IPC分类号: H01L21/00

    摘要: The present invention discloses a method of fabricating dual trench isolated epitaxial diode array. This method starts with the formation of heavily-doped first conductivity type regions and heavily-doped second conductivity type regions on the substrate, followed by epitaxial growth, then the formation of the isolations between diode array word lines by deep trench etch and the formation of the isolations between bit lines vertical to deep trenches by shallow trench etch, and finally the formation of separate diode array cells in the regions enclosed by deep and shallow trench isolations by ion implantation. This invention also provides a method of preventing the crosstalk current between adjacent word lines and bit lines of epitaxial diode arrays isolated by foregoing dual shallow trenches. This invention can be used for diode-driven, high-density, large-capacity memory, such as phase change random access memory, resistive memory, magnetic memory and ferroelectric memory; the method thereof is completely compatible with conventional complementary metal-oxide semiconductor (CMOS) process, and because the diode arrays can be formed before the formation of peripheral circuits, no drift of peripheral circuits will be caused by the thermal process thereof, thereby solving the technical challenge of fabricating high-density, large-capacity embedded phase change random access memory.

    摘要翻译: 本发明公开了一种制造双沟槽隔离外延二极管阵列的方法。 该方法开始于在衬底上形成重掺杂的第一导电类型区域和重掺杂的第二导电类型区域,随后进行外延生长,然后通过深沟槽蚀刻形成二极管阵列字线之间的隔离,并形成 通过浅沟槽蚀刻垂直于深沟槽的位线之间的隔离,最后通过离子注入由深和浅沟槽隔离所包围的区域中形成分离的二极管阵列单元。 本发明还提供了一种防止由前述的双浅沟槽隔离的外延二极管阵列的相邻字线和位线之间的串扰电流的方法。 本发明可用于二极管驱动,高密度,大容量存储器,如相变随机存取存储器,电阻存储器,磁存储器和铁电存储器; 其方法与常规的互补金属氧化物半导体(CMOS)工艺完全兼容,并且由于可以在外围电路形成之前形成二极管阵列,所以不会由于其热处理而引起外围电路的漂移,从而解决了 制造高密度,大容量嵌入式相变随机存取存储器的技术挑战。

    METHOD OF EPITAXIAL GROWTH EFFECTIVELY PREVENTING AUTO-DOPING EFFECT
    67.
    发明申请
    METHOD OF EPITAXIAL GROWTH EFFECTIVELY PREVENTING AUTO-DOPING EFFECT 有权
    有效防止自动排污效果的外源生长方法

    公开(公告)号:US20130145984A1

    公开(公告)日:2013-06-13

    申请号:US13202944

    申请日:2011-06-27

    IPC分类号: C30B25/18 C30B23/02

    摘要: This invention relates to a method of epitaxial growth effectively preventing auto-doping effect. This method starts with the removal of impurities from the semiconductor substrate having heavily-doped buried layer region and from the inner wall of reaction chamber to be used. Then the semiconductor substrate is loaded in the cleaned reaction chamber to be pre-baked under vacuum conditions so as to remove moisture and oxide from the surface of said semiconductor substrate before the extraction of the dopant atoms desorbed from the surface of the semiconductor substrate. Next, under high temperature and low gas flow conditions, a first intrinsic epitaxial layer is formed on the surface of said semiconductor substrate where the dopant atoms have been extracted out. Following this, under low temperature and high gas flow conditions, a second epitaxial layer of required thickness is formed on the structural surface of the grown intrinsic epitaxial layer. Last, silicon wafer is unloaded after cooling. This method can prevent auto-doping effect during the epitaxial growth on semiconductor substrate and thus ensure the performance and enhance the reliability of the devices in peripheral circuit region.

    摘要翻译: 本发明涉及一种有效防止自掺杂效应的外延生长方法。 该方法首先从具有重掺杂掩埋层区域的半导体衬底和要使用的反应室的内壁去除杂质。 然后将半导体衬底装载在清洁的反应室中,以在真空条件下进行预烘烤,以便在从半导体衬底的表面脱附的掺杂剂原子提取之前从所述半导体衬底的表面去除水分和氧化物。 接下来,在高温低气体流动条件下,在所述半导体衬底的已经提取出掺杂剂原子的表面上形成第一本征外延层。 接下来,在低温和高气体流动条件下,在生长的本征外延层的结构表面上形成所需厚度的第二外延层。 最后,冷却后硅片卸载。 该方法可以防止在半导体衬底上的外延生长期间的自掺杂效应,从而确保外围电路区域中器件的性能和可靠性。