公开(公告)号：US06230248B1

公开(公告)日：2001-05-08

申请号：US09170140

申请日：1998-10-12

申请人： Stephen G. Burger ,  James O. Hays ,  Jonathan K. Ross ,  William R. Bryg ,  Rajiv Gupta ,  Gary N. Hammon ,  Koichi Yamada

发明人： Stephen G. Burger ,  James O. Hays ,  Jonathan K. Ross ,  William R. Bryg ,  Rajiv Gupta ,  Gary N. Hammon ,  Koichi Yamada

IPC分类号： G06F1216

CPC分类号： G06F12/1036

摘要： A method and apparatus pre-validate regions in a virtual addressing scheme by storing both the virtual region number (VRN) bits and region identifiers (RIDs) in translation lookaside buffer (TLB) entries. By storing both the VRN bits and RIDs in TLB entries, the region registers can be bypassed when performing most TLB accesses, thereby removing region registers the critical path of the TLB look-up process and enhancing system performance. A TLB in accordance with the present invention includes entries having a valid field, a region pre-validation valid (rpV) field, a virtual region number (VRN) field, a virtual page number (VPN) field, a region identifier (RID) field, a protection and access attributes field, and a physical page number (PPN) field. In addition, a set of region registers contains the RIDs that are active at any given time. When a virtual-to-physical entry is established for a page in a region having an RID stored in a region register, the RID and VRN are stored in the appropriate fields of the TLB entry. In addition, the valid field is set and the rpV field is set to indicate that the TLB entry contains an active VRN-to-RID mapping, thereby pre-validating the region. When a physical address is translated into a virtual address, a VRN and a VPN are extracted from the virtual address and provided to the TLB. The TLB is searched to find an entry having a set valid field, a set rpV field, and VRN and VPN fields containing entries matching the VRN and VPN extracted from the virtual address. If such an entry is found, the protection and access attributes field is used to determine whether the requested access is allowed. If the requested access is allowed, the PPN from the PPN field of the TLB entry is combined with an offset from the virtual address to produce a physical address that is used to complete the memory access.

摘要翻译： 一种方法和装置通过将虚拟区域号（VRN）位和区域标识符（RID）存储在翻译后备缓冲器（TLB）条目中来对虚拟寻址方案中的区域进行预验证。 通过将VRN位和RID都存储在TLB表中，可以在执行大多数TLB访问时旁路区域寄存器，从而去除区域寄存器中TLB查找过程的关键路径并提高系统性能。 根据本发明的TLB包括具有有效字段，区域预验证有效（rpV）字段，虚拟区域号（VRN）字段，虚拟页号（VPN）字段），区域标识符（RID） 字段，保护和访问属性字段以及物理页号（PPN）字段。 此外，一组区域寄存器包含在任何给定时间处于活动状态的RID。 当在具有存储在区域寄存器中的RID的区域中的页面建立虚拟到物理条目时，RID和VRN被存储在TLB条目的相应字段中。 另外，设置有效字段，并且设置rpV字段以指示TLB条目包含活动的VRN到RID映射，从而预先验证该区域。 当物理地址被转换为虚拟地址时，从虚拟地址提取VRN和VPN，并提供给TLB。 搜索TLB以找到具有设置的有效字段，集合rpV字段的条目，以及包含与从虚拟地址提取的VRN和VPN匹配的条目的VRN和VPN字段。 如果找到这样的条目，则使用保护和访问属性字段来确定所请求的访问是否被允许。 如果允许所请求的访问，则来自TLB条目的PPN字段的PPN与来自虚拟地址的偏移组合，以产生用于完成存储器访问的物理地址。

公开(公告)号：US5996083A

公开(公告)日：1999-11-30

申请号：US514284

申请日：1995-08-11

申请人： Rajiv Gupta ,  Prasad Raje

发明人： Rajiv Gupta ,  Prasad Raje

IPC分类号： G06F1/04 ,  G06F1/08 ,  G06F1/32 ,  G06F9/38 ,  G06F15/78 ,  G06F1/00

CPC分类号： G06F9/3885 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3275 ,  G06F1/3287 ,  G06F1/3296 ,  G06F9/30083 ,  G06F9/3836 ,  G06F9/3869 ,  Y02B60/1217 ,  Y02B60/1228 ,  Y02B60/1282 ,  Y02B60/1285

摘要： A microprocessor is provided which includes a power control register for controlling the rate of execution and therefore the power consumption of individual functional units. The power control register includes a plurality of fields corresponding to the functional units for storing values that control the power consumption of each. The power control register fields can be set by software which has the much greater ability to look out into the future to determine whether the functional units will be required. The functional units are responsive to the corresponding power control register field to adjust their rate of execution responsive to the value stored therein. The rate of execution can be controlled in a number of different ways: dividing down the clock; removing power to the functional unit; disabling the sensor and/or buffer driver of one or more of the ports in a multi-ported RAM; removing data from the functional unit; and changing the data bus width responsive to the control register field. The microprocessor also includes a latency control register which assures that the functional unit is operational after the functional unit is placed from a low power state to a more fully operational state by changing the corresponding field in the power control register.

摘要翻译： 提供了一种微处理器，其包括用于控制执行速率并因此控制各个功能单元的功率消耗的功率控制寄存器。 功率控制寄存器包括对应于功能单元的多个场，用于存储控制每个功率消耗的值。 功率控制寄存器字段可以通过软件来设置，该软件具有更大的能力，以期望将来确定是否需要功能单元。 功能单元响应于相应的功率控制寄存器字段来响应于存储在其中的值来调整其执行速率。 执行速度可以通过多种不同的方式进行控制：按时间排序; 去除功能单元的电力; 禁用多端口RAM中的一个或多个端口的传感器和/或缓冲器驱动器; 从功能单元移除数据; 并且响应于控制寄存器字段来改变数据总线宽度。 微处理器还包括等待时间控制寄存器，其通过改变功率控制寄存器中的相应字段来确保功能单元在功能单元从低功率状态放置到更完全操作状态之后是可操作的。

公开(公告)号：US5915117A

公开(公告)日：1999-06-22

申请号：US949295

申请日：1997-10-13

申请人： Jonathan K. Ross ,  Jack D. Mills ,  James O. Hays ,  Stephen G. Burger ,  Dale C. Morris ,  Carol L. Thompson ,  Rajiv Gupta ,  Stefan M. Freudenberger ,  Gary N. Hammond ,  Ralph M. Kling

发明人： Jonathan K. Ross ,  Jack D. Mills ,  James O. Hays ,  Stephen G. Burger ,  Dale C. Morris ,  Carol L. Thompson ,  Rajiv Gupta ,  Stefan M. Freudenberger ,  Gary N. Hammond ,  Ralph M. Kling

IPC分类号： G06F9/38

CPC分类号： G06F9/3865 ,  G06F9/3842

摘要： The inventive system and method allows for software control of hardware drral of exceptions in speculative operations, and comprises three components. The first component is processor stored information which reflects the code generation strategy of applications and is used by hardware and the operating system to control exception deferral. The second component is processor stored information set by the operating system to specify to hardware which type of faults should be automatically deferred. The third component is further processor stored information which indicates to the hardware to defer certain exception causing aspects of the speculative operation, while performing other non excepting aspects of the speculative operation. The stored information is set after the operating system exception handler has unsuccessfully attempted fault resolution.

摘要翻译： 本发明的系统和方法允许软件控制在推测操作中硬件推迟异常，并且包括三个组件。 第一个组件是反映应用程序的代码生成策略的处理器存储信息，由硬件和操作系统用来控制异常延期。 第二个组件是由操作系统设置的处理器存储信息，用于指定硬件哪种类型的故障应该自动延迟。 第三组件是进一步处理器存储的信息，其指示硬件推迟导致投机操作方面的某些异常，同时执行投机操作的其他非例外方面。 存储的信息在操作系统异常处理程序未成功尝试故障解决之后进行设置。

公开(公告)号：US5742804A

公开(公告)日：1998-04-21

申请号：US685607

申请日：1996-07-24

申请人： Tse-Yu Yeh ,  Mircea Poplingher ,  Kent G. Fielden ,  Hans Mulder ,  Rajiv Gupta ,  Dale Morris ,  Michael Schlansker

发明人： Tse-Yu Yeh ,  Mircea Poplingher ,  Kent G. Fielden ,  Hans Mulder ,  Rajiv Gupta ,  Dale Morris ,  Michael Schlansker

IPC分类号： G06F9/38

CPC分类号： G06F9/3804 ,  G06F9/3836 ,  G06F9/3846

摘要： A processor and method that reduces instruction fetch penalty in the execution of a program sequence of instructions comprises a branch predict instruction that is inserted into the program at a location which precedes the branch. The branch predict instruction has an opcode that specifies a branch as likely to be taken or not taken, and which also specifies a target address of the branch. A block of target instructions, starting at the target address, is prefetched into the instruction cache of the processor so that the instructions are available for execution prior to the point in the program where the branch is encountered. Also specified by the opcode is an indication of the size of the block of target instructions, and a trace vector of a path in the program sequence that leads to the target from the branch predict instruction for better utilization of limited memory bandwidth.

摘要翻译： 在程序指令序列的执行中减少指令提取损失的处理器和方法包括在分支之前的位置处插入到程序中的分支预测指令。 分支预测指令具有指定可能被采用或未被采用的分支的操作​​码，并且还指定分支的目标地址。 从目标地址开始的目标指令块被预取到处理器的指令高速缓存中，使得指令在程序中遇到分支的点之前可用于执行。 操作码还指定了目标指令块的大小的指示，以及由分支预测指令导致目标的程序序列中的路径的跟踪向量，以更好地利用有限的存储器带宽。

公开(公告)号：US5514951A

公开(公告)日：1996-05-07

申请号：US226198

申请日：1994-04-11

申请人： Raouf Halim ,  Rajiv Gupta ,  Daryush Shamlou

发明人： Raouf Halim ,  Rajiv Gupta ,  Daryush Shamlou

IPC分类号： G06F1/26 ,  G05F1/56 ,  G05F3/30 ,  H02M3/07 ,  G05F1/40

CPC分类号： H02M3/07 ,  Y10S323/901

摘要： A novel supply discriminator circuit is disclosed for detecting the level of a supply voltage during power-up of a system for configuring an integrated analog circuit such as a PCMCIA card. The circuit compares a reference voltage with a divided down supply voltage and latches the result a predetermined delay later. The delay thus provides timing for the supply voltage to stabilize after power-up to assure accurate detection, as well as noise immunity from other devices.

摘要翻译： 公开了一种新颖的电源鉴别器电路，用于在用于配置诸如PCMCIA卡的集成模拟电路的系统的上电期间检测电源电压的电平。 该电路将参考电压与分压电源电压进行比较，并将结果锁存在预定延迟之后。 延迟因此提供供电电压的定时，以在上电后稳定，以确保准确的检测以及来自其他设备的抗噪声能力。

公开(公告)号：US08321840B2

公开(公告)日：2012-11-27

申请号：US11965271

申请日：2007-12-27

申请人： Vijayanand Nagarajan ,  Ho-Seop Kim ,  Youfeng Wu ,  Rajiv Gupta

发明人： Vijayanand Nagarajan ,  Ho-Seop Kim ,  Youfeng Wu ,  Rajiv Gupta

IPC分类号： G06F9/44

CPC分类号： G06F21/566 ,  G06F8/33 ,  G06F11/3636

摘要： Methods, systems and machine readable media are disclosed for performing dynamic information flow tracking. One method includes executing operations of a program with a main thread, and tracking the main thread's execution of the operations of the program with a tracking thread. The method further includes updating, with the tracking thread, a taint value associated with the value of the main thread to reflect whether the value is tainted, and determining, with the tracking thread based upon the taint value, whether use of the value by the main thread violates a specific security policy.

摘要翻译： 公开了用于执行动态信息流跟踪的方法，系统和机器可读介质。 一种方法包括执行具有主线程的程序的操作，并且使用跟踪线程跟踪主线程对程序的操作的执行。 该方法还包括利用跟踪线程来更新与主线程的值相关联的污点值，以反映该值是否被污染，并且基于该着色值确定跟踪线程是否使用该值 主线程违反了特定的安全策略。

公开(公告)号：US07908182B1

公开(公告)日：2011-03-15

申请号：US11197907

申请日：2005-08-04

申请人： Rajiv Gupta

发明人： Rajiv Gupta

IPC分类号： G06Q30/00

CPC分类号： G06Q30/02 ,  G06F19/00 ,  G06Q20/10 ,  G06Q20/1085 ,  G06Q20/20 ,  G06Q20/204 ,  G06Q30/0631 ,  G06Q40/00 ,  G06Q40/04 ,  G06Q40/06 ,  G06Q50/12 ,  G06Q50/24

摘要： Methods, systems and business models are provided for an effective personal advisor service. According to one embodiment, a personal advisor service performs a method of identifying and notifying a subscriber of the personal advice service of information regarding potential transactions, potential transaction providers, or transactable information determined to address or alleviate a need of the subscriber. First, a computer system of a personal advice service receives information indicative of one or more needs of the subscriber of the advice service. The personal advice service then generates information regarding one or more offers for the subscriber by identifying and selecting among potential transactions, potential transaction providers, or transactable information that are determined to address or alleviate a need of the one or more needs. Finally, the personal advice service causes the one or more offers to be communicated to the subscriber in accordance with a reachability profile established by the subscriber.

摘要翻译： 为有效的个人顾问服务提供方法，系统和商业模式。 根据一个实施例，个人顾问服务执行识别和通知个人咨询服务的用户关于潜在交易，潜在交易提供商或被确定为解决或减轻用户需求的可交易信息的方法。 首先，个人咨询服务的计算机系统接收指示咨询服务的用户的一个或多个需求的信息。 个人咨询服务然后通过识别和选择潜在交易，潜在交易提供者或被确定为解决或减轻对一种或多种需求的需要的可交易信息来生成关于订户的一个或多个提供的信息。 最后，个人建议服务使得一个或多个提议根据用户建立的可达性简档被传送给用户。

公开(公告)号：US07802234B2

公开(公告)日：2010-09-21

申请号：US10751333

申请日：2004-01-02

申请人： Sekhar Sarukkai ,  Didier Guzzoni ,  Rajiv Gupta

发明人： Sekhar Sarukkai ,  Didier Guzzoni ,  Rajiv Gupta

IPC分类号： G06F9/44

CPC分类号： G06F11/3476 ,  G06F11/3447 ,  G06F2201/865

摘要： An integrated development environment (IDE) includes a runtime environment and user interface. A user of the IDE specifies an application component to be monitored, and metrics for the specified application component are transmitted by the IDE runtime environment to a data collector belonging to the IDE user interface for display to the user. In addition, support is offered for the separation of operational concerns from business logic, allowing developers to control the operational aspects from a policy manager of the IDE user interface. Using the policy manager, developers invoke policy agents to add predefined code segments to applications, saving the developer from having to recode the same operational logic each time an application is updated to contain a new policy related to business logic.

摘要翻译： 集成开发环境（IDE）包括运行时环境和用户界面。 IDE的用户指定要监视的应用程序组件，并且指定应用程序组件的度量由IDE运行时环境传输到属于IDE用户界面的数据收集器，以显示给用户。 此外，还提供了将业务问题与业务逻辑分开的支持，允许开发人员从IDE用户界面的策略管理器控制操作方面。 使用策略管理器，开发人员调用策略代理程序将预定义的代码段添加到应用程序中，从而节省开发人员在每次更新应用程序时重新编码相同的操作逻辑，以包含与业务逻辑相关的新策略。

公开(公告)号：US20090315557A1

公开(公告)日：2009-12-24

申请号：US12206279

申请日：2008-09-08

申请人： Alexander H. Slocum, JR. ,  Rajiv Gupta ,  Stephen E. Jones ,  Alexander H. Slocum, SR.

发明人： Alexander H. Slocum, JR. ,  Rajiv Gupta ,  Stephen E. Jones ,  Alexander H. Slocum, SR.

IPC分类号： G01V3/00 ,  A61B5/055

CPC分类号： G01R33/58 ,  A61B5/055 ,  A61B6/583 ,  A61B8/587 ,  B33Y80/00

摘要： A system and method for determining the temporal resolution of a tomographic imaging device uses an apparatus to drive one or more dynamic phantoms composed of multiple materials. The apparatus is placed at or near the isocenter of the imaging device and the one or more phantoms are moved to produce a plurality of dynamic features, each having a specified frequency. The dynamic features are imaged with the device and the acquired image data corresponding to the dynamic features is analyzed to determine a temporal modulation transfer value at each of the known specified frequencies. The temporal resolution of the imaging device is determined using these temporal modulation transfer values.

摘要翻译： 用于确定层析成像装置的时间分辨率的系统和方法使用装置来驱动由多种材料组成的一个或多个动态幻影。 该装置放置在成像装置的等角点处或附近，并且移动一个或多个幻影以产生多个具有指定频率的动态特征。 利用设备对动态特征进行成像，并分析对应于动态特征的获取的图像数据，以确定每个已知指定频率处的时间调制转移值。 使用这些时间调制转移值来确定成像装置的时间分辨率。

公开(公告)号：US07400940B2

公开(公告)日：2008-07-15

申请号：US10871536

申请日：2004-06-21

申请人： Douglas D. McRae ,  John L. Felter ,  Clinton E. Blake ,  Mark T. Capps ,  Kenneth A. Cox ,  David H. Keeler ,  Rajiv Gupta

发明人： Douglas D. McRae ,  John L. Felter ,  Clinton E. Blake ,  Mark T. Capps ,  Kenneth A. Cox ,  David H. Keeler ,  Rajiv Gupta

IPC分类号： G05B21/00 ,  A61M11/00

CPC分类号： A61M11/041 ,  A61M11/007 ,  A61M11/042 ,  A61M15/025 ,  A61M16/0093 ,  A61M16/1065 ,  A61M16/202 ,  A61M2205/3317 ,  A61M2205/3368 ,  A61M2209/02 ,  B05B9/002

摘要： A programmable aerosol generator forms a volatilized liquid by supplying a material in liquid form to a flow passage and heating the flow passage, such that the material volatilizes and expands out of an outlet of the channel. The volatilized material, if desired, mixes with ambient air such that volatilized material condenses to form the aerosol. An apparatus and method for generating such a volatilized liquid, as well as the control and methods of heating, are disclosed as an analytical tool useful for experimental use, a tool useful for production of commercial products or an inhaler device.

摘要翻译： 可编程气溶胶发生器通过将液体形式的材料供应到流动通道并加热流路而形成挥发液体，使得材料从通道的出口挥发和膨胀。 如果需要，挥发的物质与环境空气混合，使得挥发的物质冷凝形成气溶胶。 公开了用于产生这种挥发性液体的装置和方法以及加热控制和方法，作为可用于实验用途的分析工具，可用于生产商业产品或吸入器装置的工具。