公开(公告)号：US06730951B2

公开(公告)日：2004-05-04

申请号：US10175804

申请日：2002-06-21

申请人： Yoshihisa Nagano ,  Eiji Fujii

发明人： Yoshihisa Nagano ,  Eiji Fujii

IPC分类号： H01L27108

CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

摘要： A capacitor includes: a lower electrode; a capacitor insulating film made of a metal oxide and formed on the lower electrode; an upper electrode formed on the capacitor insulating film; and a buried insulating film surrounding the lower electrode. The lower electrode includes a conductive barrier layer that prevents diffusion of oxygen, and an insulating barrier layer that prevents diffusion of hydrogen is formed so as to be in contact with at least a side surface of the conductive barrier layer in a side surface of the lower electrode.

摘要翻译： 电容器包括：下电极; 由金属氧化物制成的电容绝缘膜，形成在下电极上; 形成在所述电容绝缘膜上的上电极; 以及包围下电极的掩埋绝缘膜。 下电极包括防止氧的扩散的导电阻挡层，并且形成防止氢的扩散的绝缘阻挡层，以在下部电极的侧表面中与至少导电阻挡层的侧表面接触 电极。

公开(公告)号：US06573111B2

公开(公告)日：2003-06-03

申请号：US10177781

申请日：2002-06-20

申请人： Yoshihisa Nagano ,  Yasuhiro Uemoto ,  Yuji Judai ,  Masamichi Azuma ,  Eiji Fujii

发明人： Yoshihisa Nagano ,  Yasuhiro Uemoto ,  Yuji Judai ,  Masamichi Azuma ,  Eiji Fujii

IPC分类号： H01L2100

CPC分类号： H01L27/11502 ,  H01L21/76895 ,  H01L27/11507

摘要： A semiconductor device includes: a silicon substrate; a MOS semiconductor device provided on the silicon substrate, the MOS semiconductor device including a silicide region on an outermost surface thereof; a first insulating film covering the MOS semiconductor device; a capacitor element provided on the first insulating film, the capacitor element comprising a lower electrode, an upper electrode, and a capacitor film interposed between the lower electrode and the upper electrode, and the capacitor film comprising a ferroelectric material; a second insulating film covering the first insulating film and the capacitor element; a contact hole provided in the first insulating film and the second insulating film over the MOS semiconductor device and the capacitor element; and an interconnection layer provided on the second insulating film for electrically connecting the MOS semiconductor device and the capacitor element to each other, wherein a bottom portion of the interconnection layer comprises a conductive material other than titanium.

公开(公告)号：US06528365B2

公开(公告)日：2003-03-04

申请号：US09974510

申请日：2001-10-10

申请人： Yoshihisa Nagano ,  Keisuke Tanaka ,  Toru Nasu

发明人： Yoshihisa Nagano ,  Keisuke Tanaka ,  Toru Nasu

IPC分类号： H01L218242

CPC分类号： H01L27/11502 ,  H01L21/76895 ,  H01L27/11507 ,  H01L28/40

摘要： A semiconductor memory device, includes: a semiconductor substrate including a transistor; a first protective insulating film for covering the semiconductor substrate; at least one data storage capacitor element formed on the first protective insulating film; a second protective insulating film for covering the first protective insulating film and the capacitor element; a hydrogen barrier layer; and an interconnection layer for electrically connecting the transistor and the capacitor element, wherein: the capacitor element includes a lower electrode formed on the first protective insulating film, a capacitor film formed on the lower electrode, and an upper electrode formed on the capacitor film, the capacitor film includes an insulating metal oxide, the second protective insulating film has a first contact hole reaching the upper electrode and a second contact hole reaching the lower electrode, and the hydrogen barrier layer is provided in the first and second contact holes, so as not to expose the upper and the lower electrodes.

公开(公告)号：US06214660B1

公开(公告)日：2001-04-10

申请号：US09177620

申请日：1998-10-23

申请人： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

发明人： Yasuhiro Uemoto ,  Eigi Fujii ,  Koji Arita ,  Yoshihisa Nagano ,  Yasuhiro Shimada ,  Masamichi Azuma ,  Atsuo Inoue ,  Yasufumi Izutsu

IPC分类号： H01L213205

CPC分类号： H01L27/11502 ,  H01L28/40 ,  H01L28/56

摘要： A method for fabricating a capacitor for an integrated circuit, comprising the steps of forming a titanium film for an adhesion layer over a substrate, forming a titanium dioxide film for a diffusion barrier layer by annealing the titanium film after ion-implantation of oxygen ion into a surface region of the titanium film so as to change titanium in the surface region to titanium dioxide, and forming a high dielectric constant capacitor on the titanium dioxide film.

摘要翻译： 一种用于制造用于集成电路的电容器的方法，包括以下步骤：在衬底上形成用于粘附层的钛膜，通过在离子注入氧离子之后将钛膜退火形成用于扩散阻挡层的二氧化钛膜 钛膜的表面区域，以将表面区域中的钛变为二氧化钛，并在二氧化钛膜上形成高介电常数电容器。

公开(公告)号：US6046490A

公开(公告)日：2000-04-04

申请号：US132023

申请日：1998-08-10

申请人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Yoshihisa Nagano ,  Akihiro Matsuda

发明人： Koji Arita ,  Eiji Fujii ,  Yasuhiro Uemoto ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC分类号： H01L21/02 ,  H01L21/768 ,  H01L29/40

CPC分类号： H01L28/55 ,  H01L21/76895

摘要： A semiconductor device is provided with a multilayered interconnection and a capacitor dielectric element, in which the transistor in the device has a non-degraded characteristics and the degradation of the capacitor dielectric element is suppressed. The semiconductor device has wiring layers connecting to one another through contact holes in insulating layers. One of the insulating layers is formed so as to cover at least a part of the area above the transistor and so as not to cover the area above the capacitor dielectric element. Hydrogen generated by heat-treating the insulating layer is supplied to the transistor to recover the damage in it, while hydrogen is suppressed from arriving at the capacitor element so that the capacitor dielectric element does not degrade.

摘要翻译： 半导体器件设置有多层互连和电容器介质元件，其中器件中的晶体管具有非劣化特性，并且抑制了电容器介质元件的劣化。 半导体器件具有通过绝缘层中的接触孔彼此连接的布线层。 绝缘层之一形成为覆盖晶体管上方的区域的至少一部分，并且不覆盖电容器介质元件上方的区域。 通过热处理绝缘层产生的氢气被提供给晶体管以恢复其中的损坏，同时抑制氢气到达电容器元件，使得电容器介质元件不劣化。

公开(公告)号：US6046467A

公开(公告)日：2000-04-04

申请号：US667196

申请日：1996-06-20

申请人： Koji Arita ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Toru Nasu ,  Eiji Fujii

发明人： Koji Arita ,  Akihiro Matsuda ,  Yoshihisa Nagano ,  Toru Nasu ,  Eiji Fujii

IPC分类号： H01L27/04 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/105 ,  H01L27/108 ,  H01L29/92 ,  H01L29/76

CPC分类号： H01L28/40

摘要： A capacitor 25 is formed on an insulating layer 21a formed on a semiconductor substrate 21. The end portion of a capacitor insulating layer 23 is positioned between the end portion of a bottom electrode 22 and the end portion of a top electrode 24. A passivation layer 26 for covering the capacitor 25 is formed. Interconnections 28 are connected to the bottom electrode 22 through a first hole 27a and to the top electrode 24 through a second hole 27b. In this way, since the end portion of the capacitor insulating layer 23 is out of the end portion of the top electrode 24, the end portion of the capacitor insulating layer 23 injured by etching does not affect the capacitance.

摘要翻译： 电容器25形成在形成在半导体衬底21上的绝缘层21a上。电容器绝缘层23的端部位于底部电极22的端部和顶部电极24的端部之间。钝化层 形成用于覆盖电容器25的26。 互连件28通过第一孔27a连接到底部电极22，并通过第二孔27b连接到顶部电极24。 以这种方式，由于电容器绝缘层23的端部不在顶部电极24的端部之外，所以通过蚀刻损伤的电容器绝缘层23的端部不影响电容。

公开(公告)号：US5795794A

公开(公告)日：1998-08-18

申请号：US678291

申请日：1996-07-11

申请人： Yoshihisa Nagano ,  Eiji Fujii ,  Toru Nasu ,  Akihiro Matsuda

发明人： Yoshihisa Nagano ,  Eiji Fujii ,  Toru Nasu ,  Akihiro Matsuda

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L21/8242 ,  H01L21/8246 ,  H01L27/105 ,  H01L27/108 ,  H01L21/70 ,  H01L27/00

CPC分类号： H01L28/55

摘要： The present invention relates to method of manufacturing semiconductor devices having built-in capacitor comprising a dielectric substance of high dielectric constant or a ferroelectric substance as the capacitance insulation film, and aims to solve a problem that the prior art capacitance insulation film contained in semiconductor devices has a rough surface which results in a poor insulating voltage and a large spread in electrical characteristics, as well as broken connection wire; in which method a capacitance insulation film is produced by first forming a first dielectric film, and forming a second dielectric film on the first dielectric film for a thickness greater than the difference in level between top and bottom of the surface of first dielectric film, and forming a thin film whose etching speed is identical with that of the second dielectric film on the second dielectric film making the surface of thin film flat, and then etching the whole of the thin film and part of the second dielectric film off simultaneously to make the surface of second dielectric film flat.

摘要翻译： 本发明涉及具有内置电容器的半导体器件的制造方法，该半导体器件包括具有高介电常数的电介质或铁电物质作为电容绝缘膜，并且旨在解决包含在半导体器件中的现有技术的电容绝缘膜的问题 具有粗糙的表面，导致绝缘电压差，电特性扩大，连接线断裂; 在该方法中，通过首先形成第一电介质膜来制造电容绝缘膜，并且在第一电介质膜上形成厚度大于第一电介质膜的表面的顶部和底部之间的电平差的厚度的第二电介质膜，以及 形成薄膜，其蚀刻速度与第二电介质膜的蚀刻速度相同，使得薄膜表面平坦化，然后同时蚀刻整个薄膜和部分第二电介质膜，使得 第二电介质膜的表面平坦。

公开(公告)号：US5627391A

公开(公告)日：1997-05-06

申请号：US492913

申请日：1995-06-20

申请人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

发明人： Yasuhiro Shimada ,  Atsuo Inoue ,  Koji Arita ,  Toru Nasu ,  Yoshihisa Nagano ,  Akihiro Matsuda

IPC分类号： H01L21/28 ,  H01L21/02 ,  H01L21/822 ,  H01L27/04 ,  H01L27/10 ,  H01L27/115 ,  H01L29/76 ,  H01L23/48 ,  H01L27/108

CPC分类号： H01L27/11502 ,  H01L28/40

摘要： A semiconductor device comprises silicon substrate 1 on which an integrated circuit is formed, first insulating layer 6 formed on silicon substrate 1, a capacitor comprising lower electrode 7 formed on first insulating layer 6, dielectric film 8 having a high dielectric constant and upper electrode 9, a second insulating film 11 having contact holes 13 which lead to lower electrode 7 and upper electrode 9 independently, diffusion barrier layer 17 which touches lower electrode 7 and upper electrode 9 at the bottom of contact holes 13, and interconnection layer 15 formed on diffusion barrier layer 17. In diffusion barrier layer 17 at the bottom of contact hole 13, a lamellar region made of granular crystal is formed.

摘要翻译： 半导体器件包括其上形成有集成电路的硅衬底1，形成在硅衬底1上的第一绝缘层6，包括形成在第一绝缘层6上的下电极7的电容器，具有高介电常数的电介质膜8和上电极9 具有接触孔13的第二绝缘膜11，其独立地引导到下电极7和上电极9，在接触孔13的底部接触下电极7和上电极9的扩散阻挡层17和扩散形成的互连层15 在接触孔13的底部的扩散阻挡层17中形成由粒状晶体构成的层状区域。