Method of settling signatureless payment of bank card sales slip in mobile terminal, and system therefor

    公开(公告)号:US20070241180A1

    公开(公告)日:2007-10-18

    申请号:US11403926

    申请日:2006-04-14

    IPC分类号: G07F19/00 G06K5/00 G06Q40/00

    摘要: Provided is a method of and system for settling signatureless payment of a slip of bank card sales in a mobile terminal such as a cellular phone, a personal digital assistant, and a smart phone, having a mobile IC (Integrated Circuit) chip card, to then be printed on a transaction approval sales slip, to thereby make personal authentication completed and prevent the sales slip from being forged or fabricated, without signing on a customer's autographical signature of the sales slip. The signatureless payment settlement system has an algorithm for producing a personal authentication value in an IC chip card mounted on the mobile terminal including the cellular phone or PDA (Personal Digital Assistant), and receives a card issuing company key, card issuing information, a card password, an IC chip card produced random number to produce a personal authentication value. Then, the signatureless payment settlement system transmits the generated authentication value to the mobile payment settlement terminal in a card affiliated shop together with the card information through an IR (Infrared Ray), RF (Radio Frequency), or bluetooth communication, to then make the personal authentication value printed on the customer signature column of the sales slip output from the credit card inquiring machine (CAT) or the POS (Point of Sales) system, at the time when a transaction is approved. Accordingly, the signatureless payment settlement system solves inconveniences that a customer who uses a card should sign on a slip of sales at a card affiliated shop, and shortens a card transaction approval time. Also, when a validity of transaction by use of a card is challenged, a card issuing company can confirm the validity of the card use for verification. As a result, the signatureless payment settlement system can prevent forgery, fabrication, or falsification of the sales slip, to thereby prevent an illegal card use.

    Multiplierless FIR digital filter and method of designing the same
    63.
    发明申请
    Multiplierless FIR digital filter and method of designing the same 有权
    多重FIR数字滤波器及其设计方法

    公开(公告)号:US20070083581A1

    公开(公告)日:2007-04-12

    申请号:US11634559

    申请日:2006-12-06

    申请人: Jung Kim In Jeon Ik Eo

    发明人: Jung Kim In Jeon Ik Eo

    IPC分类号: G06F17/10

    摘要: Provided are a multiplierless FIR digital filter and a method of designing the same, in which a filtering operation is performed by not multipliers needed as many as the number of tap depending on design requirement but a small addition/subtraction circuit using extracted information after analyzing the property of a given coefficient and extracting information required for design by only adding/subtracting operations. In the method of designing the multiplierless FIR digital filter, four tables are created to extract and store information needed for adding and subtracting operations to coefficients of design requirement, and an addition table is created to set a sixteen-multiple adding section of which a least upper bound is the maximum value of when the coefficient is represented into an integer by taking a decimal part of the coefficient, and to store values obtained by adding the input data input synchronizing with a clock frequency as a unit of sixteen sections. Further, a value corresponding to multiplication is obtained by performing extraction and error correction on the added values from four tables and the addition table, and an adder chain of an output terminal sums up the values and outputs the filtering results, thereby effectively implementing a logic circuit of the multiplierless FIR digital filter.

    摘要翻译: 提供了一种无乘法FIR数字滤波器及其设计方法,其中,根据设计要求,不需要与抽头数量相同的乘法器执行滤波操作,而是在分析之后使用提取的信息的小的加/减电路 给定系数的属性,并通过加/减操作提取设计所需的信息。 在设计无乘数FIR数字滤波器的方法中,创建了四个表以提取和存储对于设计要求的系数的加法和减法运算所需的信息,并且创建附加表以设置其中最少的十六个加法部分 上限是通过取系数的小数部分将系数表示为整数,并将通过将与时钟频率同步输入的输入数据相加而获得的值存储为十六个部分的单位的最大值。 此外,通过对来自四个表和加法表的附加值执行提取和纠错来获得与乘法相对应的值,并且输出端的加法器链将该值相加并输出滤波结果,从而有效地实现逻辑 电路的无数FIR滤波器。

    Methods and systems for ultra-precise measurement and control of object motion in six degrees of freedom by projection and measurement of interference fringes
    64.
    发明申请
    Methods and systems for ultra-precise measurement and control of object motion in six degrees of freedom by projection and measurement of interference fringes 有权
    用于通过投影和测量干涉条纹在六个自由度中超精密测量和控制物体运动的方法和系统

    公开(公告)号:US20070013916A1

    公开(公告)日:2007-01-18

    申请号:US11488931

    申请日:2006-07-18

    IPC分类号: G01B11/02

    摘要: A system and method for active visual measurement and servo control using laterally sampled white light interferometry (L-SWLI) for real-time visual tracking of six-degree-of-freedom (6 DOF) rigid body motion with near-nanometer precision. The visual tracking system is integrated with a 6 DOF motion stage to realize an ultra precision six-axis visual servo control system. Use of L-SWLI obtains the complete pose of the target object from a single image frame to enable real-time tracking. Six-degree-of-freedom motions are obtained by measuring the fringe pattern on multiple surfaces of the object or from a single surface with additional information gained from conventional image processing techniques.

    摘要翻译: 一种使用横向采样的白光干涉测量(L-SWLI)进行主动视觉测量和伺服控制的系统和方法,用于实时视觉跟踪具有近纳米精度的六自由度(6自由度)刚体运动。 视觉跟踪系统集成了6自由度运动舞台,实现了超精密六轴视觉伺服控制系统。 使用L-SWLI从单个图像帧获得目标对象的完整姿态,以实现实时跟踪。 通过使用从常规图像处理技术获得的附加信息来测量物体的多个表面上的条纹图案或从单个表面获得六自由度运动。

    Target apparatus
    65.
    发明申请
    Target apparatus 审中-公开
    目标装置

    公开(公告)号:US20060291607A1

    公开(公告)日:2006-12-28

    申请号:US11471263

    申请日:2006-06-20

    IPC分类号: G21G1/06

    CPC分类号: H05H6/00 G21G4/06

    摘要: Provided is a target apparatus of high durability so that a thin film is not deformed or damaged under an environment of high temperature and high pressure generated during a nuclear reaction between proton and H218O concentrate, and a productivity of 18F can be increased. The target apparatus includes a cavity member having a cavity, in which H218O concentrate is received, for producing 18F using a nuclear reaction between proton irradiated onto the H218O concentrate in the cavity and the H218O concentrate. The cavity member includes: a front opening and a rear opening facing opposite directions to each other on the irradiation path of the proton, and connected to the cavity so that the cavity can be communicated with the outside; a front thin film and a rear thin film disposed to block the front opening and the rear opening, respectively; and a front reinforcing member and a rear reinforcing member coupled to the cavity member so as to support the front thin film and the rear thin film in order to prevent the front and rear thin films from being swelled due to a pressure rising in the cavity during the nuclear reaction, wherein the front reinforcing member includes a plurality of penetration holes penetrating the front reinforcing member in the irradiation direction of the proton.

    摘要翻译: 提供了一种高耐久性的目标装置,使得在质子与H 2 O之间的核反应中产生的高温高压环境下,薄膜不变形或损坏, SUP浓缩物,并且可提高 18F的生产率。 目标装置包括具有空腔的空腔构件,其中容纳有H 2 O 18 O 2浓缩物,用于使用核反应产生“18” 在质子辐射到空腔中的H 2 H 2 O 20浓缩物和H 2 O 18 O 2浓缩物之间。 空腔构件包括:在质子的照射路径上彼此相对的前开口和后开口,并且连接到空腔,使得空腔能够与外部连通; 设置成分别阻挡前开口和后开口的前薄膜和后薄膜; 以及连接到空腔构件的前部加强构件和后部加强构件,以便支撑前部薄膜和后部薄膜,以防止前后薄膜由于空腔中的压力升高而膨胀 核反应,其中前加强构件包括在质子的照射方向上穿透前加强构件的多个穿透孔。

    Semiconductor manufacturing apparatus
    66.
    发明申请
    Semiconductor manufacturing apparatus 审中-公开
    半导体制造装置

    公开(公告)号:US20060180968A1

    公开(公告)日:2006-08-17

    申请号:US11149202

    申请日:2005-06-10

    IPC分类号: B23Q1/00

    CPC分类号: H01L21/68785

    摘要: A semiconductor manufacturing apparatus includes a body having a reaction chamber formed therein to process a semiconductor wafer, a chuck provided within the reaction chamber to support the semiconductor wafer, a chuck rotating device provided within the reaction chamber to support and rotate the chuck, and a slant adjuster to support the chuck rotating device and to adjust a position of the chuck rotating device to adjust a slant of an upper surface of the chuck.

    摘要翻译: 半导体制造装置包括具有形成在其中以处理半导体晶片的反应室的主体,设置在反应室内以支撑半导体晶片的卡盘,设置在反应室内以支撑和旋转卡盘的卡盘旋转装置,以及 倾斜调节器以支撑卡盘旋转装置并调节卡盘旋转装置的位置以调节卡盘的上表面的倾斜。

    Method for purifying simvastatin
    67.
    发明申请
    Method for purifying simvastatin 审中-公开
    辛伐他汀纯化方法

    公开(公告)号:US20060167280A1

    公开(公告)日:2006-07-27

    申请号:US10503769

    申请日:2003-02-06

    IPC分类号: C07D309/30

    CPC分类号: C07D309/30

    摘要: The present invention relates to a purification method of simvastatin crystal, more particularly to a method of effectively removing impurities contained in crude simvastatin obtained by a conventional synthetic method of simvastatin while minimizing loss of effective components to obtain high-quality simvastatin with good yield.

    摘要翻译: 本发明涉及辛伐他汀晶体的纯化方法,更具体地说,涉及一种有效去除通过常规的辛伐他汀合成方法获得的粗辛辛伐他汀所含杂质的方法,同时使有效成分的损失最小化,以获得高质量的辛伐他汀。

    Crosstalk canceling pattern for high-speed communications and modular jack having the same
    68.
    发明申请
    Crosstalk canceling pattern for high-speed communications and modular jack having the same 有权
    具有相同的高速通信和模块化插座的串扰消除模式

    公开(公告)号:US20060154531A1

    公开(公告)日:2006-07-13

    申请号:US11327897

    申请日:2006-01-09

    IPC分类号: H01R13/66 H01R24/00

    摘要: Disclosed herein are a crosstalk canceling pattern for high-speed communications and a modular jack having the same, which includes a compensating capacitor on a transmission line to cancel crosstalk due to parasitic capacitance generated between neighboring insert pins, and includes a second compensating capacitor to correct phase mismatch due to parasitic inductance generated in insert pins and transmission lines, when a high-frequency signal is applied. The modular jack having the crosstalk canceling pattern for high-speed communications includes a housing, a printed circuit board, a lower contact block, and an upper contact block. The hosing includes a plug insert hole, an insert pin locking plate, and a coupling guide part. The printed circuit board is a multi-layered structure having a plurality of compensating capacitors. The lower contact block is mounted to the lower surface of the printed circuit board. The upper contact block is mounted to the upper portion of the lower contact block, and divides UTP cable wires to be connected to IDC terminals.

    摘要翻译: 本文公开了一种用于高速通信的串扰消除模式和具有该串扰消除模式的模块插座,其包括在传输线上的补偿电容器,以消除由于相邻插入引脚之间产生的寄生电容引起的串扰,并且包括用于校正的第二补偿电容器 当施加高频信号时,由插入引脚和传输线中产生的寄生电感引起的相位失配。 具有用于高速通信的串扰消除模式的模块化插座包括壳体,印刷电路板,下接触块和上接触块。 该套筒包括插头插入孔,插入销锁定板和联接引导件。 印刷电路板是具有多个补偿电容器的多层结构。 下接触块安装到印刷电路板的下表面。 上接触块安装到下接触块的上部,并将UTP电缆线分成要连接到IDC端子。

    Metallization method of semiconductor device
    69.
    发明申请
    Metallization method of semiconductor device 失效
    半导体器件的金属化方法

    公开(公告)号:US20060148242A1

    公开(公告)日:2006-07-06

    申请号:US11320304

    申请日:2005-12-29

    申请人: Jung Kim

    发明人: Jung Kim

    IPC分类号: H01L21/4763 H01L21/44

    CPC分类号: H01L21/76877 H01L21/76846

    摘要: A method for forming a metallization contact in a semiconductor device includes the steps of: (a) forming an insulating layer on a semiconductor substrate including an active device region; (b) forming a contact hole to expose a portion of the active device region by etching a portion of the insulating layer; (c) forming a CVD TiN layer on the insulating layer and inside the contact hole; (d) forming a PVD TiN layer on the CVD TiN layer using ionized metal plasma sputtering; and (e) forming a metal layer on the PVD TiN layer.

    摘要翻译: 在半导体器件中形成金属化接触的方法包括以下步骤:(a)在包括有源器件区域的半导体衬底上形成绝缘层; (b)通过蚀刻所述绝缘层的一部分形成接触孔以暴露所述有源器件区域的一部分; (c)在绝缘层和接触孔内形成CVD TiN层; (d)使用电离金属等离子体溅射在CVD TiN层上形成PVD TiN层; 和(e)在PVD TiN层上形成金属层。