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公开(公告)号:US11729044B2
公开(公告)日:2023-08-15
申请号:US17079238
申请日:2020-10-23
Applicant: Intel Corporation
Inventor: Maryam Tahhan , Shobhi Jain , John J. Browne , Emma L. Foley , John O'Loughlin , Sunku Ranganath , Krzysztof Kepka , Swati Sehgal
IPC: H04L41/0604 , H04L41/5003 , H04L41/069 , H04L41/0631
CPC classification number: H04L41/0627 , H04L41/069 , H04L41/0645 , H04L41/5003
Abstract: Examples described herein relate to a management system that determines which services to redeploy on one or more platforms. A platform can receive a configuration to perform during a failure of connectivity with a management system. The platform can monitor activity of one or more services. The platform can, based on failure of connectivity with the management system and recovery of connectivity with the management system, provide the monitored activity of one or more services to the management system to influence services re-deployed by the management system. In some examples, based on failure to re-establish a connection with the management system within an amount of time, the platform can connect with the management system using a secondary management interface.
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公开(公告)号:US11703906B2
公开(公告)日:2023-07-18
申请号:US17520296
申请日:2021-11-05
Applicant: Intel Corporation
Inventor: Vasudevan Srinivasan , Krishnakanth V. Sistla , Corey D. Gough , Ian M. Steiner , Nikhil Gupta , Vivek Garg , Ankush Varma , Sujal A. Vora , David P. Lerner , Joseph M. Sullivan , Nagasubramanian Gurumoorthy , William J. Bowhill , Venkatesh Ramamurthy , Chris MacNamara , John J. Browne , Ripan Das
IPC: G06F1/08 , G06F1/3203 , G06F9/30 , G06F9/455 , G06F1/324
CPC classification number: G06F1/08 , G06F1/3203 , G06F1/324 , G06F9/30101 , G06F9/45558 , G06F2009/45591
Abstract: A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
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公开(公告)号:US11301020B2
公开(公告)日:2022-04-12
申请号:US15601296
申请日:2017-05-22
Applicant: Intel Corporation
Inventor: Christopher MacNamara , John J. Browne , William J. Bowhill , Christopher Nolan , Nemanja Marjanovic , Rory Sexton , Padraic Agnew , Colin Hanily
IPC: G06F1/32 , G06F1/3209 , H04L41/0893 , H04L43/16 , H04L43/08 , G06F1/26 , G06F1/324 , H04L43/0876
Abstract: In an example, there is disclosed a demand scaling engine, including: a processor interface to communicatively couple to a processor; a network controller interface to communicatively couple to a network controller and to receive network demand data; a scaleup criterion; a current processor frequency scale datum; and logic, provided at least partly in hardware, to: receive the network demand data; compare the network demand data to the scaleup criterion; determine that the network demand data exceeds the scaleup criterion; and instruct the processor via the processor interface to scaleup processor frequency.
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公开(公告)号:US20220060391A1
公开(公告)日:2022-02-24
申请号:US17517601
申请日:2021-11-02
Applicant: Intel Corporation
Inventor: John J. Browne , Chris M. MacNamara
IPC: H04L12/24
Abstract: In one embodiment, a method comprises determining whether an automation recommendation for a network is to be forwarded to a management system of the network, wherein the automation recommendation specifies an action to take with respect to a plurality of platforms of the network and is received from a recommendation system utilizing artificial intelligence to generate the automation recommendation; responsive to a determination to forward the automation recommendation, assessing an impact of the automation recommendation; and performing an action with respect to the automation recommendation based on the impact.
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公开(公告)号:US11080202B2
公开(公告)日:2021-08-03
申请号:US15721800
申请日:2017-09-30
Applicant: Intel Corporation
Inventor: Niall D. McDonnell , Christopher MacNamara , John J. Browne , Andrew Cunningham , Brendan Ryan , Patrick Fleming , Namakkal N. Venkatesan , Bruce Richardson , Tomasz Kantecki , Sean Harte , Pierre Laurent
IPC: G06F12/08 , G06F12/0888 , G06F12/0806 , G06F12/0817 , G06F12/0837 , G06F9/00
Abstract: A computing apparatus, including: a processor; a pointer to a counter memory location; and a lazy increment counter engine to: receive a stimulus to update the counter; and lazy increment the counter including issuing a weakly-ordered increment directive to the pointer.
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66.
公开(公告)号:US11070476B2
公开(公告)日:2021-07-20
申请号:US16395774
申请日:2019-04-26
Applicant: Intel Corporation
Inventor: Patrick Connor , Andrey Chilikin , Brendan Ryan , Chris MacNamara , John J. Browne , Krishnamurthy Jambur Sathyanarayana , Stephen Doyle , Tomasz Kantecki , Anthony Kelly , Ciara Loftus , Fiona Trahe
IPC: H04W56/00 , H04L12/803 , G06F9/455 , H04L12/851 , H04L12/26 , G06F8/76
Abstract: A computing device includes an appliance status table to store at least one of reliability and performance data for one or more network functions virtualization (NFV) appliances and one or more legacy network appliances. The computing device includes a load controller to configure an Internet Protocol (IP) filter rule to select a packet for which processing of the packet is to be migrated from a selected one of the one or more legacy network appliances to a selected one of the one or more NFV appliances, and to update the appliance status table with received at least one of reliability and performance data for the one or more legacy network appliances and the one or more NFV appliances. The computing device includes a packet distributor to receive the packet, to select one of the one or more NFV appliances based at least in part on the appliance status table, and to send the packet to the selected NFV appliance. Other embodiments are described herein.
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公开(公告)号:US20210182194A1
公开(公告)日:2021-06-17
申请号:US17185648
申请日:2021-02-25
Applicant: Intel Corporation
Inventor: John J. Browne , Adrian Boczkowski , Marcel D. Cornu , David Hunt , Shobhi Jain , Tomasz Kantecki , Liang Ma , Chris M. MacNamara , Amruta Misra , Terence Nally
IPC: G06F12/0811 , G06F12/0871 , G06F9/50 , G06F11/07
Abstract: A performance monitor provides cache miss stall and memory bandwidth usage metric samples to a resource exhaustion detector. The detector can detect the presence of last-level cache and memory bandwidth exhaustion conditions based on the metric samples. If cache miss stalls and memory bandwidth usage are both trending up, the detector reports a memory bandwidth exhaustion condition to a resource controller. If cache miss stalls are trending up and memory bandwidth usage is trending down, the detector reports a last-level cache exhaustion condition to the resource controller. The resource controller can allocate additional last-level cache or memory bandwidth to the processor unit to remediate the resource exhaustion condition. If bandwidth-related metric samples indicate that a processor unit may be overloaded due to receiving high bandwidth traffic, the resource controller can take a traffic rebalancing remedial action.
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公开(公告)号:US10999209B2
公开(公告)日:2021-05-04
申请号:US15635581
申请日:2017-06-28
Applicant: Intel Corporation
Inventor: John J. Browne , Tomasz Kantecki , Chris Macnamara , Pierre Laurent , Sean Harte , Peter McCarthy , Jacqueline F. Jardim , Liang Ma
IPC: H04L12/873 , H04L12/883 , H04L12/879 , H04L12/927 , H04L12/863 , H04L12/869
Abstract: Technologies for network packet processing include a computing device that receives incoming network packets. The computing device adds the incoming network packets to an input lockless shared ring, and then classifies the network packets. After classification, the computing device adds the network packets to multiple lockless shared traffic class rings, with each ring associated with a traffic class and output port. The computing device may allocate bandwidth between network packets active during a scheduling quantum in the traffic class rings associated with an output port, schedule the network packets in the traffic class rings for transmission, and then transmit the network packets in response to scheduling. The computing device may perform traffic class separation in parallel with bandwidth allocation and traffic scheduling. In some embodiments, the computing device may perform bandwidth allocation and/or traffic scheduling on each traffic class ring in parallel. Other embodiments are described and claimed.
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公开(公告)号:US10979328B2
公开(公告)日:2021-04-13
申请号:US15475864
申请日:2017-03-31
Applicant: Intel Corporation
Inventor: Mark D. Gray , John J. Browne , Maryam Tahhan
IPC: H04L12/26 , H04L12/931
Abstract: Particular embodiments described herein provide for a network element that can be configured to receive a link monitoring message, determine one or more resources associated with the link monitoring message, determine a status of each of the one or more resources, and send a response that provides an indication of the status of each of the one or more resources. In an example, the link monitoring is part of a bidirectional forwarding detection packet.
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公开(公告)号:US10860714B2
公开(公告)日:2020-12-08
申请号:US16022976
申请日:2018-06-29
Applicant: Intel Corporation
Inventor: John J. Browne , Marcel Cornu , Timothy Verrall , Tomasz Kantecki , Niall Power , Weigang Li , Eoin Walsh , Maryam Tahhan
Abstract: Technologies for cache side channel attack detection and mitigation include an analytics server and one or more monitored computing devices. The analytics server polls each computing device for analytics counter data. The computing device generates the analytics counter data using a resource manager of a processor of the computing device. The analytics counter data may include last-level cache data or memory bandwidth data. The analytics server identifies suspicious core activity based on the analytics counter data and, if identified, deploys a detection process to the computing device. The computing device executes the detection process to identify suspicious application activity. If identified, the computing device may perform one or more corrective actions. Corrective actions include limiting resource usage by a suspicious process using the resource manager of the processor. The resource manager may limit cache occupancy or memory bandwidth used by the suspicious process. Other embodiments are described and claimed.
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