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    Hermetic packaging of a micro-battery device
    61.
    发明授权
    Hermetic packaging of a micro-battery device 有权

    公开(公告)号：US11522243B2

    公开(公告)日：2022-12-06

    申请号：US17128371

    申请日：2020-12-21

    Applicant: International Business Machines Corporation

    Inventor： Qianwen Chen ,  Jae-Woong Nah ,  Bing Dang ,  Leanna Pancoast ,  John Knickerbocker

    IPC: H01M50/171 ,  H01M10/0585 ,  H01M50/191 ,  H01M50/197 ,  H01M50/186

    Abstract: A method of manufacturing a micro-battery is provided. The method includes forming a micro-battery device by forming a first metal anode via and a first metal cathode via in a first substrate, forming a first metal layer on a bottom side of the first substrate, forming a first battery element on a top side of the substrate, forming an encapsulation layer around the first battery element, forming trenches through the encapsulation layer and the first substrate on different sides of the first battery element, and forming a metal sealing layer in the trenches to cover at least a plurality of sidewall surfaces of the first battery element. The metal sealing layer is electrically connected to the battery element through the first metal layer and the first metal cathode via.

    High bandwidth multichip module
    62.
    发明授权
    High bandwidth multichip module 有权

    公开(公告)号：US11315902B2

    公开(公告)日：2022-04-26

    申请号：US16788459

    申请日：2020-02-12

    Applicant: International Business Machines Corporation

    Inventor： John Knickerbocker

    IPC: H01L25/065 ,  H01L21/56 ,  H01L23/538 ,  H01L23/00 ,  H01L25/00 ,  H01L23/498 ,  H01L23/66 ,  H01L25/18

    Abstract: Multi-semiconductor chip modules that have a substrate with a substrate surface, one or more first substrate connections, and one or more second substrate connections. One or more first semiconductor chips (chips) has one or more larger first chip connections and one or more smaller first chip connections on a first chip bottom surface. One or more of the larger first chip connections physically and electrically connected to a respective first substrate connection. One or more second chips has one or more larger second chip connections and one or more smaller second chip connections on a second chip bottom surface. One or more of the larger second chip connections physically and electrically connected to a respective second substrate connection. A bridge has a bridge thickness, a bridge surface, and one or more bridge connections on the bridge surface. A first part of the bridge surface is under the first chip bottom surface and a second part of the bridge surface is under the second chip bottom surface. The bridge is disposed on the substrate between the first semiconductor chip and the second semiconductor chip, and one or more of the smaller first chip connections is physically and electrically connected to a respective first bridge connection on the first part of the bridge surface and one or more of the smaller second chip connection is physically and electrically connected to a respective second bridge connection. Some embodiments, a large surface bridge with the bridge. The large surface bridge and bridge can have different configurations. The bridge thickness allows larger chip connections and smaller connections with high pitch to intermingled in a location within the module. Methods of manufacture are disclosed.

    Health and fitness tracking
    65.
    发明授权
    Health and fitness tracking 有权

    公开(公告)号：US10750955B1

    公开(公告)日：2020-08-25

    申请号：US16299311

    申请日：2019-03-12

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： John Knickerbocker ,  Shriya Kumar

    IPC: A61B5/0205 ,  G16H20/30 ,  G16H10/65 ,  G16H40/63 ,  A61B5/00 ,  A61B5/145 ,  A61B5/024

    Abstract: A health & fitness tracking device may include a display that provides fitness information to a wearer of the health & fitness tracking device, at least one physiological sensor that obtains physiological data by monitoring at least one physiological condition of the wearer, at least one environmental sensor that obtains environmental data by monitoring at least one environmental condition, a data storage device that stores the physiological data, the environmental data, and medical history data relating to the wearer, a memory storing a computer program, and a processor that executes the computer program. The computer program may adjust a sensor configuration of the at least one physiological sensor based on the medical history data.

    High Speed Handling of Ultra-Small Chips by Selective Laser Bonding and Debonding
    66.
    发明申请
    High Speed Handling of Ultra-Small Chips by Selective Laser Bonding and Debonding 审中-公开

    公开(公告)号：US20200051948A1

    公开(公告)日：2020-02-13

    申请号：US16658675

    申请日：2019-10-21

    Applicant: International Business Machines Corporation

    Inventor： Qianwen Chen ,  Bing Dang ,  Russell Budd ,  Bo Wen ,  Li-Wen Hung ,  Jae-Woong Nah ,  John Knickerbocker

    IPC: H01L23/00 ,  H01L25/00 ,  H01L21/683

    Abstract: Techniques for high speed handling of ultra-small chips (e.g., micro-chips) by selective laser bonding and/or debonding are provided. In one aspect, a method includes: providing a first wafer including chips bonded to a surface thereof; contacting the first wafer with a second wafer, the second wafer including a substrate bonded to a surface thereof, wherein the contacting aligns individual chips with bonding sites on the substrate; and debonding the individual chips from the first wafer using a debonding laser having a small spot size of about 0.5 μm to about 100 μm, and ranges therebetween. A system is also provided that has digital cameras, a motorized XYZ-axis stage, and a computer control system configured to i) control a spot size of the at least one laser source and ii) adjust a positioning of the sample to align individual chips with a target area of the laser.

    Accurate Colorimetric Based Test Strip Reader System
    67.
    发明申请
    Accurate Colorimetric Based Test Strip Reader System 审中-公开

    公开(公告)号：US20200003698A1

    公开(公告)日：2020-01-02

    申请号：US16022282

    申请日：2018-06-28

    Applicant: International Business Machines Corporation

    Inventor： Minhua Lu ,  Vince Siu ,  Russell Budd ,  Evan Colgan ,  John Knickerbocker

    IPC: G01N21/80 ,  G06T7/90 ,  H04N5/225 ,  G06K9/46

    Abstract: Techniques for colorimetric based test strip analysis and reader system are provided. In one aspect, a method of test strip analysis includes: illuminating a test strip wetted with a sample with select spectrums of light, wherein the test strip includes test pads that are configured to change color in the presence of an analyte in the sample; obtaining at least one digital image of the test strip; and analyzing color intensity from the at least one digital image against calibration curves to determine an analyte concentration in the sample with correction for one or more interference substances in the sample that affect the color intensity. A calibration method and a reader device are also provided.

    Wafer stacking for integrated circuit manufacturing
    68.
    发明授权
    Wafer stacking for integrated circuit manufacturing 有权

    公开(公告)号：US10361140B2

    公开(公告)日：2019-07-23

    申请号：US15178709

    申请日：2016-06-10

    Applicant: International Business Machines Corporation

    Inventor： Qianwen Chen ,  Bing Dang ,  John Knickerbocker ,  Joana Sofia Branquinho Teresa Maria

    IPC: H01L23/31 ,  H01L25/00 ,  H01L21/56 ,  H01L23/00 ,  H01L21/683 ,  H01L25/065

    Abstract: A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

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