公开(公告)号：US20060180878A1

公开(公告)日：2006-08-17

申请号：US11393151

申请日：2006-03-29

申请人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Chris Barns ,  Matthew Metz ,  Suman Datta ,  Annalisa Cappellani ,  Robert Chau

发明人： Justin Brask ,  Jack Kavalieros ,  Mark Doczy ,  Uday Shah ,  Chris Barns ,  Matthew Metz ,  Suman Datta ,  Annalisa Cappellani ,  Robert Chau

IPC分类号： H01L29/94 ,  H01L29/76 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L21/82345 ,  H01L21/28229 ,  H01L21/823842 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

摘要： A method for making a semiconductor device is described. That method comprises forming a first dielectric layer on a substrate, then forming a trench within the first dielectric layer. After forming a second dielectric layer on the substrate, a first metal layer is formed within the trench on a first part of the second dielectric layer. A second metal layer is then formed on the first metal layer and on a second part of the second dielectric layer.

公开(公告)号：US20060160371A1

公开(公告)日：2006-07-20

申请号：US11037644

申请日：2005-01-18

申请人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

IPC分类号： H01L21/31

CPC分类号： H01L21/28194 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02304 ,  H01L21/28079 ,  H01L21/3141 ,  H01L21/31691 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

摘要： Oxidation between a higher dielectric constant material such as a rare earth oxide and a substrate may be reduced by providing a seal layer over the gate dielectric. In some embodiments, the seal layer may be isolated from the gate dielectric by a buffer layer.

摘要翻译： 通过在栅极电介质上设置密封层，可以减少较高介电常数材料如稀土氧化物与基底之间的氧化。 在一些实施例中，密封层可以通过缓冲层与栅极电介质隔离。

公开(公告)号：US20060065939A1

公开(公告)日：2006-03-30

申请号：US10951073

申请日：2004-09-27

申请人： Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Chris Barns ,  Matthew Metz ,  Suman Datta ,  Robert Chau

发明人： Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Chris Barns ,  Matthew Metz ,  Suman Datta ,  Robert Chau

IPC分类号： H01L29/94 ,  H01L21/3205

CPC分类号： H01L21/823437 ,  H01L21/823828

摘要： A complementary metal oxide semiconductor integrated circuit may be formed with NMOS and PMOS transistors that have high dielectric constant gate dielectric material over a semiconductor substrate. A metal barrier layer may be formed over the gate dielectric. A workfunction setting metal layer is formed over the metal barrier layer and a cap metal layer is formed over the workfunction setting metal layer.

摘要翻译： 互补金属氧化物半导体集成电路可以形成有在半导体衬底上具有高介电常数栅极电介质材料的NMOS和PMOS晶体管。 可以在栅极电介质上方形成金属阻挡层。 在金属阻挡层上方形成功函设定金属层，在功函设定金属层上形成帽金属层。

公开(公告)号：US20060063318A1

公开(公告)日：2006-03-23

申请号：US10938778

申请日：2004-09-10

申请人： Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Marko Radosavljevic ,  Amlan Majumdar ,  Justin Brask ,  Robert Chau

发明人： Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Marko Radosavljevic ,  Amlan Majumdar ,  Justin Brask ,  Robert Chau

IPC分类号： H01L21/336 ,  H01L21/8234

CPC分类号： H01L51/102 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0052 ,  H01L51/0545 ,  H01L51/105

摘要： Ambipolar conduction can be reduced in carbon nanotube transistors by forming a gate electrode of a metal. Metal sidewall spacers having different workfunctions than the gate electrode may be formed to bracket the metal gate electrode.

摘要翻译： 通过形成金属的栅电极，可以在碳纳米管晶体管中减少双极传导。 可以形成具有与栅电极不同的功函数的金属侧壁间隔物以支撑金属栅电极。

公开(公告)号：US20060022271A1

公开(公告)日：2006-02-02

申请号：US10900585

申请日：2004-07-28

申请人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

IPC分类号： H01L27/01

CPC分类号： H01L21/823462 ,  H01L21/823857

摘要： Complementary metal oxide semiconductor integrated circuits may be formed with NMOS and PMOS transistors having different gate dielectrics. The different gate dielectrics may be formed, for example, by a subtractive process. The gate dielectrics may differ in material, thickness, or formation techniques, as a few examples.

公开(公告)号：US20060006522A1

公开(公告)日：2006-01-12

申请号：US10889535

申请日：2004-07-12

申请人： Mark Doczy ,  Mitchell Taylor ,  Justin Brask ,  Jack Kavalieros ,  Suman Datta ,  Matthew Metz ,  Robert Chau ,  Jack Hwang

发明人： Mark Doczy ,  Mitchell Taylor ,  Justin Brask ,  Jack Kavalieros ,  Suman Datta ,  Matthew Metz ,  Robert Chau ,  Jack Hwang

IPC分类号： H01L23/14

CPC分类号： H01L21/823842

摘要： Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The metal layer may have a workfunction most suitable for forming one type of transistor, but is used to form both the n and p-type transistors. The workfunction of the metal layer may be converted, for example, by ion implantation to make it more suitable for use in forming transistors of the opposite type.

公开(公告)号：US20050287746A1

公开(公告)日：2005-12-29

申请号：US10877232

申请日：2004-06-24

申请人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

IPC分类号： H01L21/336 ,  H01L21/8238 ,  H01L29/49 ,  H01L29/51

CPC分类号： H01L29/517 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/66553 ,  H01L29/66772

摘要： In a metal gate replacement process, a gate electrode stack may be formed of a germanium containing layer. In subsequent processing of the source/drains, high temperature steps may be utilized, forming a germinide on said stacks. That germinide may be removed, prior to removing the rest of the stack, using H2O2.

摘要翻译： 在金属栅极替换工艺中，栅电极堆叠可以由含锗层形成。 在源/下水道的后续处理中，可以利用高温步骤，在所述堆上形成发芽。 在使用H 2 O 2 O 2除去堆叠的其余部分之前，可以除去该发芽物。

公开(公告)号：US20050266694A1

公开(公告)日：2005-12-01

申请号：US10854975

申请日：2004-05-27

申请人： Justin Brask ,  Paul Sears ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Robert Chau

发明人： Justin Brask ,  Paul Sears ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Uday Shah ,  Robert Chau

IPC分类号： H01L21/311 ,  H01L21/3213 ,  H01L21/461 ,  H01L21/8238

CPC分类号： H01L21/31111 ,  H01L21/32134 ,  H01L21/823842

摘要： A wafer may be rotated while etching to displace bubbles that may form, for example, from a reaction between silicon and water. As a result, a hydrophobic layer, which would otherwise be created by the bubbles, cannot form, resulting in a more uniform etch rate in some embodiments.

摘要翻译： 可以在蚀刻时旋转晶片以置换可能由例如硅和水之间的反应形成的气泡。 结果，在一些实施方案中，不能形成另外由气泡产生的疏水层，导致更均匀的蚀刻速率。

公开(公告)号：US20070090408A1

公开(公告)日：2007-04-26

申请号：US11240487

申请日：2005-09-29

申请人： Amlan Majumdar ,  Suman Datta ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Matthew Metz ,  Marko Radosavljevic ,  Been-Yih Jin ,  Robert Chau

发明人： Amlan Majumdar ,  Suman Datta ,  Brian Doyle ,  Jack Kavalieros ,  Justin Brask ,  Matthew Metz ,  Marko Radosavljevic ,  Been-Yih Jin ,  Robert Chau

IPC分类号： H01L29/76

CPC分类号： H01L29/66795 ,  H01L29/66545 ,  H01L29/785 ,  H01L29/7854

摘要： A field-effect transistor for a narrow-body, multiple-gate transistor such as a FinFET, tri-gate or Ω-FET is described. The corners of the channel region disposed beneath the gate are rounded n, for instance, oxidation steps, to reduce the comer effect associated with conduction initiating in the corners of the channel region.

摘要翻译： 描述了用于诸如FinFET，三栅极或者Omega-FET的窄体多栅极晶体管的场效应晶体管。 设置在栅极下方的通道区域的角部是圆形的，例如氧化步骤，以减少与沟道区域的拐角中的传导起始相关的拐角效应。

公开(公告)号：US20060081932A1

公开(公告)日：2006-04-20

申请号：US11292911

申请日：2005-12-01

申请人： Been-Yih Jin ,  Brian Doyle ,  Scott Hareland ,  Mark Doczy ,  Matthew Metz ,  Boyan Boyanov ,  Suman Datta ,  Jack Kavalieros ,  Robert Chau

发明人： Been-Yih Jin ,  Brian Doyle ,  Scott Hareland ,  Mark Doczy ,  Matthew Metz ,  Boyan Boyanov ,  Suman Datta ,  Jack Kavalieros ,  Robert Chau

IPC分类号： H01L27/12 ,  H01L27/01 ,  H01L31/0392

CPC分类号： H01L29/66772 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02466 ,  H01L21/02532 ,  H01L21/02546 ,  H01L21/02549 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02664 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76886 ,  H01L29/66742 ,  H01L29/78603 ,  H01L29/78648 ,  H01L29/78681

摘要： A method including forming a via dielectric layer on a semiconductor device substrate; forming a trench dielectric layer on the via dielectric layer; forming a trench through the trench dielectric layer to expose the via dielectric layer; forming a via in the via dielectric layer through the trench to expose the substrate; and forming a semiconductor material in the via and in the trench. An apparatus including a device substrate; a dielectric layer formed on a surface of the device substrate; and a device base formed on the dielectric layer including a crystalline structure derived from the device substrate.