公开(公告)号：US20230350604A1

公开(公告)日：2023-11-02

申请号：US17660938

申请日：2022-04-27

Applicant: Micron Technology, Inc.

Inventor： Nathaniel J. Meier

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

Abstract: Methods, systems, and devices for illegal operation reaction are described. A memory device may receive one or more commands to perform one or more respective access operations on an array of memory cells. A first circuit of the memory device may determine that the one or more commands would violate one or more thresholds associated with operation of the memory device, such as a timing threshold. In some cases, the first circuit may compare the one or more commands to the one or more patterns of commands stored at the memory device. A second circuit of the memory device may erase one or more memory cells of the memory device based on determining that the one or more thresholds associated with operation of the memory device would be violated, based on comparing the set of commands to the one or more patterns, or a combination thereof.

公开(公告)号：US11798610B2

公开(公告)日：2023-10-24

申请号：US17347957

申请日：2021-06-15

Applicant: Micron Technology, Inc.

Inventor： Timothy B. Cowles ,  Jiyun Li ,  Beau D. Barry ,  Matthew D. Jenkinson ,  Nathaniel J. Meier ,  Michael A. Shore ,  Adam J. Grenzebach ,  Dennis G. Montierth

IPC: G11C11/401 ,  G11C11/406 ,  G11C11/408

CPC classification number: G11C11/40611 ,  G11C11/4085 ,  G11C11/4087 ,  G11C11/40618

Abstract: An apparatus may include a refresh control circuit with multiple timing circuits. The timing circuits may be used to control steal rates, e.g., the rate of refresh time slots dedicated to healing victim word lines of row hammers. The timing circuits may be controlled to allow independent adjustment of the steal rates for different victim word lines. Thus, different victim word lines may be refreshed at different rates and the different rates may be independent of one another.

公开(公告)号：US20230289301A1

公开(公告)日：2023-09-14

申请号：US18198782

申请日：2023-05-17

Applicant: Micron Technology, Inc.

Inventor： Nathaniel J. Meier ,  Brenton P. Van Leeuwen

IPC: G06F12/14 ,  G11C11/4074 ,  G11C17/16 ,  G06F21/79

CPC classification number: G06F12/1433 ,  G06F12/1466 ,  G11C11/4074 ,  G11C17/16 ,  G06F21/79 ,  G06F2212/1052 ,  G06F3/0637

Abstract: Memory devices, systems including memory devices, and methods of operating memory devices are described, in which security measures may be implemented to control access to a fuse array (or other secure features) of the memory devices based on a secure access key. In some cases, a customer may define and store a user-defined access key in the fuse array. In other cases, a manufacturer of the memory device may define a manufacturer-defined access key (e.g., an access key based on fuse identification (FID), a secret access key), where a host device coupled with the memory device may obtain the manufacturer-defined access key according to certain protocols. The memory device may compare an access key included in a command directed to the memory device with either the user-defined access key or the manufacturer-defined access key to determine whether to permit or prohibit execution of the command based on the comparison.

公开(公告)号：US20220375509A1

公开(公告)日：2022-11-24

申请号：US17882894

申请日：2022-08-08

Applicant: Micron Technology, Inc.

Inventor： Nathaniel J. Meier ,  James S. Rehmeyer ,  David R. Brown

IPC: G11C11/406 ,  G11C29/52

Abstract: Methods, apparatuses, and systems related to managing operations performed in response to refresh management (RFM) commands A controller generates the RFM command for coordinating a refresh management operation targeted for implementation at an apparatus. The apparatus tracks refresh target set that includes refresh management target locations within the apparatus. According to the tracked refresh management target set, the apparatus selectively implements the targeted refresh management operation and/or a response operation in addition to or as a replacement for the targeted refresh management operation.

公开(公告)号：US20210407583A1

公开(公告)日：2021-12-30

申请号：US17470883

申请日：2021-09-09

Applicant: Micron Technology, Inc.

Inventor： Daniel B. Penney ,  Jason M. Brown ,  Nathaniel J. Meier ,  Timothy B. Cowles ,  Jiyun Li

IPC: G11C11/406 ,  G11C11/408

Abstract: The address of victim rows may be determined based on rows that are accessed in a memory. The victim addresses may be stored and associated with a count for every time a victim row is “victimized.” When the count for a victim row reaches a threshold, the victim row may be refreshed to preserve data stored in the row. After the victim row has been refreshed, the count may be reset. When a victim row is accessed, the count may also be reset. The counts may be adjusted for closer victim rows (e.g., +/−1) at a faster rate than counts for more distant victim rows (e.g., +/−2). This may cause closer victim rows to be refreshed at a higher rate than more distant victim rows.

公开(公告)号：US20210343323A1

公开(公告)日：2021-11-04

申请号：US17319820

申请日：2021-05-13

Applicant: Micron Technology, Inc.

Inventor： Nathaniel J. Meier ,  James S. Rehmeyer ,  Sang-Kyun Park ,  Makoto Kitayama

IPC: G11C11/406 ,  G11C11/22 ,  G06F3/06

Abstract: Methods, systems, and devices for refresh command management are described. A memory device may conduct a refresh operation to preserve the integrity of data stored to one or more memory cells. In some examples, the frequency of refresh operations conducted may be based on the memory device's temperature and may be initiated based on one or more commands received from an external device (e.g., a host device). Each command may be transmitted by the host device at a defined rate, which may impact the rate at which the memory device conducts one or more refresh operations. The memory device may postpone or skip at least a portion of one or more refresh operations based on one or more operating parameters of the memory device.

公开(公告)号：US20210304813A1

公开(公告)日：2021-09-30

申请号：US17347957

申请日：2021-06-15

Applicant: Micron Technology, Inc.

Inventor： Timothy B. Cowles ,  Jiyun Li ,  Beau D. Barry ,  Matthew D. Jenkinson ,  Nathaniel J. Meier ,  Michael A. Shore ,  Adam J. Grenzebach ,  Dennis G. Montierth

IPC: G11C11/406 ,  G11C11/408

Abstract: An apparatus may include a refresh control circuit with multiple timing circuits. The timing circuits may be used to control steal rates, e.g., the rate of refresh time slots dedicated to healing victim word lines of row hammers. The timing circuits may be controlled to allow independent adjustment of the steal rates for different victim word lines. Thus, different victim word lines may be refreshed at different rates and the different rates may be independent of one another.

公开(公告)号：US11069393B2

公开(公告)日：2021-07-20

申请号：US16431641

申请日：2019-06-04

Applicant: Micron Technology, Inc.

Inventor： Timothy B. Cowles ,  Jiyun Li ,  Beau D. Barry ,  Matthew D. Jenkinson ,  Nathaniel J. Meier ,  Michael A. Shore ,  Adam J. Grenzebach ,  Dennis G. Montierth

IPC: G11C7/00 ,  G11C11/406 ,  G11C11/408

Abstract: An apparatus may include a refresh control circuit with multiple timing circuits. The timing circuits may be used to control steal rates, e.g., the rate of refresh time slots dedicated to healing victim word lines of row hammers. The timing circuits may be controlled to allow independent adjustment of the steal rates for different victim word lines. Thus, different victim word lines may be refreshed at different rates and the different rates may be independent of one another.

公开(公告)号：US11054468B2

公开(公告)日：2021-07-06

申请号：US15993364

申请日：2018-05-30

Applicant: Micron Technology, Inc.

Inventor： Kevin G. Werhane ,  Nathaniel J. Meier

IPC: G01R31/317 ,  H01L21/00 ,  G09G1/00

Abstract: Methods, systems, and devices for testing a die using a segmented digital die ring are described. A segmented digital die ring may include multiple signal line segments, each coupled with a test segment circuit, and a control circuit. A test segment circuit may generate a digital feedback signal that indicates a condition of a respective signal line segment. The control circuit may generate a single output signal, indicative of the condition of the signal line segments. By utilizing digital testing circuitry and a single digital output signal, a layout area of the segmented digital die ring be minimized and a power consumption associated with the testing operation may be reduced.

公开(公告)号：US20210183435A1

公开(公告)日：2021-06-17

申请号：US17187002

申请日：2021-02-26

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Nathaniel J. Meier ,  James S. Rehmeyer

IPC: G11C11/406 ,  G11C11/408

Abstract: Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of targeted refresh operations. A memory device may include a number of memory banks, at least some of which may be simultaneously entered into a refresh mode. A given memory bank may perform an auto-refresh operation or a targeted refresh operation, which may draw less power than the auto-refresh operation. The timing of the targeted refresh operations may be staggered between the refreshing memory banks, such that a portion of the refreshing memory banks are performing a targeted refresh operation simultaneously with a portion of the refreshing memory banks performing an auto-refresh operation.