公开(公告)号：US20190235769A1

公开(公告)日：2019-08-01

申请号：US15885383

申请日：2018-01-31

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm

IPC: G06F3/06

CPC classification number: G06F3/0619 ,  G06F3/0634 ,  G06F3/065 ,  G06F3/0683

Abstract: Apparatuses, systems, and methods related to determination of a match between data values stored by three or more arrays are described. A system using the data values may manage performance of functions, including automated functions critical for prevention of damage to a product, personnel safety, and/or reliable operation, based on whether the data values match. For instance, one apparatus described herein includes a plurality of arrays of memory cells formed on a single memory chip. The apparatus further includes comparator circuitry configured to compare data values stored by three arrays selected from the plurality to determine whether there is a match between the data values stored by the three arrays. The apparatus further includes an output component configured to output data values of one of two arrays of the three arrays responsive to determination of the match between the data values stored by the two arrays.

公开(公告)号：US20250130878A1

公开(公告)日：2025-04-24

申请号：US18954300

申请日：2024-11-20

Applicant: Micron Technology, Inc.

Inventor： Melissa I. Uribe ,  Aaron P. Boehm

IPC: G06F11/07

Abstract: Methods, systems, and devices for error detection signaling are described. In some examples, a memory device may include circuitry to detect one or more error conditions. As the memory device is operated, it may store or output a value (e.g., a high value, a “1”) indicating the absence of an error condition. Upon the occurrence of an error condition, the memory device may either store or output a value (e.g., a low value, a “0”), which may allow for the error to be corrected or mitigated. Because storing or driving the value signifying the error condition may require a driver of the memory device to be coupled with a power supply, storing or outputting the value signifying an absence of an error condition (e.g., unless a normal or valid condition is detected) may mitigate errors that would otherwise render a safety mechanism of the memory device ineffective.

公开(公告)号：US20250103416A1

公开(公告)日：2025-03-27

申请号：US18909706

申请日：2024-10-08

Applicant: Micron Technology, Inc.

Inventor： Debra M. Bell ,  Kristen M. Hopper ,  Erika Prosser ,  Aaron P. Boehm

IPC: G06F11/07 ,  G06F1/20 ,  G06F1/30 ,  G06F3/06 ,  G06F11/30

Abstract: Methods, systems, and devices for persistent health monitoring for volatile memory devices are described. A memory device may determine that an operating condition associated with an array of memory cells on the device, such as a temperature, current, voltage, or other metric of health status is outside of a range associated with a risk of device degradation. The memory device may monitor a duration over which the operating condition is outside of the range, and may determine whether the duration satisfies a threshold. In some cases, the memory device may store an indication of when (e.g., each time) the duration satisfied the threshold. The memory device may store the one or more indications in one or more non-volatile storage elements, such as fuses, which may enable the memory device to maintain a persistent indication of a cumulative duration over which the memory device is operated with operating conditions outside of the range.

公开(公告)号：US12198776B2

公开(公告)日：2025-01-14

申请号：US17648393

申请日：2022-01-19

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G11C29/42 ,  G11C29/12 ,  G11C29/44 ,  H03K19/173

Abstract: Methods, systems, and devices for metadata storage at a memory device are described to support storage of metadata information and error control information at a memory device. The metadata information and error control information may be received at the memory device via a sideband channel and corresponding pin. For example, a set of bits received via the pin may include a subset of error control bits and a subset of metadata bits. Circuitry at the memory device may receive the set of bits via the pin and may identify metadata information and error control information within the set of bits. The circuitry may route the metadata information to a corresponding subset of memory cells and the error control information to an error control circuit, where the error control circuit may route the error control information to a corresponding subset of memory cells.

公开(公告)号：US20240345932A1

公开(公告)日：2024-10-17

申请号：US18630614

申请日：2024-04-09

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm ,  Todd Jackson Plum ,  Mark D. Ingram ,  Scott D. Van De Graaff

IPC: G06F11/30

CPC classification number: G06F11/3034 ,  G06F11/3062 ,  G06F11/3075

Abstract: Methods, systems, and devices for memory device health monitoring logic are described. In accordance with examples as disclosed herein, a memory device may include health monitoring logic configured to monitor a degradation level of the memory device. Further, the health monitoring logic may include a self-check logic to monitor the degradation level of the health monitoring logic. Using the health monitoring logic, the memory device may evaluate and store a health state of the memory device, which may be used to flag a fault in the memory device, among other responsive operations. Additionally, using the self-check logic, the memory device may evaluate and store a health state of the health monitoring logic, which may be used to flag a fault of the previously evaluated health state of the memory device. Based on the self-check flag, a host device may halt or adjust the response operations associated with the memory device.

公开(公告)号：US20240320093A1

公开(公告)日：2024-09-26

申请号：US18680470

申请日：2024-05-31

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm ,  Scott D. Van De Graaff ,  Mark D. Ingram ,  Todd Jackson Plum

IPC: G06F11/10 ,  G06F9/30 ,  G06F11/07 ,  G06F11/30

CPC classification number: G06F11/1068 ,  G06F9/30189 ,  G06F11/0772 ,  G06F11/3051

Abstract: Methods, systems, and devices for evaluation of memory device health monitoring logic are described. For example, a memory device may include health monitoring logic operable to activate certain internal health monitors of a set of multiple monitors and to communicate an output associated with the activated monitors. In a first mode of operation, the health monitoring logic may provide a single output that is generated from multiple outputs of the set of monitors. In a second mode of operation, the health monitoring logic may cycle through certain monitors (e.g., in a test mode), and may generate an output corresponding to respective active monitors as it cycles through the set of monitors. The health monitoring logic may communicate an output specific to each monitor to a host device such that the host device may evaluate an output from each monitor of the set of monitors.

公开(公告)号：US20240303158A1

公开(公告)日：2024-09-12

申请号：US18604227

申请日：2024-03-13

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm

IPC: G06F11/10 ,  G06F3/06 ,  G06F11/20 ,  G06F13/00 ,  G11C7/10 ,  G11C11/22 ,  G11C11/4093 ,  G11C29/52 ,  H03M13/00 ,  H03M13/19 ,  H03M13/45

CPC classification number: G06F11/1068 ,  G11C11/221 ,  G11C11/2273 ,  G11C11/2275 ,  H03M13/458 ,  G06F3/0659 ,  G06F11/1052 ,  G06F11/201 ,  G06F13/00 ,  G11C7/1006 ,  G11C11/4093 ,  G11C29/52 ,  H03M13/19 ,  H03M13/6561

Abstract: Methods, systems, and devices for a memory device with an error correction memory device with fast data access are described. For example, during a read operation, a memory device may be configured to output the data indicated by the read operation concurrent with performing an error correction operation. If the memory device detects an error, the memory device may indicate the error to a host device and, in some cases, output the corrected data to the host device. During a write operation, the memory device may store error detection or correction information associated with data to be stored at the memory device. The memory device may, in some cases, store error detection or correction information generated by the host device.

公开(公告)号：US20240256187A1

公开(公告)日：2024-08-01

申请号：US18632049

申请日：2024-04-10

Applicant: Micron Technology, Inc.

Inventor： Aaron P. Boehm ,  Todd Jackson Plum ,  Scott D. Van De Graaff ,  Scott E. Schaefer ,  Mark D. Ingram

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0653 ,  G06F3/0679

Abstract: Methods, systems, and devices for temperature monitoring for memory devices are described for monitoring one or more temperature ranges experienced by a memory device. The memory device may include monitoring circuitry or logic that may identify one or more durations of operating the memory device within the one or more temperature ranges. The memory device may store an indication of the one or more durations, or an indication of information associated with the one or more durations. The indication may be accessed a host device associated with the memory device or may be transmitted by the memory device to the host device. The host device may use information included in the indication to perform an operation associated with the memory device.

公开(公告)号：US12038806B2

公开(公告)日：2024-07-16

申请号：US17807813

申请日：2022-06-20

Applicant: Micron Technology, Inc.

Inventor： Scott E. Schaefer ,  Aaron P. Boehm ,  Scott D. Van De Graaff ,  Mark D. Ingram ,  Todd Jackson Plum

IPC: G11C29/00 ,  G06F9/30 ,  G06F11/07 ,  G06F11/10 ,  G06F11/30

CPC classification number: G06F11/1068 ,  G06F9/30189 ,  G06F11/0772 ,  G06F11/3051

Abstract: Methods, systems, and devices for evaluation of memory device health monitoring logic are described. For example, a memory device may include health monitoring logic operable to activate certain internal health monitors of a set of multiple monitors and to communicate an output associated with the activated monitors. In a first mode of operation, the health monitoring logic may provide a single output that is generated from multiple outputs of the set of monitors. In a second mode of operation, the health monitoring logic may cycle through certain monitors (e.g., in a test mode), and may generate an output corresponding to respective active monitors as it cycles through the set of monitors. The health monitoring logic may communicate an output specific to each monitor to a host device such that the host device may evaluate an output from each monitor of the set of monitors.

公开(公告)号：US20240202110A1

公开(公告)日：2024-06-20

申请号：US18512875

申请日：2023-11-17

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Rainer Bonitz ,  Aaron P. Boehm

IPC: G06F12/02

CPC classification number: G06F12/023

Abstract: Apparatuses, systems, and methods for a memory refresh watchdog circuit. A memory may include a temperature sensor which sets a value of a refresh multiplier in a mode register. The memory includes a refresh watchdog circuit which determines an expected rate of refresh commands based on a current value of the refresh multiplier. The refresh watchdog circuit measures a rate at which refresh commands are received from a memory controller and compares the measured rate to the expected rate. For example, the refresh watchdog circuit may set a threshold based on the value of the refresh multiplier. The refresh watchdog circuit may change a count value each time a refresh command is received and compare the count value to the threshold. If the count value is less than the threshold, then the refresh watchdog circuit may determine that not enough refresh commands have been received.