公开(公告)号：US10520974B2

公开(公告)日：2019-12-31

申请号：US14746377

申请日：2015-06-22

申请人： Joshua A. Strong ,  Anna Y. Herr ,  Quentin P. Herr ,  Steven B. Shauck

发明人： Joshua A. Strong ,  Anna Y. Herr ,  Quentin P. Herr ,  Steven B. Shauck

IPC分类号： G06F1/10 ,  G06F1/04 ,  G06F1/32 ,  G06F1/03 ,  G06F13/42

摘要： One embodiment includes a clock distribution system. The system includes a standing-wave resonator configured to receive and to resonate a sinusoidal clock signal. The standing-wave resonator includes at least one anti-node portion associated with a peak current amplitude of the sinusoidal clock signal. The system also includes at least one clock line interconnecting each of the at least one anti-node portion and an associated circuit. The at least one clock line can be configured to propagate the sinusoidal clock signal for timing functions associated with the associated circuit.

公开(公告)号：US10236869B2

公开(公告)日：2019-03-19

申请号：US15356049

申请日：2016-11-18

申请人： Quentin P. Herr ,  Edward Rudman ,  Jonathan D. Egan ,  Vladimir V. Talanov

发明人： Quentin P. Herr ,  Edward Rudman ,  Jonathan D. Egan ,  Vladimir V. Talanov

IPC分类号： H03K17/92 ,  H03K3/38 ,  H01L39/02

摘要： One example includes a superconducting transmission driver system. The system includes a latching gate stage comprising at least one Josephson junction configured to switch from an off state to an oscillating voltage state to provide an oscillating voltage at a control node in response to a single flux quantum (SFQ) pulse received at an input. The system further includes a low-pass filter stage coupled to the control node and configured to convert the oscillating voltage to a pulse signal to be transmitted over a transmission line.

公开(公告)号：US10090841B1

公开(公告)日：2018-10-02

申请号：US15887524

申请日：2018-02-02

申请人： Quentin P. Herr

发明人： Quentin P. Herr

IPC分类号： H03K19/195 ,  G06N99/00

摘要： A Josephson inverter gate circuit provides efficient implementation of polarity or logical inversion while eliminating the need for physically large high-efficiency magnetic transformers in the signal path. The circuit can consist of a half-twisted Josephson transmission line (JTL) or a JTL with an unshunted floating Josephson junction that produces two single flux quantum (SFQ) pulses when triggered by an SFQ input signal, which results in an output SFQ signal of reversed polarity. Implemented as a logical inverter, proper initialization of the circuit is accomplished within the signal inversion stage with flux biasing.

公开(公告)号：US09905900B2

公开(公告)日：2018-02-27

申请号：US14702044

申请日：2015-05-01

申请人： Quentin P. Herr ,  Aaron A. Pesetski ,  Pavel Borodulin

发明人： Quentin P. Herr ,  Aaron A. Pesetski ,  Pavel Borodulin

IPC分类号： H03K19/195 ,  H01P3/06 ,  H03K3/38

CPC分类号： H01P3/06 ,  H03K3/38 ,  H03K19/195

摘要： A microwave circuit is provided that comprises a plurality of transmission lines each configured to receive and propagate a respective waveform signal of a plurality of waveform signals, and a combiner that receives and combines the plurality of waveform signals from outputs of the plurality of transmission lines into a combined output waveform signal that is output terminated by an output termination resistor. The microwave circuit further comprises a compensation signal generator that generates a compensation signal to mitigate reflections associated with the transmission of signals through the microwave circuit.

公开(公告)号：US09646682B1

公开(公告)日：2017-05-09

申请号：US15167317

申请日：2016-05-27

申请人： Donald L. Miller ,  Quentin P. Herr ,  Anna Y. Herr

发明人： Donald L. Miller ,  Quentin P. Herr ,  Anna Y. Herr

IPC分类号： G11C11/44 ,  G11C11/16 ,  G11C5/14 ,  G11C7/10

CPC分类号： G11C11/44 ,  G11C5/147 ,  G11C7/06 ,  G11C7/1051 ,  G11C11/16 ,  G11C11/1673

摘要： One embodiment describes a reciprocal quantum logic (RQL) sense amplifier system. The system includes an input stage configured to amplify a sense current received at an input. The system also includes a detection stage configured to trigger at least one detection Josephson junction (JJ) in response to the amplified sense current and based on a clock signal to generate a single flux quantum (SFQ) pulse. The system further includes a Josephson transmission line (JTL) stage configured to propagate the SFQ pulse to an output of the RQL sense amplifier system based on at least one output JJ and to generate a negative SFQ pulse to reset the at least one detection JJ and the at least one output JJ based on the clock signal.

公开(公告)号：US20160164505A1

公开(公告)日：2016-06-09

申请号：US14564962

申请日：2014-12-09

申请人： Ofer Naaman ,  Quentin P. Herr

发明人： Ofer Naaman ,  Quentin P. Herr

IPC分类号： H03K3/38

CPC分类号： H03K3/38 ,  G06N99/002 ,  H01L39/223

摘要： One embodiment describes a Josephson current source system. The system includes a flux-shuttle loop that is inductively coupled with an AC input signal. The flux-shuttle loop includes a plurality of Josephson junctions spaced about the flux-shuttle loop and being configured, when activated, to sequentially trigger the plurality of Josephson junctions about the flux-shuttle loop in response to the AC input signal to generate a DC output current provided through an output inductor. The system also includes a flux injector that is configured to selectively activate and deactivate the flux-shuttle loop in response to an input signal to control an amplitude of the DC output current.

摘要翻译： 一个实施例描述了约瑟夫森电流源系统。 该系统包括与AC输入信号感应耦合的磁通穿越回路。 磁通穿梭回路包括围绕磁通 - 穿梭回路间隔开的多个约瑟夫逊结，并且被配置为当被激活时，响应于AC输入信号顺序地触发围绕磁通穿越回路的多个约瑟夫逊结，以产生DC 通过输出电感器提供输出电流。 该系统还包括通量注入器，其被配置为响应于输入信号选择性地激活和去激励磁通穿越回路以控制DC输出电流的幅度。

公开(公告)号：US09281057B1

公开(公告)日：2016-03-08

申请号：US14645103

申请日：2015-03-11

申请人： Anna Y. Herr ,  Quentin P. Herr ,  Andrew Hostetler Miklich

发明人： Anna Y. Herr ,  Quentin P. Herr ,  Andrew Hostetler Miklich

IPC分类号： G11C11/44

CPC分类号： G11C11/44 ,  G11C11/16

摘要： One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current that is provided to the memory cell and to generate a superconducting phase based on the stored digital state. The memory cell also includes a superconducting read-select device that is configured to implement a read operation in response to a read current that is provided to the memory cell. The memory cell further includes at least one Josephson junction configured to provide an output based on the superconducting phase of the PHMJJ during the read operation, the output corresponding to the stored digital state.

摘要翻译： 一个实施例描述了一个存储单元。 存储器单元包括相滞后磁约瑟夫逊结（PHMJJ），其被配置为存储对应于二进制逻辑1状态的第一二进制逻辑状态和对应于二进制逻辑0状态的第二二进制逻辑状态之一，以响应于 写入电流，其被提供给存储器单元并且基于所存储的数字状态生成超导相位。 存储器单元还包括超导读取选择器件，其被配置为响应于提供给存储器单元的读取电流来实现读取操作。 存储单元还包括至少一个约瑟夫逊结，其被配置为在读取操作期间基于PHMJJ的超导相位提供输出，对应于所存储的数字状态的输出。

公开(公告)号：US09208861B2

公开(公告)日：2015-12-08

申请号：US14043360

申请日：2013-10-01

申请人： Anna Y. Herr ,  Quentin P. Herr ,  Ofer Naaman

发明人： Anna Y. Herr ,  Quentin P. Herr ,  Ofer Naaman

IPC分类号： G11C11/44 ,  G11C11/15 ,  B82Y10/00 ,  G01R33/035 ,  H01L27/18 ,  H01L39/02 ,  H01L39/22

CPC分类号： G11C11/44 ,  B82Y10/00 ,  G01R33/0354 ,  G01R33/0358 ,  G11C11/15 ,  G11C11/1655 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  H01L27/18 ,  H01L39/025 ,  H01L39/223

摘要： One embodiment describes a memory cell. The memory cell includes a phase hysteretic magnetic Josephson junction (PHMJJ) that is configured to store one of a first binary logic state corresponding to a binary logic-1 state and a second binary logic state corresponding to a binary logic-0 state in response to a write current and to generate a superconducting phase based on the stored digital state. The memory cell also includes at least one Josephson junction having a critical current that is based on the superconducting phase of the PHMJJ and being configured to provide an output corresponding to the stored digital state in response to a read current.

摘要翻译： 一个实施例描述了一个存储单元。 存储器单元包括相滞后磁约瑟夫逊结（PHMJJ），其被配置为存储对应于二进制逻辑1状态的第一二进制逻辑状态和对应于二进制逻辑0状态的第二二进制逻辑状态之一，以响应于 写入电流并且基于存储的数字状态产生超导相位。 存储单元还包括至少一个约瑟夫逊结，其具有基于PHMJJ的超导相位的临界电流，并且被配置为响应于读取电流提供对应于存储的数字状态的输出。

公开(公告)号：US09174840B2

公开(公告)日：2015-11-03

申请号：US14044220

申请日：2013-10-02

申请人： Quentin P. Herr ,  Anna Y. Herr

发明人： Quentin P. Herr ,  Anna Y. Herr

IPC分类号： H02M1/32 ,  B82Y10/00 ,  H03K17/92 ,  H03K19/00 ,  H03K19/195 ,  G06N99/00

CPC分类号： B82Y10/00 ,  G06N99/002 ,  H02M7/04 ,  H02M7/043 ,  H03K17/92 ,  H03K19/0008 ,  H03K19/195 ,  H03K19/1952 ,  H03K19/1954 ,  H03K2217/0036

摘要： One embodiment describes an AC/DC converter system. The system includes a flux-shuttle loop that is inductively coupled with an AC input signal. The system also includes a plurality of Josephson junctions spaced about the flux shuttle loop that are configured to sequentially trigger in response to the AC input signal and to provide a single-flux quantum (SFQ) pulse that moves sequentially around the flux-shuttle loop that results in a DC output signal being provided through an output inductor.

摘要翻译： 一个实施例描述了一种AC / DC转换器系统。 该系统包括与AC输入信号感应耦合的磁通穿越回路。 该系统还包括围绕磁通穿梭回路间隔开的多个约瑟夫逊结，其被配置为响应于AC输入信号而顺序地触发并提供在磁通穿梭循环周围依次移动的单通量量子（SFQ）脉冲， 导致通过输出电感器提供直流输出信号。

公开(公告)号：US08610453B2

公开(公告)日：2013-12-17

申请号：US13167188

申请日：2011-06-23

申请人： Quentin P. Herr

发明人： Quentin P. Herr

IPC分类号： H03K19/195

CPC分类号： H03K19/1952 ,  B82Y10/00 ,  G06N99/002 ,  H03K17/92 ,  H03K19/0008 ,  H03K2217/0036

摘要： Superconducting single flux quantum circuits are disclosed herein, each having at least one Josephson junction which will flip when the current through it exceeds a critical current. Bias current for the Josephson junction is provided by a biasing transformer instead of a resistor. The lack of any bias resistors ensures that unwanted power dissipation is eliminated.

摘要翻译： 本文公开了超导单通量量子电路，每个具有至少一个约瑟夫逊结，当通过其的电流超过临界电流时，其将翻转。 约瑟夫逊结的偏置电流由偏置变压器代替电阻器提供。 缺少任何偏置电阻器可确保消除不必要的功耗。