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    LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE
    62.
    发明申请
    LOGIC CIRCUIT AND SEMICONDUCTOR DEVICE 审中-公开
    逻辑电路和半导体器件

    公开(公告)号：US20130200370A1

    公开(公告)日：2013-08-08

    申请号：US13845424

    申请日：2013-03-18

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Masashi TSUBUKU ,  Kosei NODA

    IPC: H01L29/786

    CPC classification number: H01L29/7869 ,  H01L22/34 ,  H01L27/0207 ,  H01L27/1225 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A logic circuit includes a thin film transistor having a channel formation region formed using an oxide semiconductor, and a capacitor having terminals one of which is brought into a floating state by turning off the thin film transistor. The oxide semiconductor has a hydrogen concentration of 5×1019 (atoms/cm3) or less and thus substantially serves as an insulator in a state where an electric field is not generated. Therefore, off-state current of a thin film transistor can be reduced, leadind to suppressing the leakage of electric charge stored in a capacitor, through the thin film transistor. Accordingly, a malfunction of the logic circuit can be prevented. Further, the excessive amount of current which flows in the logic circuit can be reduced through the reduction of off-state current of the thin film transistor, resulting in low power consumption of the logic circuit.

    Abstract translation: 逻辑电路包括具有使用氧化物半导体形成的沟道形成区域的薄膜晶体管，以及通过关闭薄膜晶体管而使端子中的一个成为浮置状态的电容器。 氧化物半导体的氢浓度为5×1019（原子/ cm3）以下，因此在不产生电场的状态下基本上用作绝缘体。 因此，可以减小薄膜晶体管的截止电流，从而通过薄膜晶体管抑制存储在电容器中的电荷的泄漏。 因此，可以防止逻辑电路的故障。 此外，可以通过减小薄膜晶体管的截止电流来降低在逻辑电路中流动的过量的电流，导致逻辑电路的低功耗。

    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
    63.
    发明申请
    SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
    半导体器件及其制造方法

    公开(公告)号：US20130175523A1

    公开(公告)日：2013-07-11

    申请号：US13772692

    申请日：2013-02-21

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Kengo AKIMOTO ,  Masashi TSUBUKU

    IPC: H01L33/00

    CPC classification number: H01L33/0041 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: One of factors that increase the contact resistance at the interface between a first semiconductor layer where a channel is formed and source and drain electrode layers is a film with high electric resistance formed by dust or impurity contamination of a surface of a metal material serving as the source and drain electrode layers. As a solution, a first protective layer and a second protective layer including a second semiconductor having a conductivity that is less than or equal to that of the first semiconductor layer is stacked successively over source and drain electrode layers without exposed to air, the stack of films is used for the source and drain electrode layers.

    Abstract translation: 增加在形成沟道的第一半导体层与源电极层与漏极电极层之间的界面处的接触电阻的因素之一是具有高电阻的膜，其由作为金属材料的金属材料的表面的灰尘或杂质污染形成 源极和漏极电极层。 作为解决方案，包括导电率小于或等于第一半导体层的导电率的第二半导体的第一保护层和第二保护层在不暴露于空气的情况下在源极和漏极电极层上依次层叠， 膜用于源电极层和漏电极层。

    SEMICONDUCTOR DEVICE
    64.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130105865A1

    公开(公告)日：2013-05-02

    申请号：US13654864

    申请日：2012-10-18

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Takashi SHIMAZU

    IPC: H01L29/786

    CPC classification number: H01L29/78693 ,  H01L29/7869 ,  H01L29/78696

    Abstract: A semiconductor device includes a base insulating film including silicon, an oxide semiconductor film over the base insulating film, a gate insulating film over the oxide semiconductor film, a gate electrode which is in contact with the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode electrically connected to the oxide semiconductor film. The oxide semiconductor film includes a region in which a concentration of silicon distributed from the interface with the base insulating film toward an inside of the oxide semiconductor film is lower than or equal to 1.0 at. %. A crystal portion is included at least in the region.

    Abstract translation: 半导体器件包括：基底绝缘膜，包括硅，在基底绝缘膜上的氧化物半导体膜，氧化物半导体膜上的栅极绝缘膜，与栅极绝缘膜接触并与至少氧化物重叠的栅极; 半导体膜，以及与氧化物半导体膜电连接的源电极和漏电极。 氧化物半导体膜包括从与基底绝缘膜的界面朝向氧化物半导体膜的内部分布的硅浓度低于或等于1.0at的区域。 ％。 晶体部分至少包括在该区域中。

    SEMICONDUCTOR DEVICE
    65.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20130105791A1

    公开(公告)日：2013-05-02

    申请号：US13657165

    申请日：2012-10-22

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Tatsuya HONDA ,  Masashi TSUBUKU ,  Yusuke NONAKA ,  Takashi SHIMAZU

    IPC: H01L29/78

    CPC classification number: H01L29/7869 ,  H01L29/045 ,  H01L29/42376 ,  H01L29/4908 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78606 ,  H01L29/78696

    Abstract: To suppress a decrease in on-state current in a semiconductor device including an oxide semiconductor. A semiconductor device includes an insulating film containing silicon, an oxide semiconductor film over the insulating film, a gate insulating film containing silicon over the oxide semiconductor film, a gate electrode which is over the gate insulating film and overlaps with at least the oxide semiconductor film, and a source electrode and a drain electrode which are electrically connected to the oxide semiconductor film. In the semiconductor device, the oxide semiconductor film which overlaps with at least the gate electrode includes a region in which a concentration of silicon distributed from an interface with the insulating film is lower than or equal to 1.1 at.%. In addition, a concentration of silicon contained in a remaining portion of the oxide semiconductor film except the region is lower than the concentration of silicon contained in the region.

    Abstract translation: 抑制包括氧化物半导体的半导体器件中的导通电流的降低。 半导体器件包括含有硅的绝缘膜，绝缘膜上的氧化物半导体膜，在氧化物半导体膜上含有硅的栅极绝缘膜，位于栅极绝缘膜之上并与至少氧化物半导体膜重叠的栅电极 ，以及与氧化物半导体膜电连接的源电极和漏电极。 在半导体器件中，与至少栅电极重叠的氧化物半导体膜包括从绝缘膜的界面分布的硅的浓度低于或等于1.1at。％的区域。 此外，除了该区域之外，氧化物半导体膜的剩余部分中所含的硅的浓度低于该区域中所含的硅的浓度。

    TRANSISTOR AND DISPLAY DEVICE
    67.
    发明申请
    TRANSISTOR AND DISPLAY DEVICE 有权

    公开(公告)号：US20250151404A1

    公开(公告)日：2025-05-08

    申请号：US19011968

    申请日：2025-01-07

    Applicant: Semiconductor Energy Laboratory Co., Ltd.

    Inventor： Shunpei YAMAZAKI ,  Toshinari SASAKI ,  Junichiro SAKATA ,  Masashi TSUBUKU

    IPC: H10D86/60 ,  H10D30/67 ,  H10D62/80 ,  H10D64/27 ,  H10D64/62 ,  H10D86/40 ,  H10K59/121 ,  H10K59/123

    Abstract: It is an object to manufacture a highly reliable display device using a thin film transistor having favorable electric characteristics and high reliability as a switching element. In a bottom gate thin film transistor including an amorphous oxide semiconductor, an oxide conductive layer having a crystal region is formed between an oxide semiconductor layer which has been dehydrated or dehydrogenated by heat treatment and each of a source electrode layer and a drain electrode layer which are formed using a metal material. Accordingly, contact resistance between the oxide semiconductor layer and each of the source electrode layer and the drain electrode layer can be reduced; thus, a thin film transistor having favorable electric characteristics and a highly reliable display device using the thin film transistor can be provided.

    DISPLAY DEVICE AND ELECTRONIC DEVICE
    70.
    发明公开
    DISPLAY DEVICE AND ELECTRONIC DEVICE 审中-公开

    公开(公告)号：US20240234581A1

    公开(公告)日：2024-07-11

    申请号：US18582949

    申请日：2024-02-21

    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

    Inventor： Hajime KIMURA ,  Kengo AKIMOTO ,  Masashi TSUBUKU ,  Toshinari SASAKI

    IPC: H01L29/786 ,  G09G3/36 ,  H01L27/12

    CPC classification number: H01L29/78693 ,  G09G3/3648 ,  H01L27/1225 ,  H01L29/78618 ,  G09G2300/0842

    Abstract: A display device including a pixel having a memory. The pixel includes at least a display element, a capacitor, an inverter, and a switch. The switch is controlled with a signal held in the capacitor and a signal output from the inverter so that voltage is supplied to the display element. The inverter and the switch can be constituted by transistors with the same polarity. A semiconductor layer included in the pixel may be formed using a light-transmitting material. Moreover, a gate electrode, a drain electrode, and a capacitor electrode may be formed using a light-transmitting conductive layer. The pixel is formed using a light-transmitting material in such a manner, whereby the display device can be a transmissive display device while including a pixel having a memory.

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