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公开(公告)号:US20250120277A1
公开(公告)日:2025-04-10
申请号:US18985487
申请日:2024-12-18
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Takashi NAKAGAWA , Hidetomo KOBAYASHI , Hideaki SHISHIDO
IPC: G09G3/3233 , G09G3/32
Abstract: A display device with high luminance is provided. A pixel includes a light-emitting device, a first transistor, a second transistor, a third transistor, a fourth transistor, a first capacitor, and a second capacitor. One electrode of the light-emitting device is electrically connected to one of a source and a drain of the first transistor. A gate of the first transistor is electrically connected to one electrode of the first capacitor and one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is electrically connected to one electrode of the second capacitor. One electrode of the second capacitor is electrically connected to a first wiring having a function of supplying a first potential. The other electrode of the second capacitor is electrically connected to the other electrode of the first capacitor, one of a source and a drain of the third transistor, and one of a source and a drain of the fourth transistor.
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公开(公告)号:US20250057004A1
公开(公告)日:2025-02-13
申请号:US18739446
申请日:2024-06-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Kei TAKAHASHI , Hidetomo KOBAYASHI
Abstract: Common noise is reduced from light-receiving data. A display module includes a display apparatus and a reading circuit. Each of a first pixel and a second pixel adjacent to each other in the display apparatus includes a light-receiving element and a light-emitting element. The reading circuit includes a differential input circuit. Common noise generated when display data is supplied to a light-emitting element, for example, may affect a first light-receiving signal output by the first pixel and a second light-receiving signal output by the second pixel. A first current is generated using the first light-receiving signal and a ramp signal, and a second current is generated using the second light-receiving signal and a first potential. The differential input circuit is controlled so that the first current and the second current have the same current value, whereby common noise can be removed from the first light-receiving signal.
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公开(公告)号:US20240373709A1
公开(公告)日:2024-11-07
申请号:US18688811
申请日:2022-08-29
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yuki OKAMOTO , Tatsuya ONUKI , Hidetomo KOBAYASHI , Takanori MATSUZAKI , Munehiro KOZUMA
IPC: H10K59/131 , H01L27/12 , H10K50/19 , H10K59/121
Abstract: An object is to provide a semiconductor device in which the number of control wirings is reduced. In a semiconductor device of one embodiment of the present invention, a first wiring (GLa) is connected to a first input terminal (54a) of a logic circuit (54) and a gate of a sixth transistor (M6); a second wiring (GLb) is connected to a second input terminal (54b) of the logic circuit (54), a gate of the third transistor (M3), a gate of the fourth transistor (M4), and a gate of the fifth transistor (M5); a gate of the first transistor (M1) is connected to an output terminal (54y) of the logic circuit (54); and the logic circuit (54) has a function of outputting a signal obtained by a logic operation of a signal input to the first input terminal (54a) and a signal input to the second input terminal (54b) to the output terminal (54y).
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公开(公告)号:US20240062724A1
公开(公告)日:2024-02-22
申请号:US18380221
申请日:2023-10-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Takayuki IKEDA , Hidetomo KOBAYASHI , Hideaki SHISHIDO , Kiyotaka KIMURA , Takashi NAKAGAWA , Kosei NEI
IPC: G09G3/3275 , G09G3/3233 , G09G3/3266 , G09G5/377 , H01L29/786 , H10K59/127
CPC classification number: G09G3/3275 , G09G3/3233 , G09G3/3266 , G09G5/377 , H01L29/7869 , H10K59/1275 , G09G3/36
Abstract: A high-definition display device is provided. A small display device is provided. In the display device, a first layer and a second layer are stacked and provided. The first layer includes a gate driver circuit and a source driver circuit, and the second layer includes a display portion. The gate driver circuit and the source driver circuit are provided to include a region overlapping with the display portion. The gate driver circuit and the source driver circuit have an overlap region where they are not strictly separated from each other. Five or more gate driver circuits and five or more source driver circuits can be provided.
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公开(公告)号:US20230387147A1
公开(公告)日:2023-11-30
申请号:US18231871
申请日:2023-08-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takayuki IKEDA , Yoshiyuki KUROKAWA , Shintaro HARADA , Hidetomo KOBAYASHI , Roh YAMAMOTO , Kiyotaka KIMURA , Takashi NAKAGAWA , Yusuke NEGORO
IPC: H01L27/146 , H01L27/12 , H01L29/786 , H04N25/40 , H04N25/77 , H04N25/766
CPC classification number: H01L27/14605 , H01L27/1225 , H01L27/14612 , H01L27/14643 , H01L29/7869 , H04N25/40 , H04N25/77 , H04N25/766
Abstract: An imaging device capable of image processing is provided. The imaging device can retain analog data (image data) obtained by an image-capturing operation in a pixel and perform a product-sum operation of the analog data and a predetermined weight coefficient in the pixel to convert the data into binary data. When the binary data is taken in a neural network or the like, processing such as image recognition can be performed. Since enormous volumes of image data can be retained in pixels in the state of analog data, processing can be performed efficiently.
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公开(公告)号:US20220230573A1
公开(公告)日:2022-07-21
申请号:US17609497
申请日:2020-04-28
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Takashi NAKAGAWA , Takayuki IKEDA , Hidetomo KOBAYASHI , Hideaki SHISHIDO , Shuichi KATSUI , Kiyotaka KIMURA
IPC: G09G3/20
Abstract: A display device with a narrower frame can be provided. In the display device, a first layer, a second layer, and a third layer are provided to be stacked. The first layer includes a gate driver circuit and a data driver circuit, the second layer includes a demultiplexer circuit, and the third layer includes a display portion. In the display portion, pixels are arranged in a matrix, an input terminal of the demultiplexer circuit is electrically connected to the data driver circuit, and an output terminal of the demultiplexer circuit is electrically connected to some of the pixels. The gate driver circuit and the data driver circuit are provided to include a region overlapping some of the pixels. The gate driver circuit and the data driver circuit have a region where they are not strictly separated from each other and overlap each other. Five or more gate driver circuits and five or more data driver circuits can be provided.
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公开(公告)号:US20210202549A1
公开(公告)日:2021-07-01
申请号:US17057526
申请日:2019-06-11
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Seiichi YONEDA , Hidetomo KOBAYASHI , Takashi NAKAGAWA , Yusuke NEGORO , Shunpei YAMAZAKI
IPC: H01L27/146 , H04N5/378 , H04N5/353 , H04N5/369
Abstract: An imaging device that can obtain imaging data corresponding to high-resolution images in a short period of time is provided. The imaging device includes a pixel including a photoelectric conversion element and n (n is an integer more than 2 inclusive) retention circuits. The photoelectric conversion element and the n retention circuits are stacked. One electrode of the photoelectric conversion element is electrically connected to the first to n-th retention circuits. The retention circuits include OS transistors with an extremely low off-state current feature, and can retain imaging data for a long time. In the first to n-th periods, the imaging device obtains the first to n-th imaging data and retains it in the first to n-th retention circuits. Then, the first to n-th imaging data retained in the first to n-th retention circuits are read out. The read imaging data is output outside the imaging data through AD conversion.
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公开(公告)号:US20210151486A1
公开(公告)日:2021-05-20
申请号:US16628073
申请日:2018-07-03
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor: Hidetomo KOBAYASHI , Yuki TAMATSUKURI , Naoto KUSUMOTO
IPC: H01L27/146
Abstract: An imaging device capable of executing image processing is provided.
A structure is employed in which a photoelectric conversion element, a first transistor, a second transistor, and an inverter circuit are included; one electrode of the photoelectric conversion element is electrically connected to one of a source and a drain of the first transistor; the other of the source and the drain of the first transistor is electrically connected to one of a source and a drain of the second transistor; the one of the source and the drain of the second transistor is electrically connected to an input terminal of the inverter circuit; and data obtained by photoelectric conversion is binarized and output.-
公开(公告)号:US20210135674A1
公开(公告)日:2021-05-06
申请号:US17150859
申请日:2021-01-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Masashi FUJITA , Yutaka SHIONOIRI , Kiyoshi KATO , Hidetomo KOBAYASHI
IPC: H03K19/17728 , H03K19/173 , H03K19/17772 , H03K19/17758
Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.
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公开(公告)号:US20210065640A1
公开(公告)日:2021-03-04
申请号:US16901129
申请日:2020-06-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Hidetomo KOBAYASHI , Kei TAKAHASHI , Shunpei YAMAZAKI
IPC: G09G3/36 , G02F1/1362 , G02F1/1343 , H01L29/786 , G06F1/16 , G09G3/3233 , H01L27/12 , G02B27/01 , H04M1/02
Abstract: A display device with favorable display quality is provided. A display portion where a plurality of pixels is arranged in a matrix is divided into Region A and Region B, i.e., regions on the upstream side and the downstream side of a scanning direction. A signal line for supplying an image signal is provided in each of Region A and Region B. Region A and Region B adjoin each other such that a boundary line showing the boundary between the regions is bent. Bending the boundary line suppresses formation of a stripe in a boundary portion. For example, in a given column, the total number of pixels electrically connected to a signal line in Region A is made different from the total number of pixels electrically connected to a signal line in Region B.
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