公开(公告)号：US20160071478A1

公开(公告)日：2016-03-10

申请号：US14844436

申请日：2015-09-03

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI ,  Keita SATO

IPC: G09G3/36 ,  H01L29/786 ,  H01L27/12

CPC classification number: G09G3/3696 ,  G09G3/3648 ,  G09G3/3692 ,  G09G2300/0426 ,  G09G2310/0297 ,  G09G2330/021 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/7869 ,  H01L29/78696

Abstract: To provide a small driver IC, in a pass transistor logic circuit that converts k-bit digital signals into analog signals, transistors supplied with a first-bit signal are arranged in a line in the channel width direction. The channel width of transistors supplied with second to kth-bit signals is made larger than (e.g., preferably larger than two times and smaller than eight times) that of the transistors supplied with the first-bit signal. The transistors are preferably arranged such that transistors of the same conductivity type are located adjacent to each other wherever possible.

Abstract translation: 为了提供小型驱动器IC，在将k位数字信号转换为模拟信号的传输晶体管逻辑电路中，提供有第一位信号的晶体管沿通道宽度方向排列成一行。 提供有第二至第k位信号的晶体管的沟道宽度被制成大于（被提供给第一位信号）的晶体管的通道宽度（例如，优选地大于两倍且小于八倍）。 晶体管优选地布置成使得尽可能相同导电类型的晶体管彼此相邻地定位。

公开(公告)号：US20160027922A1

公开(公告)日：2016-01-28

申请号：US14873249

申请日：2015-10-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kei TAKAHASHI ,  Yoshiaki ITO

IPC: H01L29/786 ,  H01L29/423 ,  H01L29/417 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/04 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969

Abstract: The semiconductor device includes a first conductive layer over a substrate; an oxide semiconductor layer which covers the first conductive layer; a second conductive layer in a region which is not overlapped with the first conductive layer over the oxide semiconductor layer; an insulating layer which covers the oxide semiconductor layer and the second conductive layer; and a third conductive layer in a region including at least a region which is not overlapped with the first conductive layer or the second conductive layer over the insulating layer.

Abstract translation: 半导体器件包括在衬底上的第一导电层; 覆盖所述第一导电层的氧化物半导体层; 在与所述氧化物半导体层上的所述第一导电层不重叠的区域中的第二导电层; 覆盖氧化物半导体层和第二导电层的绝缘层; 以及在绝缘层上至少包括不与第一导电层或第二导电层重叠的区域的区域中的第三导电层。

公开(公告)号：US20150249385A1

公开(公告)日：2015-09-03

申请号：US14632164

申请日：2015-02-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kei TAKAHASHI

IPC: H02M3/158 ,  H05B37/02

CPC classification number: H02M3/158 ,  H02M3/156 ,  H02M2001/0003 ,  H05B33/0815 ,  H05B37/02

Abstract: A DC-DC converter with improved voltage conversion efficiency is provided. The DC-DC converter includes a first circuit configured to generate a first signal containing data on current flowing through a load, a second circuit configured to amplify the first signal, a third circuit configured to generate a second signal containing data on voltage applied to the load, a fourth circuit configured to hold the second signal, a fifth circuit configured to amplify the second signal held by the fourth circuit, a sixth circuit configured to correct a difference in electrical characteristics between the second circuit and the fifth circuit, a seventh circuit configured to convert a first voltage to a second voltage supplied to the load, and an eighth circuit configured to control a level of the second voltage generated by the seventh circuit in accordance with either the amplified first signal or the amplified second signal.

Abstract translation: 提供了具有改进的电压转换效率的DC-DC转换器。 DC-DC转换器包括：第一电路，被配置为产生包含流过负载的电流的数据的第一信号，被配置为放大第一信号的第二电路;第三电路，被配置为产生包含施加到 第四电路，被配置为保持第二信号;第五电路，被配置为放大由第四电路保持的第二信号;第六电路，被配置为校正第二电路和第五电路之间的电特性差;第七电路 被配置为将第一电压转换为提供给负载的第二电压;以及第八电路，被配置为根据放大的第一信号或放大的第二信号来控制由第七电路产生的第二电压的电平。

公开(公告)号：US20250015614A1

公开(公告)日：2025-01-09

申请号：US18894219

申请日：2024-09-24

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Kei TAKAHASHI ,  Yuki OKAMOTO ,  Minato ITO ,  Takahiko ISHIZU ,  Hiroki INOUE ,  Shunpei YAMAZAKI

IPC: H02J7/00 ,  H01M10/42 ,  H01M10/44 ,  H03K3/0231 ,  H03K17/082

Abstract: A semiconductor device with reduced power consumption is provided. The semiconductor device includes a node ND1, a node ND2, a resistor, a capacitor, and a comparison circuit. The resistor is electrically connected in series between one of a positive electrode and a negative electrode of a secondary battery and a first terminal. The resistor has a function of converting current flowing between the one of the positive electrode and the negative electrode of the secondary battery and the first terminal into a first voltage. The first voltage is added to a voltage of the node ND2 through the capacitor. The comparison circuit has a function of comparing a voltage of the node ND1 and the voltage of the node ND2. The comparison circuit outputs a signal that notifies detection of overcurrent when the voltage of the node ND2 is higher than the voltage of the node ND1.

公开(公告)号：US20240243204A1

公开(公告)日：2024-07-18

申请号：US18522543

申请日：2023-11-29

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Jun KOYAMA ,  Hiroyuki MIYAKE ,  Kei TAKAHASHI ,  Kouhei TOYOTAKA ,  Masashi TSUBUKU ,  Kosei NODA ,  Hideaki KUWABARA

IPC: H01L29/786 ,  G06K19/077 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/088 ,  H01L27/12 ,  H01L29/24 ,  H01L29/26 ,  H01L29/66 ,  G11C7/00 ,  G11C19/28 ,  H02M3/07

CPC classification number: H01L29/78609 ,  G06K19/07758 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/26 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  G11C7/00 ,  G11C19/28 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor, With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US20240212948A1

公开(公告)日：2024-06-27

申请号：US18403793

申请日：2024-01-04

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takuya KAWATA ,  Kei TAKAHASHI

IPC: H01G11/78 ,  G02F1/1333 ,  H01G11/82 ,  H01M50/105 ,  H01M50/211 ,  H01M50/24 ,  H01M50/579 ,  H02J50/12

CPC classification number: H01G11/78 ,  H01G11/82 ,  H01M50/105 ,  H01M50/211 ,  H01M50/24 ,  G02F1/133305 ,  H01M50/579 ,  H01M2220/30 ,  H02J50/12

Abstract: To provide a flexible, highly reliable power storage device or light-emitting device. The device includes a battery unit or a light-emitting unit and a member with rubber elasticity. The battery unit includes a secondary battery. The light-emitting unit includes a light-emitting element. The member with rubber elasticity is provided with a first projection and a second projection. The first projection and the second projection are arranged on a first surface of the battery unit or the light-emitting unit. The first projection and the second projection come in contact with each other when the power storage device is bent such that the first surface of the battery unit faces inward.

公开(公告)号：US20240046857A1

公开(公告)日：2024-02-08

申请号：US18380819

申请日：2023-10-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Kei TAKAHASHI ,  Susumu KAWASHIMA ,  Koji KUSUNOKI ,  Kazunori WATANABE

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2330/028

Abstract: The power consumption of a display device is reduced. The power consumption of a driver circuit in a display device is reduced. A pixel included in the display device includes a display element. The pixel is configured to have a function of retaining a first voltage corresponding to a first input pulse signal and a function of driving the display element with a third voltage obtained by addition of a second voltage corresponding to a second input pulse signal to the first voltage.

公开(公告)号：US20230403876A1

公开(公告)日：2023-12-14

申请号：US18233361

申请日：2023-08-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Satoshi SEO ,  Koji KUSUNOKI ,  Kei TAKAHASHI

IPC: H10K50/115 ,  G09G3/3225 ,  H10K59/121

CPC classification number: H10K50/115 ,  G09G3/3225 ,  H10K59/1213 ,  G09G2300/0842

Abstract: A display device having a high display quality is provided. A display device that can perform desired display without image data conversion is provided. The display device includes a first pixel. The first pixel includes a first light-emitting element, a color conversion layer, and a first memory circuit. The first light-emitting element exhibits blue light. The color conversion layer has a function of converting light emitted by the first light-emitting element into light having a longer wavelength. A first image signal and a first correction signal are supplied to the first pixel. The first memory circuit has a function of retaining the first correction signal and a function of adding the first correction signal to the first image signal. The first pixel has a function of displaying an image using the first image signal and the first correction signal.

公开(公告)号：US20230260473A1

公开(公告)日：2023-08-17

申请号：US18135818

申请日：2023-04-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hidetomo KOBAYASHI ,  Kei TAKAHASHI ,  Shunpei YAMAZAKI

IPC: G09G3/36 ,  G02F1/1362 ,  G02F1/1343 ,  H01L29/786 ,  G06F1/16 ,  G09G3/3233 ,  H01L27/12 ,  G02B27/01 ,  H04M1/02

CPC classification number: G09G3/3648 ,  G02F1/136286 ,  G02F1/1343 ,  H01L29/78648 ,  G06F1/1652 ,  G09G3/3233 ,  H01L27/1225 ,  G02B27/01 ,  H01L27/124 ,  H04M1/0268 ,  G09G2310/0264 ,  G09G2300/0426 ,  G02F1/133602

Abstract: A display device with favorable display quality is provided. A display portion where a plurality of pixels is arranged in a matrix is divided into Region A and Region B, i.e., regions on the upstream side and the downstream side of a scanning direction. A signal line for supplying an image signal is provided in each of Region A and Region B. Region A and Region B adjoin each other such that a boundary line showing the boundary between the regions is bent. Bending the boundary line suppresses formation of a stripe in a boundary portion. For example, in a given column, the total number of pixels electrically connected to a signal line in Region A is made different from the total number of pixels electrically connected to a signal line in Region B.

公开(公告)号：US20230176802A1

公开(公告)日：2023-06-08

申请号：US18101614

申请日：2023-01-26

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kensuke YOSHIZUMI ,  Yuichi YANAGISAWA ,  Kei TAKAHASHI

IPC: G06F3/14 ,  G06F3/147 ,  H01L27/146 ,  H10K77/10

CPC classification number: G06F3/1446 ,  G06F3/147 ,  H01L27/14681 ,  H10K77/111 ,  H04N5/64

Abstract: Provided is a display device or a display system capable of displaying images along a curved surface, a display device or a display system capable of displaying images seamlessly in the form of a ring, or a display device or a display system that is suitable for increasing in size. The display device includes a display panel. The display panel includes a first part and a second part and is flexible. The first part can display images. The second part can transmit visible light. The display panel is curved so that the second part and the first part overlap with each other.