公开(公告)号：US20100219382A1

公开(公告)日：2010-09-02

申请号：US12738017

申请日：2008-10-21

Applicant: Shinji Abe

Inventor： Shinji Abe

IPC: H01B1/16

CPC classification number: H05K3/323 ,  C08K3/017 ,  C08K9/02 ,  C09J9/02 ,  C09J11/04 ,  H01B1/22 ,  H01R4/04 ,  H05K2201/0209 ,  H05K2201/0221 ,  H05K2201/0224 ,  Y10T428/2991

Abstract: The present invention provides a coated conductive powder in which the aggregation of conductive particles is suppressed and which is also excellent in electrical reliability, and a conductive adhesive using the same that can provide connection with high electrical reliability even for the connection of the electrodes of miniaturized electronic parts, such as IC chips, and circuit boards. The coated conductive powder of the present invention is a coated conductive powder obtained by coating the surfaces of conductive particles with insulating inorganic fine particles, wherein the volume resistivity value of the coated conductive powder is 1 Ω·cm or less, the specific gravity of the insulating inorganic fine particles is 5.0 g/ml or less, the particle diameter ratio of the insulating inorganic fine particles to the conductive particles (the insulating inorganic fine particles/the conductive particles) is 1/100 or less, and the insulating inorganic fine particles adhere to the surfaces of the conductive particles.

Abstract translation: 本发明提供了一种涂覆的导电粉末，其中导电颗粒的聚集被抑制并且电可靠性也优异，并且使用该导电粘合剂可以提供甚至连接小型化的电极的高电气可靠性 电子部件，如IC芯片和电路板。 本发明的涂覆导电粉末是通过用绝缘无机细颗粒涂覆导电颗粒的表面而获得的涂覆导电粉末，其中涂覆的导电粉末的体积电阻率值为1＆OHgr·cm以下，比重为 绝缘性无机微粒为5.0g / ml以下，绝缘性无机微粒与导电性粒子（绝缘性无机微粒/导电性粒子）的粒径比为1/100以下，绝缘性无机质 颗粒附着在导电颗粒的表面上。

公开(公告)号：US07687290B2

公开(公告)日：2010-03-30

申请号：US12049456

申请日：2008-03-17

Applicant: Shinji Abe

Inventor： Shinji Abe

IPC: H01L21/00

CPC classification number: H01S5/22 ,  B82Y20/00 ,  H01S5/0202 ,  H01S5/028 ,  H01S5/162 ,  H01S5/2009 ,  H01S5/2214 ,  H01S5/34333

Abstract: A method for manufacturing a semiconductor optical device includes: forming a laminated semiconductor structure of GaN-based materials on a semiconductor wafer, the laminated semiconductor structure forming a laser diode of GaN-based materials, including an active layer having a quantum well structure; cleaving the semiconductor wafer including the laminated semiconductor structure to expose a cleaved end face of the laminated semiconductor structure; and forming an SiO2 film on the cleaved end face and performing a heat treatment to cause Ga vacancy diffusion in the active layer to disorder the quantum well structure of the active layer.

Abstract translation: 一种制造半导体光学器件的方法包括：在半导体晶片上形成GaN基材料的叠层半导体结构，所述叠层半导体结构形成GaN基材料的激光二极管，其包括具有量子阱结构的有源层; 将包含层叠半导体结构的半导体晶片切断，使层叠半导体结构的切断端面露出; 在切割端面上形成SiO 2膜，进行热处理，使活性层中的Ga空位扩散，妨碍有源层的量子阱结构。

公开(公告)号：US07610509B2

公开(公告)日：2009-10-27

申请号：US11304890

申请日：2005-12-16

Applicant: Shinji Abe

Inventor： Shinji Abe

IPC: G06F11/00

CPC classification number: G06F11/2007 ,  G06F11/1629 ,  G06F11/2005

Abstract: A fault tolerant (FT) computer system includes a first system; and a second system configured to operate in synchronization with the first system. Each of the first and second systems includes a CPU; and a routing controller connected with the CPU. The first system includes a first I/O device as an activist I/O device, and the second system includes a second I/O device as a standby I/O device. The routing controller controls a routing between the CPU and the first I/O device and the second I/O device. When a fault has occurred in the first I/O device, the routing controller in said first system routes a request data a request data received from the CPU and destined to the first I/O device, to the second I/O device.

Abstract translation: 容错（FT）计算机系统包括第一系统; 以及被配置为与所述第一系统同步地操作的第二系统。 第一和第二系统中的每一个包括CPU; 和与CPU连接的路由控制器。 第一系统包括作为活动者I / O设备的第一I / O设备，并且第二系统包括作为备用I / O设备的第二I / O设备。 路由控制器控制CPU和第一个I / O设备和第二个I / O设备之间的路由。 当在第一I / O设备中发生故障时，所述第一系统中的路由控制器将从CPU接收的并发往第一I / O设备的请求数据的请求数据路由到第二I / O设备。

公开(公告)号：US07585688B2

公开(公告)日：2009-09-08

申请号：US12039267

申请日：2008-02-28

Applicant: Takafumi Oka ,  Shinji Abe

Inventor： Takafumi Oka ,  Shinji Abe

IPC: H01L21/00

CPC classification number: H01S5/22 ,  B82Y20/00 ,  H01S5/0425 ,  H01S5/2009 ,  H01S5/2086 ,  H01S5/2202 ,  H01S5/2214 ,  H01S5/34333

Abstract: A method for manufacturing a semiconductor optical device includes: forming a first resist pattern on a top surface of a laminated semiconductor structure; forming channels and a waveguide ridge by dry etching using the first resist pattern as a mask; forming an SiO2 film on the waveguide ridge and the channels, leaving the first resist pattern on a top surface of the waveguide ridge; forming a second resist pattern covering the SiO2 film on the channels, and exposing the top surface of the SiO2 film on top of the waveguide ridge; removing the SiO2 film by dry etching using the second resist pattern as a mask; removing the first and second resist patterns by a wet method; and forming a p-side electrode.

Abstract translation: 一种制造半导体光学器件的方法包括：在层叠半导体结构的顶表面上形成第一抗蚀剂图案; 通过使用第一抗蚀剂图案作为掩模的干蚀刻形成通道和波导脊; 在波导脊和通道上形成SiO 2膜，将第一抗蚀剂图案留在波导脊的顶表面上; 在所述通道上形成覆盖所述SiO 2膜的第二抗蚀剂图案，并且将所述SiO 2膜的顶表面暴露在所述波导脊的顶部; 通过使用第二抗蚀剂图案作为掩模的干蚀刻去除SiO 2膜; 通过湿法去除第一和第二抗蚀剂图案; 并形成p侧电极。

公开(公告)号：US07363311B2

公开(公告)日：2008-04-22

申请号：US10294724

申请日：2002-11-15

Applicant: Etsuro Fujita ,  Shinji Miyahara ,  Shinji Abe ,  Yasuhito Hayashi

Inventor： Etsuro Fujita ,  Shinji Miyahara ,  Shinji Abe ,  Yasuhito Hayashi

IPC: G06F7/00

CPC classification number: G06F17/30601 ,  Y10S707/99942 ,  Y10S707/99943

Abstract: A method of mapping a large number of items of contents each having meta-information to a low dimensional space so that the map of the contents reflects the meta-information. The method includes the steps of assigning a concept vector to each item of contents, adjusting the distance between two items of contents so that the closer the classification information of the two items of contents match, the more the distance is reduced, and assigning position information in the low dimensional space to each item of contents based on the adjusted distance.

Abstract translation: 将具有元信息的大量内容的项目映射到低维空间的方法，使得内容的映射反映元信息。 该方法包括以下步骤：向每个内容项目分配概念向量，调整两个内容项之间的距离，使得两个内容项的分类信息越接近，距离越小，并且分配位置信息 在低维空间中，根据调整后的距离对每个目录进行分类。

公开(公告)号：US20060150024A1

公开(公告)日：2006-07-06

申请号：US11304575

申请日：2005-12-16

Applicant: Shinji Abe

Inventor： Shinji Abe

IPC: G06F11/00

CPC classification number: G06F11/1679 ,  G06F11/1645 ,  G06F11/1658

Abstract: There is disclosed a method capable of resetting a fault tolerant computer in complete synchronization among modules. The method includes a step of generating a reset requesting signal by one of the modules, a step of dividing the reset requesting signal to first and second reset requesting signals, a step of transmitting the second reset requesting signal to the other module, a step of delaying the first reset requesting signal in the one module by a time required for transmitting the second reset requesting signal to the other module, a step of resetting at least one CPU included in the one module by a first CPU reset signal generated based on the first reset requesting signal delayed in the one module, and a step of resetting at least one CPU included in the other module by a second CPU reset signal generated based on the second reset requesting signal transmitted to the other module.

Abstract translation: 公开了能够在模块之间完全同步地重置容错计算机的方法。 该方法包括通过模块之一生成复位请求信号的步骤，将复位请求信号划分为第一和第二复位请求信号的步骤，向另一模块发送第二复位请求信号的步骤，步骤 将所述一个模块中的所述第一复位请求信号延迟传输所述另一个模块所需的时间;通过基于所述第一复位请求信号生成的第一CPU复位信号来复位所述一个模块中包括的至少一个CPU的步骤 在一个模块中延迟的复位请求信号，以及通过基于发送到另一个模块的第二复位请求信号而生成的第二CPU复位信号来复位包括在另一个模块中的至少一个CPU的步骤。

公开(公告)号：US20050227074A1

公开(公告)日：2005-10-13

申请号：US10820025

申请日：2004-04-08

Applicant: Masaaki Oyamada ,  Shinji Abe ,  Akihiro Kawazoe

Inventor： Masaaki Oyamada ,  Shinji Abe ,  Akihiro Kawazoe

IPC: B22F1/02 ,  B22F9/24 ,  B32B15/02 ,  C23C18/18 ,  C23C18/36 ,  C23C18/44

CPC classification number: C23C18/32 ,  B22F1/025 ,  B22F9/24 ,  C23C18/1635 ,  C23C18/1651 ,  C23C18/1889 ,  C23C18/208 ,  C23C18/285 ,  C23C18/30 ,  C23C18/36 ,  C23C18/42 ,  C23C18/44 ,  Y10T428/2991 ,  Y10T428/2993 ,  Y10T428/2998

Abstract: A conductive electroless plated powder includes core particles and a nickel film formed by an electroless plating process on the surface of each core particle, wherein crystal grain boundaries are not recognized in the cross section in the direction of the thickness of the nickel film when observed with a scanning electron microscope at a magnification of up to 100,000. A method for making such a conductive electroless plated powder is also disclosed.

Abstract translation: 导电性无电镀粉末包括芯颗粒和通过化学镀处理在每个芯颗粒的表面上形成的镍膜，其中当用镍膜观察时，在镍膜的厚度方向上的横截面中不能识别晶界， 扫描电子显微镜放大至100,000。 还公开了制造这种导电无电镀粉末的方法。

公开(公告)号：US20050091387A1

公开(公告)日：2005-04-28

申请号：US10948239

申请日：2004-09-24

Applicant: Shinji Abe

Inventor： Shinji Abe

IPC: H04L12/44 ,  G06F9/00 ,  G06F9/445 ,  G06F15/16 ,  H04L12/54 ,  H04L29/12

CPC classification number: G06F9/4405 ,  H04L29/12009 ,  H04L29/12207 ,  H04L61/20

Abstract: In a network switch including a user network port connectable to a user network, a plurality of down link ports each connectable to one server unit, a server unit management network port connectable to a server unit management network for managing the server unit, a store-and-forward switching unit connected to the user network port, the down link ports and the server unit management network port, and a control unit connected to the store-and-forward switching unit, when a packet that has arrived at one of the down link ports is a dynamic host configuration protocol (DHCP) packet including a network boot option, the control unit operates the store-and-forward switching unit to transmit the packet to the server unit management network port.

Abstract translation: 在包括可连接到用户网络的用户网络端口的网络交换机中，可连接到一个服务器单元的多个下行链路端口，可连接到用于管理服务器单元的服务器单元管理网络的服务器单元管理网络端口， 连接到用户网络端口，下行链路端口和服务器单元管理网络端口的前向切换单元，以及连接到存储转发交换单元的控制单元，当已经到达下一个 链路端口是包括网络引导选项的动态主机配置协议（DHCP）数据包，控制单元操作存储转发交换单元，将数据包发送到服务器单元管理网络端口。

公开(公告)号：US06770369B1

公开(公告)日：2004-08-03

申请号：US09926060

申请日：2001-08-22

Applicant: Masaaki Oyamada ,  Shinji Abe

Inventor： Masaaki Oyamada ,  Shinji Abe

IPC: B32B516

CPC classification number: H01R13/03 ,  B22F1/025 ,  C23C18/1635 ,  C23C18/1651 ,  C23C18/30 ,  C23C18/36 ,  C23C18/54 ,  Y10T428/2991 ,  Y10T428/2993 ,  Y10T428/2998

Abstract: A conductive electrolessly plated powder used, for example, for bonding a small electrode of an electronic device, its producing method, and a conductive material containing the plated powder. Conventionally, there has been known, as conductive powders, metallic powders such as of nickel, carbon powders, and conductive plating powders the resin core particles of which are coated with a metal, e.g., nickel. However, there has been no conductive electrolessly plated powders having a good conductivity with respect to connection between conductive patterns having an oxide coating thereon or between electrodes and no methods for producing such powders industrially. The conductive electrolessly plated powder of the present invention consists of resin spherical core particles the average size of which is 1 to 20 &mgr;m and each of which has a nickel or nickel alloy coating formed by electroless plating. The coating includes small projections of 0.05 to 4 &mgr;m on its outermost layer and the coating is substantially continuous with the small projections. A method of producing such a powder is also disclosed.

Abstract translation: 用于例如用于接合电子器件的小电极的导电无电镀粉末，其制造方法和含有电镀粉末的导电材料。 通常，作为导电粉末已知有如镍，碳粉末和导电性电镀粉末的金属粉末，其树脂核心颗粒用金属例如镍涂覆。 然而，没有关于在其上或电极之间具有氧化物涂层的导电图案之间的连接具有良好导电性的导电无电镀粉末，并且没有用于在工业上制造这种粉末的方法。 本发明的导电无电镀粉末由平均粒径为1〜20μm的树脂球形核粒子组成，并且各自具有通过无电镀形成的镍或镍合金涂层。 该涂层在其最外层上包括0.05至4μm的小突起，并且涂层与小突起基本连续。 还公开了制备这种粉末的方法。

公开(公告)号：US06612748B1

公开(公告)日：2003-09-02

申请号：US09587023

申请日：2000-06-05

Applicant: Masayuki Funatsu ,  Masahiro Mukasa ,  Shinji Abe

Inventor： Masayuki Funatsu ,  Masahiro Mukasa ,  Shinji Abe

IPC: F16C3338

CPC classification number: F16C33/416 ,  F16C19/06 ,  F16C33/6614

Abstract: A ball bearing has an outer race, an inner race, and a retainer disposed between the outer race and the inner race. The retainer comprises an annular member having a first annular surface and a second annular surface disposed opposite the first annular surface, a plurality of annularly spaced pockets formed in the first annular surface of the annular member, and a plurality of annular spaced fingers each having inner and outer surfaces and projecting generally axially from the first annular surface of the annular member so that the pockets are disposed between adjacent inner surfaces of respective ones of the pairs of fingers, the first annular surface of the annular member having external and internal edges and a plurality of surface portions each disposed between adjacent outer surfaces of respective ones of the pairs of fingers and inclined toward the second annular surface of the annular member from the external edge to the internal edge. Balls are disposed in respective ones of the pockets of the annular member and coact with the outer and inner races.

Abstract translation: 球轴承具有外座圈，内座圈和设置在外座圈和内座圈之间的保持架。 所述保持器包括环形构件，所述环形构件具有第一环形表面和与所述第一环形表面相对设置的第二环形表面，形成在所述环形构件的所述第一环形表面中的多个环形间隔开的凹穴，以及多个环形间隔开的指状物， 外表面和大致轴向地从环形构件的第一环形表面突出，使得凹穴设置在相对的一对指状物的相邻内表面之间，环形构件的第一环形表面具有外部和内部边缘，并且 多个表面部分，每个表面部分设置在相应的一对指状物的相邻外表面之间，并且从外边缘到内边缘朝向环形构件的第二环形表面倾斜。 球体设置在环形构件的相应凹穴中并与外圈和内圈配合。