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公开(公告)号:US11668010B2
公开(公告)日:2023-06-06
申请号:US15354733
申请日:2016-11-17
申请人: C3Nano Inc.
发明人: Yongxing Hu , Xiqiang Yang , Ying-Syi Li , Alexander Seung-il Hong , Melanie Mariko Inouye , Yadong Cao , Ajay Virkar
IPC分类号: C23C18/44 , C23C18/54 , C09D133/06 , C23C18/16 , B32B27/20 , B32B9/04 , B32B27/28 , B32B27/08 , B32B15/04 , B32B15/08 , B82Y30/00 , C09D11/52 , C09D101/02 , C09D139/06 , C23C18/42 , H01B1/22 , H01B13/30 , H05K1/02 , H05K1/09 , H05K3/10 , H05K3/12 , B32B15/01 , C09D105/08 , B82Y20/00
CPC分类号: C23C18/44 , B32B9/045 , B32B15/018 , B32B15/04 , B32B15/08 , B32B27/08 , B32B27/20 , B32B27/28 , B82Y30/00 , C09D11/52 , C09D101/02 , C09D133/06 , C09D139/06 , C23C18/1635 , C23C18/1637 , C23C18/42 , C23C18/54 , H01B1/22 , H01B13/30 , H05K1/02 , H05K1/0274 , H05K1/097 , H05K3/10 , H05K3/105 , H05K3/1283 , B32B2255/10 , B32B2255/26 , B32B2262/103 , B32B2262/12 , B32B2307/202 , B32B2307/412 , B32B2307/414 , B32B2457/20 , B82Y20/00 , C09D105/08 , H05K2201/0108 , H05K2201/026 , Y10T428/12444 , Y10T428/12479 , Y10T428/12486 , Y10T428/12889 , Y10T428/12896
摘要: Metal nanowires with uniform noble metal coatings are described. Two methods, galvanic exchange and direct deposition, are disclosed for the successful formation of the uniform noble metal coatings. Both the galvanic exchange reaction and the direct deposition method benefit from the inclusion of appropriately strong binding ligands to control or mediate the coating process to provide for the formation of a uniform coating. The noble metal coated nanowires are effective for the production of stable transparent conductive films, which may comprise a fused metal nanostructured network.
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公开(公告)号:US20190239943A1
公开(公告)日:2019-08-08
申请号:US16284324
申请日:2019-02-25
申请人: Kogent Surgical, LLC
CPC分类号: A61B18/1445 , A61B2017/0023 , A61B2017/00526 , A61B2018/00083 , A61B2018/00095 , A61B2018/00148 , A61B2018/00589 , C23C18/54 , C25D3/46 , C25D7/00
摘要: A surgical instrument for electrosurgery having a first forceps arm, a first forceps jaw of the first forceps arm, a first conductor tip of the first forceps arm, a second forceps arm disposed opposite the first forceps arm, a second forceps jaw of the second forceps arm, the second forceps jaw disposed opposite the first forceps jaw, a second conductor tip of the second forceps arm, and the second conductor tip disposed opposite the first conductor tip. The first forceps arm and the second forceps arm are configured to transfer thermal energy away from the first conductor tip and second conductor tip at a rate sufficient to maintain the thermal energy of the first conductor tip and second conductor tip below a designated thermal threshold.
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公开(公告)号:US20180355490A1
公开(公告)日:2018-12-13
申请号:US15959254
申请日:2018-04-22
申请人: ECORENEW DMCC
IPC分类号: C23F1/32 , C25D5/06 , C25D5/48 , C25D11/18 , C25D11/24 , B23K26/352 , C23F1/02 , C23C18/54 , B23K26/00 , C25D5/02 , B23K103/10 , B23K101/34 , B23K101/36 , B44C1/22
CPC分类号: C23F1/32 , B23K26/0006 , B23K26/352 , B23K26/355 , B23K2101/34 , B23K2101/35 , B23K2101/36 , B23K2103/10 , B44C1/227 , C23C18/54 , C23F1/02 , C25D5/02 , C25D5/06 , C25D5/48 , C25D11/18 , C25D11/24
摘要: The present invention relates to a method for preserving a mark on a metallic workpiece prior to a chemical etching process to remove a surface material from a surface of the workpiece carrying the mark, the method comprising the steps of: deepening the mark relative to the surface to form a first depth; and depositing a filling material into the first depth, wherein the filling material is adapted to be removed during the chemical process, such that a second depth is obtained at the mark after the chemical process. The present invention also relates to a method of treating a metallic workpiece to preserve a mark on the surface of the workpiece, the method comprising the step of treating at least a portion of the surface of the workpiece surrounding the mark to remove at least a surface oxide layer from the mark, the treating step being arranged such that it does not remove all of the surface material from said portion of the surface of the workpiece, but removes at least the surface oxide layer from the mark.
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公开(公告)号:US20180327908A1
公开(公告)日:2018-11-15
申请号:US15775023
申请日:2015-12-18
发明人: Lingli DUAN , Chen CHEN , Kitho TONG , Chit Yiu CHAN , Kwok Wai Dennis YEE
摘要: Provided is a cyanide-free non-electrolytic gold plating solution including a specific nitrile compound. The plating solution is sustainable and showed good bath stability and plating performance.
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公开(公告)号:US10000859B2
公开(公告)日:2018-06-19
申请号:US14768497
申请日:2014-02-18
申请人: ALUMIPLATE, INC.
发明人: Lucy Elizabeth Browning , William Charles Carlson , Jon Frederick Schulz , Gustavo Rolando Vallejo
IPC分类号: C25D5/10 , C25D11/04 , C25D17/00 , C25D3/44 , C25D5/48 , C25D11/16 , B32B15/01 , C25D11/12 , C25D17/08 , C23C18/16
CPC分类号: C25D5/10 , B32B15/016 , C23C18/1653 , C23C18/54 , C23C28/023 , C23C28/028 , C23C28/322 , C23C28/345 , C25D3/44 , C25D5/44 , C25D5/48 , C25D11/04 , C25D11/12 , C25D11/16 , C25D17/008 , C25D17/08
摘要: The described embodiments relate generally to aluminum films and methods for forming aluminum films. Methods involve providing aluminum films having increased hardness. Methods involve using higher than conventional current densities during plating of aluminum on substrates. The higher current density plating creates aluminum films with grain structures that are different from conventional plated aluminum films. In some embodiments, the average grain sizes are smaller in the hard aluminum films than conventional plated aluminum films. In some embodiments, the plated aluminum layer is anodized. In some embodiments, a multi-layered aluminum coating is formed using a combination of high current density and low current density plating. In some embodiments, a current filter is used to provide uniform plating across a part.
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公开(公告)号:US20180154436A1
公开(公告)日:2018-06-07
申请号:US15572907
申请日:2015-10-27
发明人: Hiroshi Okada
CPC分类号: B22F1/025 , B22F1/0007 , B22F1/0055 , B22F1/0059 , B22F1/0062 , B22F9/24 , B22F2301/255 , B22F2304/10 , B22F2999/00 , C08K2003/0806 , C08K2003/085 , C09D5/24 , C09D5/32 , C09D7/61 , C09D7/62 , C09D7/70 , C09D11/037 , C09D11/52 , C22C9/00 , C23C18/42 , C23C18/54 , C25C1/12 , C25C5/02 , C25D3/38 , H01B1/026 , H01B1/22 , Y02P10/236 , C22C5/06
摘要: Provided is a silver-coated copper powder which can be utilized as an electrically conductive paste and an electromagnetic wave shield. A silver-coated copper powder has a dendritic shape having a linearly grown main stem and a plurality of branches separated from the main stem, the main stem and the branches are constituted as flat plate-shaped copper particles having a cross-sectional average thickness of from 0.02 μm to 5.0 μm to be determined by scanning electron microscopic (SEM) observation gather, the surface of the copper particles is coated with silver, the average particle diameter (D50) of the silver-coated copper powder 1 is from 1.0 μm to 100 μm, and the maximum height in the vertical direction with respect to the flat plate-shaped surface of the copper particles is 1/10 or less with respect to the maximum length in the horizontal direction of the flat plate-shaped surface of the copper particles.
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公开(公告)号:US09949374B2
公开(公告)日:2018-04-17
申请号:US14760758
申请日:2014-02-04
发明人: Yohei Takemoto , Shiro Sekino , Yuta Kaihatsu , Hiromi Yamanaka
IPC分类号: B05D3/10 , H05K3/18 , C23C18/18 , C23C18/16 , C23C18/54 , C23C18/44 , C23C18/36 , H05K1/03 , H05K1/09
CPC分类号: H05K3/185 , C23C18/1639 , C23C18/1651 , C23C18/1844 , C23C18/1886 , C23C18/36 , C23C18/44 , C23C18/54 , H05K1/0306 , H05K1/092
摘要: Provided is an electroless plating method for a low temperature co-fired glass ceramic substrate, the method including: a degreasing and activation treatment step of degreasing and activating a surface of a wiring pattern formed of a silver sintered body; a catalyzing step of providing a catalyst onto the surface of the wiring pattern formed of a silver sintered body; and an electroless multi-layered coating plating treatment step. The electroless plating method further includes, between the degreasing and activation treatment step and the catalyzing step, a silver precipitation treatment step of precipitating silver on a glass component present on the surface of the wiring pattern formed of a silver sintered body after the degreasing and activation treatment step, and the catalyzing step includes providing the catalyst also to the silver precipitated in the silver precipitation treatment step.
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公开(公告)号:US20180097169A1
公开(公告)日:2018-04-05
申请号:US15669222
申请日:2017-08-04
发明人: Taisuke IWASHITA
CPC分类号: H01L35/32 , C23C18/1603 , C23C18/1605 , C23C18/1608 , C23C18/1612 , C23C18/2006 , C23C18/204 , C23C18/2086 , C23C18/22 , C23C18/54 , H01L35/34
摘要: There is provided with a method of manufacturing a resin product. The method includes preparing a resin substrate that is provided with, in a first portion on a surface of the resin substrate, a first patterned layer of a first material. The method also includes forming a second patterned layer of a second material in a second portion on the surface of the resin substrate, by irradiating the second portion with ultraviolet light and then subjecting the second portion to electroless plating.
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公开(公告)号:US09935004B2
公开(公告)日:2018-04-03
申请号:US15382945
申请日:2016-12-19
发明人: Roman Gouk , Steven Verhaverbeke
IPC分类号: H01L21/4763 , H01L21/768
CPC分类号: H01L21/76873 , C23C18/1653 , C23C18/32 , C23C18/40 , C23C18/54 , C25D3/38 , C25D3/48 , C25D5/022 , C25D7/123 , H01L21/288 , H01L21/2885 , H01L21/76855 , H01L21/76879 , H01L21/76898
摘要: A method and apparatus for processing a silicon substrate are provided. In some implementations, the method comprises providing a silicon substrate having an aperture containing an exposed silicon contact surface at a bottom of the aperture, depositing a metal seed layer on the exposed silicon contact surface and exposing the silicon substrate to an electroplating process by flowing a current through a backside of the silicon substrate to form a metal layer on the metal seed layer.
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公开(公告)号:US09799594B2
公开(公告)日:2017-10-24
申请号:US15219803
申请日:2016-07-26
申请人: FUJIFILM Corporation
发明人: Kosuke Yamashita
IPC分类号: H01L23/498 , H05K1/11 , H01L21/48 , H05K3/40 , H05K3/46 , H05K1/02 , H05K1/03 , H05K3/36 , C25D3/00 , C23C18/00 , H05K1/14
CPC分类号: H01L23/49838 , C23C18/00 , C23C18/1653 , C23C18/54 , C25D3/00 , C25D3/38 , C25D5/48 , C25D11/045 , C25D11/08 , C25D11/12 , C25D11/16 , C25D11/20 , C25F3/20 , H01L21/4857 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L23/49894 , H05K1/0298 , H05K1/0306 , H05K1/115 , H05K1/144 , H05K3/368 , H05K3/4038 , H05K3/4611 , H05K2201/042 , H05K2201/10378 , H05K2203/0315
摘要: The present invention is to provide a microstructure capable of improving the withstand voltage of an insulating substrate while securing fine conductive paths, a multilayer wiring board, a semiconductor package, and a microstructure manufacturing method. The microstructure of the present invention has an insulating substrate having a plurality of through holes, and conductive paths consisting of a conductive material containing metal filling the plurality of through holes, in which an average opening diameter of the plurality of through holes is 5 nm to 500 nm, an average value of the shortest distances connecting the through holes adjacent to each other is 10 nm to 300 nm, and a moisture content is 0.005% or less with respect to the total mass of the microstructure.
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