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公开(公告)号:US20230378017A1
公开(公告)日:2023-11-23
申请号:US17891634
申请日:2022-08-19
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ping-Yin Hsieh , Pu Wang , Li-Hui Cheng , Ying-Ching Shih , Hung-Yu Chen
IPC: H01L23/367 , H01L25/065 , H01L23/42 , H01L23/373 , H01L21/56 , H01L23/31
CPC classification number: H01L23/367 , H01L25/0652 , H01L23/42 , H01L23/3736 , H01L21/561 , H01L21/563 , H01L23/3157 , H01L2224/16145 , H01L24/16
Abstract: An embodiment is a device including a package component including an integrated circuit die and conductive connectors connected to the integrated circuit die, the conductive connectors disposed at a first side of the package component. The device also includes a metal layer on a second side of the package component, the second side being opposite the first side. The device also includes a thermal interface material on the metal layer. The device also includes a lid on the thermal interface material. The device also includes a retaining structure on sidewalls of the package component and the thermal interface material. The device also includes a package substrate connected to the conductive connectors, the lid being adhered to the package substrate.
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公开(公告)号:US20230317552A1
公开(公告)日:2023-10-05
申请号:US18328387
申请日:2023-06-02
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Hao Chen , Hung-Yu Chen , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/373 , H01L21/48 , H01L23/04 , H01L23/31 , H01L23/40
CPC classification number: H01L23/3737 , H01L21/4882 , H01L23/04 , H01L23/3128 , H01L23/4006 , H01L2023/4087
Abstract: A method of forming a semiconductor structure includes: attaching a semiconductor device to a first surface of a substrate; placing a thermal interface material (TIM) film over a first side of the semiconductor device distal from the substrate, where the TIM film is pre-formed before the placing, where after the placing, a peripheral portion of the TIM film extends laterally beyond sidewalls of the semiconductor device; and attaching a lid to the first surface of the substrate to form an enclosed space between the lid and the substrate, where after attaching the lid, the semiconductor device and the TIM film are disposed in the enclosed space, where a first side of the TIM film distal from the substrate contacts the lid.
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公开(公告)号:US20230052821A1
公开(公告)日:2023-02-16
申请号:US17980914
申请日:2022-11-04
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chien Pan , Li-Hui Cheng , Chin-Fu Kao , Szu-Wei Lu
IPC: H01L23/498 , H01L23/00 , H01L23/31 , H01L21/306 , H01L21/304 , H01L21/78 , H01L21/56 , H01L25/065
Abstract: In an embodiment, a package includes: an interposer having a first side; a first integrated circuit device attached to the first side of the interposer; a second integrated circuit device attached to the first side of the interposer; an underfill disposed beneath the first integrated circuit device and the second integrated circuit device; and an encapsulant disposed around the first integrated circuit device and the second integrated circuit device, a first portion of the encapsulant extending through the underfill, the first portion of the encapsulant physically disposed between the first integrated circuit device and the second integrated circuit device, the first portion of the encapsulant being planar with edges of the underfill and edges of the first and second integrated circuit devices.
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公开(公告)号:US20220359339A1
公开(公告)日:2022-11-10
申请号:US17381952
申请日:2021-07-21
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Ping-Yin Hsieh , Pu Wang , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/367 , H01L25/10 , H01L23/498 , H01L23/373 , H01L23/00 , H01L21/48 , H01L25/00
Abstract: A method includes placing a package, which includes a first package component, a second package component, and an encapsulant encapsulating the first package component and the second package component therein. The method further includes attaching a first thermal interface material over the first package component, attaching a second thermal interface material different from the first thermal interface material over the second package component, and attaching a heat sink over both of the first thermal interface material and the second thermal interface material.
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公开(公告)号:US20220359331A1
公开(公告)日:2022-11-10
申请号:US17869003
申请日:2022-07-20
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Chih-Chien Pan , Chin-Fu Kao , Li-Hui Cheng , Szu-Wei Lu
IPC: H01L23/31 , H01L25/065 , H01L23/498 , H01L21/48 , H01L21/56 , H01L21/768 , H01L23/00
Abstract: A method of forming a semiconductor device includes attaching a first semiconductor device to a first surface of a substrate; forming a sacrificial structure on the first surface of the substrate around the first semiconductor device, the sacrificial structure encircling a first region of the first surface of the substrate; and forming an underfill material in the first region.
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公开(公告)号:US11488843B2
公开(公告)日:2022-11-01
申请号:US17007679
申请日:2020-08-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Jing-Cheng Lin , Li-Hui Cheng , Po-Hao Tsai
IPC: H01L23/02 , H01L23/34 , H01L23/48 , H01L21/00 , H05K7/00 , H05K7/14 , H01L21/56 , H01L23/538 , H01L23/367 , H01L23/31 , H01L25/11 , H01L21/48 , H01L25/00 , H01L23/00 , H01L23/42 , H01L23/373 , H01L21/683
Abstract: A method includes forming a release film over a carrier, attaching a device over the release film through a die-attach film, encapsulating the device in an encapsulating material, performing a planarization on the encapsulating material to expose the device, detaching the device and the encapsulating material from the carrier, etching the die-attach film to expose a back surface of the device, and applying a thermal conductive material on the back surface of the device.
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公开(公告)号:US11456287B2
公开(公告)日:2022-09-27
申请号:US16846400
申请日:2020-04-12
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Hsien-Pin Hu , Chin-Fu Kao , Li-Hui Cheng , Szu-Wei Lu , Wen-Hsin Wei , Chih-Chien Pan
IPC: H01L23/053 , H01L23/10 , H01L25/16 , H01L23/16 , H01L23/498 , H01L21/56 , H01L21/48 , H01L21/683 , H01L23/538 , H01L25/065
Abstract: A package structure includes a circuit substrate, a semiconductor package, a lid structure, a passive device and a barrier structure. The semiconductor package is disposed on and electrically connected to the circuit substrate. The lid structure is disposed on the circuit substrate covering the semiconductor package. The lid structure is attached to the circuit substrate through an adhesive material. The passive device is disposed on the circuit substrate in between the semiconductor package and the lid structure. The barrier structure is separating the passive device from the lid structure and the adhesive material, and the barrier structure is in contact with the adhesive material.
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公开(公告)号:US20220157695A1
公开(公告)日:2022-05-19
申请号:US17588920
申请日:2022-01-31
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Li-Hui Cheng , Po-Hao Tsai , Jing-Cheng Lin
IPC: H01L23/48 , H01L25/00 , H01L21/56 , H01L21/768 , H01L21/683 , H01L21/3105 , H01L21/78 , H01L23/538 , H01L23/00 , H01L23/498 , H05K1/18
Abstract: Methods of packaging semiconductor devices and packaged semiconductor devices are disclosed. In some embodiments, a method of packaging a semiconductor device includes coupling through-vias to an insulating material, each of the through-vias having a first width. Dies are also coupled to the insulating material. A portion of the insulating material is removed proximate each of the through-vias. The portion of the insulating material proximate each of the through-vias removed has a second width, the second width being less than the first width.
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公开(公告)号:US11081369B2
公开(公告)日:2021-08-03
申请号:US16283851
申请日:2019-02-25
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Li-Hui Cheng , Szu-Wei Lu , Ping-Yin Hsieh , Chih-Hao Chen
Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a semiconductor die, conductive through vias, an insulating encapsulant, and a redistribution structure. The conductive through vias are electrically coupled to the semiconductor die. The insulating encapsulant laterally encapsulates the semiconductor die and the conductive through vias, wherein the insulating encapsulant has a recess ring surrounding the semiconductor die, the conductive through vias are located under the recess ring, and a vertical projection of each of the conductive through vias overlaps with a vertical projection of the recess ring. The redistribution structure is electrically connected to the semiconductor die and the conductive through vias.
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公开(公告)号:US11069673B2
公开(公告)日:2021-07-20
申请号:US16886795
申请日:2020-05-29
Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
Inventor: Li-Hui Cheng , Jing-Cheng Lin , Po-Hao Tsai
IPC: H01L25/00 , H01L21/56 , H01L25/10 , H01L21/683 , H01L23/538 , H01L23/31 , H01L21/48 , H01L23/00 , H01L21/50 , H01L23/498 , H01L21/60
Abstract: A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package has a redistribution layer, at least one die over the redistribution layer, through interlayer vias on the redistribution layer and aside the die and a molding compound encapsulating the die and the through interlayer vias disposed on the redistribution layer. The semiconductor package has connectors connected to the through interlayer vias and a protection film covering the molding compound and the die. The protection film is formed by a printing process.
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