Rotary hearth furnace for producing reduced metal and method of producing reduced metal
    62.
    发明授权
    Rotary hearth furnace for producing reduced metal and method of producing reduced metal 有权
    用于生产还原金属的旋转炉底炉和生产还原金属的方法

    公开(公告)号:US06685466B2

    公开(公告)日:2004-02-03

    申请号:US09988521

    申请日:2001-11-20

    IPC分类号: F27B916

    摘要: In a rotary hearth furnace for producing reduced metal through heating and reducing carbon containing materials composed of at least metal oxide-containing material and carbon-containing reduction material, a hearth structure is provided by which a refractory in a hearth lateral end is not damaged and carbon containing materials do not fall down to a water sealing section of the rotary hearth furnace. The upper part of a hearth lateral end 1a is covered with the lower end 2a of a side wall 2 of a hood covering the whole hearth, and a cooling means 3 is installed in the side wall lower end 2a.

    摘要翻译: 在通过加热制造还原金属的回转炉底炉中,至少含有含金属氧化物的材料和含碳还原材料的含碳材料减少的方法中,提供了一种炉床侧端部的耐火材料不被损坏的炉床结构, 含碳材料不会落到转底炉的水封部分上。炉床侧端部1a的上部被覆盖整个炉床的罩的侧壁2的下端2a覆盖,并且冷却 装置3安装在侧壁下端2a中。

    Synchronous semiconductor device, and inspection system and method for the same

    公开(公告)号:US06559669B2

    公开(公告)日:2003-05-06

    申请号:US09820715

    申请日:2001-03-30

    IPC分类号: G01R3128

    摘要: The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will reset a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit.

    Image forming apparatus comprising a plurality of developing devices
    65.
    发明授权
    Image forming apparatus comprising a plurality of developing devices 失效
    图像形成装置包括多个显影装置

    公开(公告)号:US4916490A

    公开(公告)日:1990-04-10

    申请号:US294641

    申请日:1989-01-09

    IPC分类号: G03G15/01 G03G15/08

    CPC分类号: G03G15/0896 G03G15/0126

    摘要: An image forming apparatus including at least first and second developing devices for developing latent images formed on an image bearing member. The first and second developing devices contain developers of different colors, respectively. The second developing device contains a developer of a predetermined color and is fixedly mounted in the image forming apparatus. The first developing device contains a developer of a color other than the predetermined color and is detachably mountable in the image forming apparatus. Only the first developing device is exchangeable.

    摘要翻译: 一种图像形成装置,包括至少第一和第二显影装置,用于显影形成在图像承载部件上的潜像。 第一和第二显影装置分别包含不同颜色的显影剂。 第二显影装置包含预定颜色的显影剂,并且固定地安装在图像形成装置中。 第一显影装置包含除了预定颜色之外的颜色的显影剂,并且可拆卸地安装在图像形成装置中。 只有第一个开发设备是可交换的。

    Semiconductor light emitting element

    公开(公告)号:US09761760B2

    公开(公告)日:2017-09-12

    申请号:US13638470

    申请日:2011-03-24

    IPC分类号: H01L33/38 H01L33/44 H01L33/00

    摘要: A semiconductor light emitting device in which adhesion between an insulating layer and a semiconductor layer is improved while maintaining the ability of the insulating layer to limit the direction of current flow. The semiconductor light emitting device includes a semiconductor layer, a first electrode and a second electrode arranged to interpose the semiconductor layer therebetween, an insulating layer provided to the semiconductor layer at the same side as the second electrode and opposite to the first electrodes so as to surround the periphery of the second electrode, a first metal layer covering the second electrode and the insulating layer, and a second metal layer which has a thickness smaller than the thickness of the second electrode and is provided between the semiconductor layer and the insulating layer.

    SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD FOR THE SAME
    69.
    发明申请
    SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD FOR THE SAME 失效
    同步半导体器件及其检测系统及其方法

    公开(公告)号:US20080204067A1

    公开(公告)日:2008-08-28

    申请号:US12112782

    申请日:2008-04-30

    IPC分类号: G01R31/28 G11C29/00

    摘要: The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will reset a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit.

    摘要翻译: 本发明提供了一种同步半导体装置,其适用于提高对装置的电应力的效率,检查系统及其检查方法,以便有效地执行老化压力试验。 具有访问命令输入的命令锁存电路将输出与外部时钟同步的低电平脉冲。 脉冲将通过测试模式序列电路的NAND门和公共NAND门,以输出低电平的内部预充电信号,这将使来自控制电路的字线激活信号复位。 同时,通过NAND门的内部预充电信号将被内部定时器延迟预定时间段,以通过NAND门输出低电平内部有效信号,该低电平内部有效信号将设置来自控制电路的字线激活信号。

    Synchronous semiconductor device, and inspection system and method for the same
    70.
    发明授权
    Synchronous semiconductor device, and inspection system and method for the same 失效
    同步半导体器件及其检测系统及方法相同

    公开(公告)号:US07378863B2

    公开(公告)日:2008-05-27

    申请号:US11014789

    申请日:2004-12-20

    IPC分类号: G01R31/28

    摘要: The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will reset a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit.

    摘要翻译: 本发明提供了一种同步半导体装置,其适用于提高对装置的电应力的效率,检查系统及其检查方法,以便有效地执行老化压力试验。 具有访问命令输入的命令锁存电路将输出与外部时钟同步的低电平脉冲。 脉冲将通过测试模式序列电路的NAND门和公共NAND门,以输出低电平的内部预充电信号,这将使来自控制电路的字线激活信号复位。 同时,通过NAND门的内部预充电信号将被内部定时器延迟预定时间段,以通过NAND门输出低电平内部有效信号,该低电平内部有效信号将设置来自控制电路的字线激活信号。