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    METHOD OF MAKING NANOTUBE PERMEABLE BASE TRANSISTOR
    65.
    发明申请
    METHOD OF MAKING NANOTUBE PERMEABLE BASE TRANSISTOR 失效
    制备纳米管渗透性基底晶体管的方法

    公开(公告)号：US20030236000A1

    公开(公告)日：2003-12-25

    申请号：US10174889

    申请日：2002-06-19

    申请人： Nantero, Inc.

    发明人： Bernhard Vogeli ,  Thomas Rueckes ,  Brent M. Segal

    IPC分类号： H01L021/31

    CPC分类号： H01L51/0504 ,  B82Y10/00 ,  H01L29/7722 ,  H01L51/0048 ,  Y10S438/903 ,  Y10S977/743

    摘要： A method of making a permeable base transistor (PBT) is disclosed. According to the method, a semiconductor substrate is provided, a base layer is provided on the substrate, and a semiconductor layer is grown over the base layer. The base layer includes metallic nanotubes, which may be grown or deposited on the semiconductor substrate. The nanotube base layer separates emitter and collector layers of semiconductor material.

    摘要翻译： 公开了一种制造可渗透的基极晶体管（PBT）的方法。 根据该方法，提供半导体基板，在基板上设置基底层，在基底层上生长半导体层。 基层包括可以在半导体衬底上生长或沉积的金属纳米管。 纳米管基层分离半导体材料的发射极和集电极层。

    Organic triodes with novel grid structures and method of production
    66.
    发明申请
    Organic triodes with novel grid structures and method of production 有权
    具有新型网格结构和生产方法的有机三极管

    公开(公告)号：US20030015698A1

    公开(公告)日：2003-01-23

    申请号：US10246508

    申请日：2002-09-17

    发明人： Marc Baldo ,  Peter Peumans ,  Stephen Forrest ,  Changsoon Kim

    IPC分类号： H01L035/24

    CPC分类号： H01L51/0504 ,  H01L27/28 ,  H01L51/0508

    摘要： An organic semiconductor device is provided. The device has a first electrode and a second electrode, with an organic semiconductor layer disposed between the first and second electrodes. An electrically conductive grid is disposed within the organic semiconductor layer, which has openings in which the organic semiconductor layer is present. At least one insulating layer is disposed adjacent to the electrically conductive grid, preferably such that the electrically conductive grid is completely separated from the organic semiconductor layer by the insulating layer. Methods of fabricating the device, and the electrically conductive grid in particular, are also provided. In one method, openings are formed in an electrically conductive layer with a patterned die, which is then removed. In another method, an electrically conductive layer and a first insulating layer are etched through the mask to expose portions of a first electrode. In yet another method, a patterned die is pressed into a first organic semiconductor layer to create texture in the surface of the first organic semiconductor layer, and then removed. An electrically conductive material is then deposited onto the first organic semiconductor layer from an angle to form a grid having openings as a result of the textured surface and the angular deposition. In each of the methods, insulating layers are preferably deposited or otherwise formed during the process to completely separate the electrically conductive layer from previously and subsequently deposited organic semiconductor layers.

    摘要翻译： 提供有机半导体器件。 该器件具有第一电极和第二电极，其中有机半导体层设置在第一和第二电极之间。 导电栅格设置在有机半导体层内，其具有存在有机半导体层的开口。 至少一个绝缘层邻近导电栅格设置，优选地使得导电栅格通过绝缘层与有机半导体层完全分离。 还提供了制造器件，特别是导电栅格的方法。 在一种方法中，在带有图案的模具的导电层中形成开口，然后将其去除。 在另一种方法中，通过掩模蚀刻导电层和第一绝缘层以暴露第一电极的部分。 在另一种方法中，图案化的管芯被压入第一有机半导体层以在第一有机半导体层的表面中产生纹理，然后除去。 然后将导电材料从角度沉积到第一有机半导体层上，以形成由于纹理表面和角度沉积而具有开口的栅格。 在每种方法中，优选在该工艺期间沉积或以其它方式形成绝缘层，以使导电层与先前和随后沉积的有机半导体层完全分离。

    Semiconductor memory device having MFMIS transistor and increased data storage time
    67.
    发明授权
    Semiconductor memory device having MFMIS transistor and increased data storage time 失效
    具有MFMIS晶体管的半导体存储器件和增加的数据存储时间

    公开(公告)号：US06509594B2

    公开(公告)日：2003-01-21

    申请号：US09874319

    申请日：2001-06-06

    申请人： Yoshihisa Kato ,  Yasuhiro Shimada

    发明人： Yoshihisa Kato ,  Yasuhiro Shimada

    IPC分类号： H01L31062

    CPC分类号： H01L29/516 ,  H01L27/11502 ,  H01L29/6684 ,  H01L29/78391 ,  H01L51/0504

    摘要： The semiconductor memory of this invention includes an MFMIS transistor including a field effect transistor and a ferroelectric capacitor formed above the field effect transistor. The semiconductor memory has a characteristic that a value of (&sgr;−p) is substantially not changed with time in a relational expression, V=(d/&egr;0)×(&sgr;−p), which holds among a potential difference V between an upper electrode and a lower electrode, a surface density of charge &sgr; of a ferroelectric film, polarization charge p of the ferroelectric film, a thickness d of the ferroelectric film and a dielectric constant &egr;0 of vacuum when a data is written in the MFMIS transistor and the ferroelectric film is in a polarized state.

    摘要翻译： 本发明的半导体存储器包括一个包括场效应晶体管和形成在场效应晶体管之上的铁电电容器的MFMIS晶体管。 半导体存储器具有以下关系式中的时间（sigma-p）基本上不随时间变化的特性，V =（d / epsi0）x（sigma-p）），其保持在上 电极和下电极，强电介质膜的电荷sigma的表面密度，铁电体膜的极化电荷p，强电介质膜的厚度d和当数据被写入MFMIS晶体管时的真空的介电常数εi0，以及 铁电薄膜处于极化状态。

    Transistor
    68.
    发明申请
    Transistor 失效
    晶体管

    公开(公告)号：US20020024099A1

    公开(公告)日：2002-02-28

    申请号：US09923448

    申请日：2001-08-08

    申请人： Fuji Xerox Co., Ltd.

    发明人： Hiroyuki Watanabe ,  Masaaki Shimizu ,  Chikara Manabe

    IPC分类号： H01L031/119 ,  H01L031/113 ,  H01L029/94

    CPC分类号： H01L51/0504 ,  B82Y10/00 ,  H01L51/0048 ,  H01L51/0587 ,  Y10S977/742 ,  Y10S977/842

    摘要： A transistor of nanometer size is provided, which is capable of high-speed operation and operates at room temperatures by using carbon nanotubes for semiconductor devices. The transistor uses a carbon nanotube ring having semiconductor characteristics as a semiconductor material, or a carbon nanotube ring having conductivity or semiconductor characteristics as an electrode material.

    摘要翻译： 提供纳米尺寸的晶体管，其能够通过使用用于半导体器件的碳纳米管来高速操作并在室温下操作。 晶体管使用具有半导体特性的碳纳米管环作为半导体材料，或具有导电性或半导体特性的碳纳米管环作为电极材料。