公开(公告)号：US11961752B2

公开(公告)日：2024-04-16

申请号：US17432134

申请日：2020-01-20

Applicant: Murata Machinery, Ltd.

Inventor： Ryoma Nunome ,  Akifumi Sakamoto ,  Ryota Yamazaki

IPC: H01L21/677 ,  H01L21/673

CPC classification number: H01L21/67772 ,  H01L21/67359

Abstract: A first lid opening-and-closing mechanism includes: a first holder that holds an upper lid of a first container; a first protrusion provided to protrude from the first holder toward one side direction with respect to the first holder and extends to outside of a casing; and a first raising/lowering driver that raises and lowers the first holder in a cantilevered manner with the first protrusion interposed therebetween. A second lid opening-and-closing mechanism includes: a second holder that holds an upper lid of a second container; a second protrusion provided to protrude from the second holder toward the one side direction and extends to the outside of the casing; and a second raising/lowering driver that raises and lowers the second holder in a cantilevered manner with the second protrusion interposed therebetween. The first raising/lowering driver and the second raising/lowering driver are located outside the casing in the one side direction.

公开(公告)号：US11940727B2

公开(公告)日：2024-03-26

申请号：US18126898

申请日：2023-03-27

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chih-Tsung Shih ,  Tsung-Chih Chien ,  Tsung Chuan Lee ,  Hao-Shiang Chang

IPC: G03F7/20 ,  G03F1/66 ,  H01L21/027 ,  H01L21/673 ,  G03F7/00

CPC classification number: G03F1/66 ,  H01L21/0274 ,  H01L21/67359 ,  G03F7/70741

Abstract: A reticle enclosure includes a base including a first surface, a cover including a second surface and coupled to the base with the first surface facing the second surface. The base and the cover form an internal space that includes a reticle. The reticle enclosure includes restraining mechanisms arranged in the internal space and for securing the reticle, and structures disposed adjacent the reticle in the internal space. The structures enclose the reticle at least partially, and limit passage of contaminants between the internal space and an external environment of the reticle enclosure. The structures include barriers disposed on the first and second surfaces. In other examples, a padding is installed in gaps between the barriers and the first and second surfaces. In other examples, the structures include wall structures disposed on the first and second surfaces and between the restraining mechanisms.

公开(公告)号：US20240096671A1

公开(公告)日：2024-03-21

申请号：US18370337

申请日：2023-09-19

Applicant: ENTEGRIS, INC.

Inventor： Matthew A. Fuller ,  Gary Gallagher ,  Thomas Martin Adrian

IPC: H01L21/673

CPC classification number: H01L21/67393 ,  H01L21/67383 ,  H01L21/67386

Abstract: Described are substrate containers that are useful for holding or transporting substrates such as semiconductor wafers and microelectronic devices, in a clean environment, as well as methods of using the substrate containers.

公开(公告)号：US20240087929A1

公开(公告)日：2024-03-14

申请号：US18514631

申请日：2023-11-20

Applicant: Kokusai Electric Corporation

Inventor： Tomoyuki MIYADA ,  Hajime ABIKO ,  Junichi KAWASAKI ,  Tadashi OKAZAKI

IPC: H01L21/67 ,  C23C8/10 ,  C23C16/458 ,  H01L21/66 ,  H01L21/673 ,  H01L21/677

CPC classification number: H01L21/67288 ,  C23C8/10 ,  C23C16/4587 ,  H01L21/67259 ,  H01L21/67303 ,  H01L21/67778 ,  H01L22/12

Abstract: Described herein is a technique capable of detecting a substrate state without contacting the substrate. According to one aspect of the technique, there is provided (a) loading a substrate retainer, where a plurality of substrates is placed, into a reaction tube; (b) processing the plurality of the substrates by supplying a gas into the reaction tube; (c) unloading the substrate retainer out of the reaction tube after the plurality of the substrates is processed; and (d) detecting the plurality of the substrates placed on the substrate retainer after the substrate retainer is rotated by a first angle with respect to a transferable position, wherein the plurality of the substrates is transferable to/from the substrate retainer in the transferable position.

公开(公告)号：US11929250B2

公开(公告)日：2024-03-12

申请号：US17684206

申请日：2022-03-01

Applicant: KIOXIA CORPORATION

Inventor： Katsuhiro Sato ,  Hiroshi Fujita ,  Tatsuhiko Koide

IPC: H01L21/02 ,  H01L21/67 ,  H01L21/673 ,  H10B41/00 ,  H10B43/00

CPC classification number: H01L21/0206 ,  H01L21/02068 ,  H01L21/67034 ,  H01L21/67057 ,  H01L21/673 ,  H01L21/67313 ,  H10B41/00 ,  H10B43/00

Abstract: According to one embodiment, a substrate processing apparatus includes a batch type cleaning unit, a holding unit, and a single-substrate type drying unit. The batch type cleaning unit simultaneously cleans a plurality of substrates in a batch process with a first liquid. The holding unit receives the cleaned substrates while still wet and then keeps a first surface of each of the substrates wet with the first liquid. The single-substrate type drying unit is configured to receive the substrates one by one from the holding unit and then dry off the substrates one by one.

公开(公告)号：US20240079257A1

公开(公告)日：2024-03-07

申请号：US18139875

申请日：2023-04-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Shih-Lien Linus LU ,  Cormac Michael O'CONNELL

IPC: H01L21/68 ,  B25J9/16 ,  H01L21/67 ,  H01L21/673

CPC classification number: H01L21/68 ,  B25J9/1664 ,  B25J9/1692 ,  H01L21/67265 ,  H01L21/67386 ,  H01L21/681 ,  B25J11/0095

Abstract: Disclosed is a physical unclonable function generator circuit and method. In one embodiment, a physical unclonable function (PUF) generator comprising: a plurality of PUF cells, wherein each of the plurality of PUF cells comprises a first MOS transistor and a second MOS transistor, wherein terminal S of the first MOS transistor is connected to terminal D of the second MOS transistor at a dynamic node, terminal D of the first MOS transistor is coupled to a first bus and terminal G of the first NMOS transistor is coupled to a second bus, and terminals S and G of the second NMOS transistor are coupled to ground; a plurality of dynamic flip-flop (DFF) circuits wherein each of the plurality of DFF circuits is coupled to each of the plurality of PUF cells respectively; a population count circuit coupled to the plurality of DFF circuits; and an evaluation logic circuit having an input coupled to the population count circuit and an output coupled to the plurality of DFF circuits.

公开(公告)号：US11915947B2

公开(公告)日：2024-02-27

申请号：US17644378

申请日：2021-12-15

Applicant: Tokyo Electron Limited

Inventor： Takumi Honda ,  Koji Yamashita ,  Shinji Tahara ,  Hironobu Hyakutake

IPC: H01L21/67 ,  H01L21/673 ,  H01L21/02 ,  H01L21/306

CPC classification number: H01L21/67086 ,  H01L21/02057 ,  H01L21/30604 ,  H01L21/67057 ,  H01L21/67173 ,  H01L21/67253 ,  H01L21/67313 ,  H01L21/67326

Abstract: Substrates can be suppressed from being separated from supporting grooves. A substrate processing apparatus includes a substrate holding unit and a processing tub. The substrate holding unit is configured to hold multiple substrates. The processing tub is configured to store a processing liquid therein. The substrate holding unit comprises a supporting body, an elevating device and a restriction unit. The supporting body has multiple supporting grooves and is configured to support the multiple substrates with a vertically standing posture from below in the multiple supporting grooves, respectively. The elevating device is configured to move the supporting body between a standby position above the processing tub and a processing position within the processing tub. The restriction unit is configured to be moved up and down along with the supporting body by the elevating device and configured to restrict an upward movement of the substrates with respect to the supporting body.

公开(公告)号：US11913114B2

公开(公告)日：2024-02-27

申请号：US16983142

申请日：2020-08-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Hyun Yang ,  Sang Yub Ie ,  Tae Yong Kim ,  Phil Ouk Nam

IPC: C23C16/455 ,  H01L21/67 ,  H01L21/673

CPC classification number: C23C16/45578 ,  C23C16/45546 ,  C23C16/45595 ,  H01L21/67 ,  H01L21/673

Abstract: A semiconductor manufacturing apparatus including a process chamber and a boat having a support member supporting substrates arranged in a first direction. An inner tube encloses the boat and includes a slit along a side wall. A nozzle supplies a process gas and includes a gas injection port at a position corresponding to the slit. The gas injection port includes a first inlet and first outlet. The slit includes a second inlet and second outlet. A distance to an end of the first inlet from a center line that connects a center of the first inlet and a center of the second outlet is different from the distance from the center line to an end of the first outlet and/or a distance from the center line to an end of the second inlet is different from a distance from the center line to an end of the second outlet.

公开(公告)号：US11908719B2

公开(公告)日：2024-02-20

申请号：US17883597

申请日：2022-08-08

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ching-Wen Cheng ,  Xin-Kai Huang ,  Kuei-Hsiung Cho

IPC: H01L21/673 ,  C23C16/458 ,  H01L21/02 ,  C23C16/46

CPC classification number: H01L21/67309 ,  C23C16/4583 ,  C23C16/46 ,  H01L21/0217 ,  H01L21/02271

Abstract: In an embodiment, a system includes: a base; and a rod set comprising multiple rods connected to the base, wherein each rod of the rod set comprises multiple fingers disposed in a vertically-stacked relationship to each other and separated respectively from each other by respective slots, wherein each slot is configured to receive a bevel of a wafer, and wherein each of the multiple fingers comprises a rounded end at a furthest extension.

公开(公告)号：US11901213B2

公开(公告)日：2024-02-13

申请号：US17521952

申请日：2021-11-09

Applicant: Chroma Ate Inc.

Inventor： Chien-Ming Chen ,  Chin-Yi Ouyang

IPC: H01L21/683 ,  H01L21/677 ,  H01L21/67 ,  H01L21/673

CPC classification number: H01L21/6838 ,  H01L21/673 ,  H01L21/67144 ,  H01L21/67259 ,  H01L21/67775

Abstract: The present invention relates to a chip transfer device capable of floatingly positioning a chip and a method for floatingly positioning a chip. When a chip is placed in a chip socket, a control unit controls an air pressure switching valve to allow at least one vent hole to be communicated with a positive air pressure source. An air flow from the positive air pressure source blows a lower surface of the chip through the vent hole, so that the at least one chip is air-floated. Accordingly, when the chip socket is communicated with the positive air pressure source, the air flow blows the lower surface of the chip in the chip socket through the vent hole, so that the chip is air-floated in the chip socket to reduce the error displacement of the chip offset.