公开(公告)号：US20140055055A1

公开(公告)日：2014-02-27

申请号：US13836423

申请日：2013-03-15

Applicant: CIRRUS LOGIC, INC.

Inventor： John L. Melanson ,  Eric J. King

IPC: H02M3/335 ,  H05B33/08

CPC classification number: H02M3/335 ,  H05B33/0809 ,  H05B33/0815

Abstract: An electronic system includes a controller that actively controls a rate of charging and discharging of an energy storage capacitor to maintain compatibility with a dimmer. The controller actively controls charging of a capacitor circuit in a switching power converter to a first voltage level across the capacitor circuit. The controller further allows the capacitor to discharge to obtain a second voltage level across the capacitor circuit. The second voltage level is sufficient to draw a current through a phase-cut dimmer to prevent the dimmer from prematurely resetting. The first voltage is sufficient to allow the capacitor to discharge to the second voltage level during each cycle of the line voltage.

Abstract translation: 电子系统包括控制器，其主动地控制储能电容器的充电和放电速率以保持与调光器的兼容性。 控制器主动控制开关功率转换器中的电容器电路对电容器电路两端的第一电压电平的充电。 控制器还允许电容器放电以在电容器电路两端获得第二电压电平。 第二电压电平足以通过相位切割调光器画出电流，以防止调光器过早复位。 第一电压足以允许电容器在线路电压的每个周期期间放电到第二电压电平。

公开(公告)号：US20140028095A1

公开(公告)日：2014-01-30

申请号：US13829231

申请日：2013-03-14

Applicant: CIRRUS LOGIC, INC.

Inventor： Siddharth Maru ,  Zhaohui He ,  Mohit Sood ,  Prashanth Drakshapalli ,  Rahul Singh

IPC: H02M3/335

CPC classification number: H02M3/33523 ,  H02M3/335 ,  H03K17/145 ,  H05B33/0815 ,  H05B33/0848 ,  H05B33/0884 ,  Y02B20/341 ,  Y10T307/406 ,  Y10T307/832

Abstract: An electronic system and method include a controller to operate in a start-up mode to accelerate driving a load to an operating voltage and then operates in a post-start-up mode. A start-up condition occurs when the controller detects that a load voltage is below a predetermined voltage threshold level. The predetermined voltage threshold level is set so that the controller will boost the voltage to an operating value of a load voltage at a faster rate than during normal, steady-state operation. The controller causes a switching power converter to provide charge to the load at a rate in accordance with a start-up mode until reaching an energy-indicating threshold. When the energy-indicating threshold has been reached, the controller causes the switching power converter to (i) decrease the amount of charge provided to the load relative to the charge provided during the start-up mode and (ii) operate in a distinct post-start-up-mode.

Abstract translation: 电子系统和方法包括控制器，其以启动模式操作以加速将负载驱动到工作电压，然后在启动后模式下操作。 当控制器检测到负载电压低于预定电压阈值电平时，发生启动条件。 设定预定的电压阈值电平，使得控制器将以比在正常的稳态操作期间更快的速率将电压升高到负载电压的操作值。 控制器使得开关功率转换器以按照启动模式的速率向负载提供电荷，直到达到能量指示阈值。 当达到能量指示阈值时，控制器使开关功率转换器（i）减少提供给负载的相对于启动模式期间提供的电荷的电荷量，以及（ii）在不同的位置操作 - 启动模式。

公开(公告)号：US20140009078A1

公开(公告)日：2014-01-09

申请号：US13798926

申请日：2013-03-13

Applicant: CIRRUS LOGIC, INC.

Inventor： Yanhui Xie ,  Eric Jerome King ,  John L. Melanson ,  Michael A. Kost

IPC: H05B37/02

CPC classification number: H05B37/02 ,  H05B33/0803 ,  H05B33/0809 ,  H05B33/0815 ,  H05B33/0845 ,  Y02B20/383

Abstract: In accordance with these and other embodiments of the present disclosure, a system and method for providing compatibility between a load and a secondary winding of an electronic transformer driven by a trailing-edge dimmer may include predicting based on an electronic transformer secondary signal an estimated occurrence of a high-resistance state of the trailing-edge dimmer, wherein the high-resistance state occurs when the trailing-edge dimmer begins phase-cutting an alternating current voltage signal and operating the load in a high-current mode for a period of time immediately prior to the estimated occurrence of the high-resistance state.

Abstract translation: 根据本公开的这些和其他实施例，用于提供由后沿调光器驱动的电子变压器的负载和次级绕组之间的兼容性的系统和方法可以包括基于电子变压器次级信号预测估计出现 的后缘调光器的高电阻状态，其中当后沿调光器开始相位切割交流电压信号并且以高电流模式操作负载一段时间时，发生高电阻状态 紧接在估计出现高电阻状态之前。

公开(公告)号：US20130301846A1

公开(公告)日：2013-11-14

申请号：US13784018

申请日：2013-03-04

Applicant: CIRRUS LOGIC, INC.

Inventor： Jeffrey Alderson ,  Jon D. Hendrix ,  Dayong Zhou

IPC: H04R3/00

CPC classification number: H04R3/002 ,  G10K11/178 ,  G10K2210/108 ,  G10K2210/3012 ,  G10K2210/30231 ,  G10K2210/3025 ,  G10K2210/3028 ,  G10K2210/30391 ,  G10K2210/3226 ,  G10K2210/503 ,  H04R1/1083 ,  H04R3/00

Abstract: A personal audio device, such as a wireless telephone, includes noise canceling circuit that adaptively generates an anti-noise signal from a reference microphone signal and injects the anti-noise signal into the speaker or other transducer output to cause cancellation of ambient audio sounds. An error microphone may also be provided proximate the speaker to measure the output of the transducer in order to control the adaptation of the anti-noise signal and to estimate an electro-acoustical path from the noise canceling circuit through the transducer. A processing circuit that performs the adaptive noise canceling (ANC) function also detects frequency-dependent characteristics in and/or direction of the ambient sounds and alters adaptation of the noise canceling circuit in response to the detection.

Abstract translation: 诸如无线电话的个人音频设备包括噪声消除电路，其自适应地从参考麦克风信号产生抗噪声信号，并将抗噪声信号注入到扬声器或其它换能器输出中以引起环境音频声音的消除。 还可以在扬声器附近提供误差麦克风以测量换能器的输出，以便控制抗噪声信号的适应性并且估计通过换能器的噪声消除电路的电声路径。 执行自适应噪声消除（ANC）功能的处理电路还检测环境声音和/或方向上的频率相关特性，并且响应于检测改变噪声消除电路的适应。

公开(公告)号：US20130197839A1

公开(公告)日：2013-08-01

申请号：US13739909

申请日：2013-01-11

Applicant: CIRRUS LOGIC, INC.

Inventor： Bala Vishnu Shankar Rao ,  Roderick D. Holley, II

IPC: G01R25/00

CPC classification number: G01R25/00 ,  G01R29/18

Abstract: A system and method utilize multiple, asynchronous, voltage isolated integrated power data circuits (IPDCs) to respectively determine one or more power parameters of a multi-phase power distribution system. In at least one embodiment, the power parameters represent differences between voltage phases of a multi-phase power distribution system. In at least one embodiment, the IPDCs each sense a voltage or current from a single phase of a three-phase power distribution system. Additionally, the IPDCs are electrically isolated from each other and, thus, in at least one embodiment, can utilize voltage divider or shunt resistor sensing without being subject to high voltages representative of the difference between voltage phases. Additionally, in at least one embodiment, each of the IPDCs utilizes a separate clock signal to determine phase sequence and phase angle deltas of one or more three phase voltages of the three-phase power distribution system.

Abstract translation: 一种系统和方法利用多个异步电压隔离集成电力数据电路（IPDC）来分别确定多相配电系统的一个或多个功率参数。 在至少一个实施例中，功率参数表示多相配电系统的电压相位之间的差异。 在至少一个实施例中，IPDC各自感测来自三相配电系统的单相的电压或电流。 此外，IPDC彼此电隔离，并且因此在至少一个实施例中可以利用分压器或分流电阻器感测，而不受代表电压相位之间的差异的高电压。 另外，在至少一个实施例中，每个IPDC利用单独的时钟信号来确定三相配电系统的一个或多个三相电压的相序和相位角增益。

公开(公告)号：US20130162307A1

公开(公告)日：2013-06-27

申请号：US13692636

申请日：2012-12-03

Applicant: Cirrus Logic, Inc.

Inventor： Anindya Bhattacharya ,  John Melanson

IPC: H03K5/12

CPC classification number: B41J2/04541 ,  B41J2/04548 ,  B41J2/0455 ,  B41J2/04581 ,  H03K4/063 ,  H03K5/12

Abstract: A capacitive load drive circuit may comprise a high current drive amplifier configured to be coupled to a capacitive load during a high current ramp up of the voltage across the capacitive load to a cut off voltage; a low current drive amplifier configured to be connected to the capacitive load during a low current ramp up of the voltage across the capacitive load, from the cut off voltage to a maximum voltage across the capacitive load; and the high current drive amplifier configured to be connected to the capacitive load during a high current ramp down of the voltage across the capacitive load. The low current drive amplifier may be connected to the capacitive load during a period of steady state of the voltage across the capacitive load, intermediate the low current ramp up and the high current ramp down.

Abstract translation: 容性负载驱动电路可以包括高电流驱动放大器，其被配置为在跨过容性负载的电压的高电流斜坡上升到截止电压时耦合到电容性负载; 低电流驱动放大器被配置为在跨过容性负载的电压的低电流斜升期间从截止电压到跨过容性负载的最大电压连接到电容性负载; 以及高电流驱动放大器，被配置为在跨过容性负载的电压的高电流斜降期间连接到电容性负载。 在电容负载两端的电压稳定期间，低电流驱动放大器可以连接到电容性负载，低电平斜坡上升和高电流斜坡下降。

公开(公告)号：US20040210801A1

公开(公告)日：2004-10-21

申请号：US10417443

申请日：2003-04-16

Applicant: Cirrus Logic, Inc.

Inventor： Ammisetti V. Prasad ,  Karl Thompson ,  John Laurence Melanson ,  Shyam Somayajula

IPC: G11B005/00 ,  G06K005/04 ,  G11B020/20

CPC classification number: G11C27/024

Abstract: A sample and hold circuit including a sampling capacitor for storing a sample of an input signal, an output stage for outputting the sample stored on the sampling capacitor; and input circuitry for sampling the input signal and storing the sample on the sampling capacitor. The input circuitry includes an autozeroing input buffer which selectively samples the input signal during a first operating phase and holds a sample of the input signal during a second operating phase. The autozeroing input buffer cancels any offset error. The input circuitry also includes switching circuitry for selectively coupling the sampling capacitor with an input of the sample and hold circuitry during the second operating phase and to an output of the autozeroing input buffer during the first operating phase.

Abstract translation: 一种采样保持电路，包括用于存储输入信号的采样的采样电容器，用于输出存储在采样电容器上的样本的输出级; 以及用于对输入信号进行采样并将采样存储在采样电容器上的输入电路。 输入电路包括自动调零输入缓冲器，其在第一操作阶段期间选​​择性地采样输入信号，并且在第二操作阶段期间保持输入信号的采样。 自动归零输入缓冲器取消任何偏移误差。 输入电路还包括用于在第二操作阶段期间将采样电容器与采样和保持电路的输入有选择地耦合的开关电路，以及在第一操作阶段期间自动调零输入缓冲器的输出。

公开(公告)号：US20040135608A1

公开(公告)日：2004-07-15

申请号：US10200824

申请日：2002-07-22

Applicant: Cirrus Logic, Inc.

Inventor： Sanjay Pillay ,  Khoi Mai ,  Luo Zheng ,  Dimitri Pantelakis

IPC: H03K003/017

CPC classification number: H03K5/1565

Abstract: A signal generator generates an output signal with a programmable duty cycle and includes a first buffer which generates in response to an input signal an intermediate signal having a selected edge with a voltage slope selected to vary a length of a selected phase of the output signal. A second buffer having a selected input voltage threshold generates the output signal in response to the intermediate signal.

Abstract translation: 信号发生器产生具有可编程占空比的输出信号，并且包括第一缓冲器，其响应于输入信号产生具有选择的边沿的中间信号，所述边沿具有选择的电压斜率以改变输出信号的选定相位的长度。 具有选择的输入电压阈值的第二缓冲器响应于中间信号产生输出信号。

公开(公告)号：US20030227401A1

公开(公告)日：2003-12-11

申请号：US10162324

申请日：2002-06-04

Applicant: Cirrus Logic, Inc.

Inventor： YuQing Yang ,  John Laurence Melanson

IPC: H03M003/00

CPC classification number: H03M3/368 ,  H03M3/424 ,  H03M3/452

Abstract: An integrator stage for use in a delta sigma modulator includes an operational amplifier, an integration capacitor coupling an output of the operational amplifier and a summing node at an input of the operational amplifier, and a feedback path. The feedback path includes first and second capacitors having first plates coupled electrically in common at a common plate node and switching circuitry for sampling selected reference voltages onto second plates of the capacitors during a sampling phase. The integrator stage further includes a switch for selectively coupling the common plate node and the summing node during an integration phase.

Abstract translation: 用于Δ-Σ调制器的积分器级包括运算放大器，耦合运算放大器的输出的积分电容器和运算放大器输入端的求和节点和反馈路径。 反馈路径包括第一和第二电容器，该第一和第二电容器具有在公共板节点处共同电耦合的第一板和用于在采样阶段期间将选定的参考电压采样到电容器的第二板上的开关电路。 积分器级还包括用于在积分阶段期间选​​择性地耦合公共板节点和求和节点的开关。

公开(公告)号：US10785568B2

公开(公告)日：2020-09-22

申请号：US14467969

申请日：2014-08-25

Applicant: Cirrus Logic, Inc.

Inventor： Tejasvi Das ,  Ku He ,  John L. Melanson

IPC: H04R3/02 ,  H03M1/70 ,  H03G3/30 ,  H03G3/00

Abstract: In accordance with embodiments of the present disclosure, an apparatus for providing an output signal to an audio transducer may include a control circuit. The control circuit may be configured to predict, based on a magnitude of a signal indicative of the output signal, an occurrence of an event for changing a selectable digital gain and a selectable analog gain and an audio signal path, and responsive to predicting the occurrence of the event, change, at an approximate time in which a zero crossing of the signal indicative of the output signal occurs, the selectable digital gain and the selectable analog gain.