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211 条记录 (耗时 0.02 秒)

    Pulse output circuit, shift register and electronic equipment
    72.
    发明申请
    Pulse output circuit, shift register and electronic equipment 有权
    脉冲输出电路，移位寄存器和电子设备

    公开(公告)号：US20050062515A1

    公开(公告)日：2005-03-24

    申请号：US10958568

    申请日：2004-10-06

    申请人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

    发明人： Shou Nagao ,  Yoshifumi Tanada ,  Yutaka Shionoiri ,  Hiroyuki Miyake

    IPC分类号： G02F1/1345 ,  G02F1/133 ,  G02F1/1368 ,  G06F1/04 ,  G09G3/20 ,  G09G3/36 ,  G11C19/00 ,  G11C19/28 ,  H01L51/50 ,  H03K3/013 ,  H03K3/353 ,  H03K17/00 ,  H03K17/693 ,  H03K19/0175 ,  H03L5/00 ,  H05B33/14

    CPC分类号： G11C19/28 ,  G09G3/3688 ,  G09G2310/0275 ,  G11C19/00

    摘要： A driver circuit of a display device, which includes TFTs of a single conductivity type and outputs an output signal with normal amplitude. A pulse is inputted to TFTs 101 and 104 to turn ON the TFTs and a potential of a node α is raised. When the potential of the node α reaches (VDD−VthN), the node α becomes in a floating state. Accordingly, a TFT 105 is turned ON and a potential of an output node is raised as a clock signal becomes High level. On the other hand, a potential of a gate electrode of the TFT 105 is further raised due to an operation of a capacitance means 107 as the potential of the output node is raised, so that the potential of the gate electrode of the TFT 105 becomes higher than (VDD+VthN). Thus, the potential of the output node is raised to VDD without causing a voltage drop due to a threshold voltage of the TFT 105. An output at the subsequent stage is then inputted to a TFT 103 to turn the TFT 103 ON, while the potential of the node α of TFTs 102 and 106 is dropped to turn the TFT 105 OFF. As a result, the potential of the output node becomes Low level.

    摘要翻译： 一种显示装置的驱动电路，其包括单导电类型的TFT并输出具有正常振幅的输出信号。 一个脉冲被输入到TFT101和104，使TFT导通，并且提高节点α的电位。 当节点α的电位达到（VDD-VthN）时，节点α变为浮动状态。 因此，随着时钟信号变为高电平，TFT 105导通，输出节点的电位升高。 另一方面，随着输出节点的电位升高，由于电容装置107的操作，TFT 105的栅电极的电位进一步上升，使得TFT 105的栅电极的电位变为 高于（VDD + VthN）。 因此，输出节点的电位升高到VDD，而不会由于TFT 105的阈值电压引起电压降。然后，后级的输出被输入到TFT103，使TFT103导通，同时电位 的TFT102和106的节点α的下降以使TFT 105关闭。 结果，输出节点的电位变为低电平。

    Electronic device and method of driving the same
    73.
    发明授权
    Electronic device and method of driving the same 失效
    电子装置及其驱动方法

    公开(公告)号：US06847341B2

    公开(公告)日：2005-01-25

    申请号：US09836719

    申请日：2001-04-17

    申请人： Hajime Kimura ,  Yoshifumi Tanada

    发明人： Hajime Kimura ,  Yoshifumi Tanada

    IPC分类号： G09G3/20 ,  G09G3/32 ,  G08G3/30

    CPC分类号： G09G3/3258 ,  G09G3/2018 ,  G09G3/2022 ,  G09G3/3266 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2300/0876 ,  G09G2310/0262 ,  G09G2310/061 ,  G09G2310/08 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3276 ,  H01L51/525 ,  H01L2227/323

    摘要： To provide a novel driving method for driving an electronic device by using digital gray scale and time gray scale in combination, which secures high duty ratio, which can display an image normally even when a sustain period is shorter than an address period, and which is hardly affected by dulled signal waveform. In a sub-frame period (102) where a sustain period is shorter than an address period, a clear period (105) is squeezed in between completion of a sustain period (104) and start of an address period of the subsequent sub-frame period. The length of the sustain period (104) thus can be set without being limited by the length of an address period (103). This non-display period is provided by changing the electric potential of a storage capacitor line. Therefore, unlike the case where the non-display period is provided by changing the electric potential of a cathode wiring, the present invention is hardly affected by dulled signal waveform.

    摘要翻译： 为了提供一种组合使用数字灰度和时间灰度来驱动电子设备的新型驱动方法，确保了高占空比，即使在维持周期比寻址周期短的情况下也能正常地显示图像，并且其是 几乎不受钝化信号波形的影响。 在维持周期比寻址周期短的子帧周期（102）中，在维持周期（104）的完成和后续子帧的寻址周期的开始之间，清除周期（105） 期。 因此可以设置维持周期（104）的长度，而不受地址周期长度的限制（103）。 通过改变存储电容线的电位来提供该非显示周期。 因此，与通过改变阴极配线的电位来提供非显示时段的情况不同，本发明几乎不受钝化信号波形的影响。

    Semiconductor device and method for manufacturing the same
    74.
    发明授权
    Semiconductor device and method for manufacturing the same 有权
    半导体装置及其制造方法

    公开(公告)号：US06828584B2

    公开(公告)日：2004-12-07

    申请号：US10151005

    申请日：2002-05-17

    申请人： Tatsuya Arao ,  Yoshifumi Tanada ,  Hiroshi Shibata

    发明人： Tatsuya Arao ,  Yoshifumi Tanada ,  Hiroshi Shibata

    IPC分类号： H01L2904

    CPC分类号： G02F1/136213 ,  G02F1/136209 ,  G02F2201/40 ,  H01L27/1255 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/78645

    摘要： It is a problem to realize, by a reduced number of processes than that of the conventional, a reliable active-matrix liquid crystal display device having a high opening ratio for high-definition display. The present invention is characterized by: forming a gate electrode and source and drain interconnections in the same process, forming a first insulating film covering the interconnections, forming an upper light-shielding film on the first insulating film, forming a second insulating film on the upper light-shielding film, partially etching the first and second insulating films to form a contact hole reaching the drain interconnection, and forming a pixel electrode on the second insulating film to connect to the drain interconnection. Meanwhile, a holding capacitance is formed by the upper light-shielding film, the second insulating film and the pixel electrode.

    摘要翻译： 通过减少数量的处理，与用于高清晰度显示的高开放率的可靠的有源矩阵液晶显示装置相比，实现了一个问题。 本发明的特征在于：在相同的工艺中形成栅电极和源漏互连，形成覆盖互连的第一绝缘膜，在第一绝缘膜上形成上光屏蔽膜，在第一绝缘膜上形成第二绝缘膜 上部遮光膜，部分地蚀刻第一和第二绝缘膜以形成到达漏极互连的接触孔，并且在第二绝缘膜上形成像素电极以连接到漏极互连。 同时，由上部遮光膜，第二绝缘膜和像素电极形成保持电容。

    Semiconductor device and display device
    76.
    发明授权
    Semiconductor device and display device 有权
    半导体器件和显示器件

    公开(公告)号：US09349750B2

    公开(公告)日：2016-05-24

    申请号：US14077390

    申请日：2013-11-12

    申请人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

    发明人： Hiroyuki Miyake ,  Shunpei Yamazaki ,  Yoshifumi Tanada ,  Manabu Sato ,  Toshinari Sasaki ,  Kenichi Okazaki ,  Junichi Koezuka ,  Takuya Matsuo ,  Hiroshi Matsukizono ,  Yosuke Kanzaki ,  Shigeyasu Mori

    IPC分类号： H01L27/12 ,  H01L29/786

    CPC分类号： H01L27/1225 ,  H01L27/124 ,  H01L29/78648

    摘要： A semiconductor device includes: a transistor including a gate electrode, a gate insulating film over the gate electrode, a semiconductor layer over the gate insulating film, and a source electrode and a drain electrode over the semiconductor layer; a first insulating film comprising an inorganic material over the transistor; a second insulating film comprising an organic material over the first insulating film; a first conductive film over the second insulating film and in a region overlapping with the semiconductor layer; a third insulating film comprising an inorganic material over the first conductive film; and a second conductive film over the third insulating film and in a region overlapping with the first conductive film. The absolute value of a first potential applied to the first conductive film is greater than the absolute value of a second potential applied to the second conductive film.

    摘要翻译： 半导体器件包括：晶体管，包括栅极电极，栅极上的栅极绝缘膜，栅极绝缘膜上的半导体层，以及半导体层上的源极和漏极; 包括晶体管上的无机材料的第一绝缘膜; 包括在所述第一绝缘膜上的有机材料的第二绝缘膜; 在所述第二绝缘膜上并且在与所述半导体层重叠的区域中的第一导电膜; 在所述第一导电膜上包括无机材料的第三绝缘膜; 以及在所述第三绝缘膜上并且在与所述第一导电膜重叠的区域中的第二导电膜。 施加到第一导电膜的第一电位的绝对值大于施加到第二导电膜的第二电位的绝对值。

    Semiconductor device
    77.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US09208710B2

    公开(公告)日：2015-12-08

    申请号：US13017065

    申请日：2011-01-31

    申请人： Ryota Fukumoto ,  Mitsuaki Osame ,  Hiroyuki Miyake ,  Yoshifumi Tanada ,  Seiko Amano

    发明人： Ryota Fukumoto ,  Mitsuaki Osame ,  Hiroyuki Miyake ,  Yoshifumi Tanada ,  Seiko Amano

    IPC分类号： G09G3/20 ,  G02F1/1345 ,  G09G3/32 ,  H01L27/12

    CPC分类号： G09G3/20 ,  G02F1/1345 ,  G09G3/3225 ,  G09G2300/0426 ,  G09G2310/0275 ,  G09G2330/02 ,  H01L27/12

    摘要： The present invention provides a semiconductor device in which a power line is not affected by noise due to a voltage drop caused by instantaneous high-current consumption in the buffer portion and that has no possibility that a logic portion malfunctions. In a case where the same potential is supplied to a logic portion and a buffer portion, by a method in which separate FPC terminals are used for the logic portion and the buffer portion, or by a method in which the FPC terminal is shared but a power line is branched for the logic portion and the buffer portion at a point close to the FPC terminal, a problem that the logic portion is affected by noise generated by a voltage drop of the power line due to instantaneous high-current consumption in the buffer portion can be prevented.

    摘要翻译： 本发明提供一种半导体器件，其中电源线由于由缓冲器部分中的瞬时大电流消耗引起的电压降而不受噪声影响，并且不可能使逻辑部分发生故障。 在将逻辑部分和缓冲部分使用单独的FPC终端的方法或通过共享FPC终端的方法而将逻辑部分和缓冲部分提供相同的电位的情况下， 电源线在逻辑部分和缓冲部分分配在靠近FPC终端的点处，由于缓冲器中的瞬时大电流消耗，逻辑部分受到电力线的电压降产生的噪声的影响 可以防止部分。

    Display device and driving method thereof
    78.
    发明授权
    Display device and driving method thereof 有权
    显示装置及其驱动方法

    公开(公告)号：US09035855B2

    公开(公告)日：2015-05-19

    申请号：US10885808

    申请日：2004-07-07

    申请人： Yoshifumi Tanada

    发明人： Yoshifumi Tanada

    IPC分类号： G09G3/32 ,  G09G3/30

    CPC分类号： G09G3/30 ,  G09G2300/0809 ,  G09G2320/0233

    摘要： In an active matrix display device, luminance distribution due to a voltage drop in a pixel portion is reduced, thereby obtaining a uniform display. In a display device having multiple current supply paths provided around the pixel portion, a current is supplied to the pixel portion using a current supply path selected among the multiple current supply paths, and the selected current supply path is switched with the passage of time to average the voltage distribution with time.

    摘要翻译： 在有源矩阵显示装置中，由于像素部分中的电压降引起的亮度分布减小，从而获得均匀的显示。 在具有设置在像素部周围的多个电流供给路径的显示装置中，使用从多个电流供给路径中选择的电流供给路径向像素部供给电流，并且将所选择的电流供给路径随时间切换到 平均随时间的电压分布。

    Semiconductor device comprising photodiode and transistor circuit
    79.
    发明授权
    Semiconductor device comprising photodiode and transistor circuit 有权
    包括光电二极管和晶体管电路的半导体

    公开(公告)号：US08779348B2

    公开(公告)日：2014-07-15

    申请号：US12407108

    申请日：2009-03-19

    申请人： Yoshifumi Tanada ,  Hajime Kimura

    发明人： Yoshifumi Tanada ,  Hajime Kimura

    IPC分类号： H01L31/00

    CPC分类号： H01L31/101 ,  G01J1/44 ,  H01L27/12 ,  H01L27/1214

    摘要： Objects are to suppress reduction in current output from a photoelectric conversion device and to prevent ESD from occurring in the photoelectric conversion device without greatly increasing the number of steps for manufacturing the photoelectric conversion device. The photoelectric conversion device includes a photodiode generating current by light irradiation; an amplifier circuit including at least one MOS transistor for amplifying the current; and at least one diode which is connected in series with the photodiode in a path of the current generated in the photodiode or a path of the current amplified by at least one MOS transistor so that a bias direction of the diode is opposite to that of the photodiode. Each of the photodiode and the diode includes a stack of a plurality of semiconductor films.

    摘要翻译： 目的是抑制光电转换装置的电流输出的降低，防止光电转换装置中的ESD发生，而不会大幅度增加制造光电转换装置的步骤数。 光电转换装置包括通过光照射产生电流的光电二极管; 放大器电路，包括用于放大电流的至少一个MOS晶体管; 以及至少一个二极管，其在光电二极管中产生的电流的路径中与光电二极管串联连接，或者由至少一个MOS晶体管放大的电流的路径使得二极管的偏置方向与 光电二极管 光电二极管和二极管中的每一个包括多个半导体膜的堆叠。

    Semiconductor device
    80.
    发明授权
    Semiconductor device 有权
    半导体器件

    公开(公告)号：US08624258B2

    公开(公告)日：2014-01-07

    申请号：US13223582

    申请日：2011-09-01

    申请人： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Yoshifumi Tanada ,  Mitsuaki Osame ,  Aya Anzai ,  Ryota Fukumoto

    发明人： Shunpei Yamazaki ,  Masahiko Hayakawa ,  Yoshifumi Tanada ,  Mitsuaki Osame ,  Aya Anzai ,  Ryota Fukumoto

    IPC分类号： H01L27/14 ,  G09G3/30

    CPC分类号： H01L27/3262 ,  G09G3/3233 ,  G09G2310/0251 ,  G09G2330/04 ,  H01L27/0248 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/1222 ,  H01L27/1255 ,  H01L27/3248 ,  H01L27/3265 ,  H01L27/3276 ,  H01L29/78675

    摘要： Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.

    摘要翻译： 半导体元件由于静电放电损坏而劣化或被破坏。 本发明提供一种其中在每个像素中形成保护装置的半导体器件。 保护装置设置有从由电阻元件，电容器元件和整流元件组成的组中选择的一个或多个元件。 通过在发光元件的像素电极和源电极之间设置保护装置，可以减轻由于在像素电极中积聚的电荷导致的晶体管的源电极或漏电极的电位的突然变化，或 晶体管的漏极。 因此防止了由于静电放电损坏导致的半导体元件的劣化或破坏。