-
公开(公告)号:US20080182412A1
公开(公告)日:2008-07-31
申请号:US11698190
申请日:2007-01-26
IPC分类号: C23F1/00 , H01L21/306 , H01L21/302
CPC分类号: H01L21/0209 , H01J37/32366 , H01J37/32568 , H01J2237/335 , H01L21/67069
摘要: A device for cleaning a bevel edge of a semiconductor substrate. The device includes: a lower support having a cylindrical top portion; a lower plasma-exclusion-zone (PEZ) ring surrounding the outer edge of the top portion and adapted to support the substrate; an upper dielectric component opposing the lower support and having a cylindrical bottom portion; an upper PEZ ring surrounding the outer edge of the bottom portion and opposing the lower PEZ ring; and at least one radiofrequency (RF) power source operative to energize process gas into plasma in an annular space defined by the upper and lower PEZ rings, wherein the annular space encloses the bevel edge.
摘要翻译: 一种用于清洁半导体衬底的斜边缘的装置。 该装置包括:具有圆柱形顶部的下支撑件; 围绕顶部部分的外边缘并适于支撑基底的较低等离子体排除区(PEZ)环; 与所述下支撑件相对并且具有圆柱形底部部分的上介电部件; 围绕底部的外边缘并与下部PEZ环相对的上部PEZ环; 以及至少一个射频(RF)电源,其用于在由所述上和下PEZ环限定的环形空间中将工艺气体激发成等离子体,其中所述环形空间包围所述斜面边缘。
-
公开(公告)号:US07140374B2
公开(公告)日:2006-11-28
申请号:US10802460
申请日:2004-03-16
CPC分类号: B08B7/00 , B08B7/0035 , B08B7/0071 , H01J37/3244 , H01J37/32522 , H01J37/32862 , H01J2237/022 , H01L21/3065 , H01L21/32115 , H01L21/32136 , H01L21/67034 , H01L21/67051 , H01L21/67069 , H01L21/6708 , H01L21/7684 , Y10S438/905
摘要: A method for cleaning a processing chamber that includes heating an inner surface of the processing chamber to a first temperature. The first temperature can be sufficient to cause a first species to become volatile. The first species can be one of several species deposited on the inner surface. A cleaning chemistry is injected into the processing chamber. The cleaning chemistry can be reactive with a second one of the species to convert the second species to the first species. The volatilized first species can also be output from the processing chamber. A system for cleaning the process chamber is also described.
-
73.
公开(公告)号:US07129167B1
公开(公告)日:2006-10-31
申请号:US10879598
申请日:2004-06-28
IPC分类号: H01L21/44
CPC分类号: H01L21/7684 , H01L21/02074 , H01L21/32115 , H01L21/32136 , H01L21/67046 , H01L21/67051
摘要: A method of cleaning a substrate includes receiving a substrate and applying a stress-free cleaning process to the top surface of the substrate. The substrate includes a top surface that is substantially free of device dependent planarity nonuniformities and device independent planarity nonuniformities. The top surface also includes a first material and a device structure formed in the first material, the device structure being formed from a second material. The device structure has a device surface exposed. The device surface has a first surface roughness. A system for stress-free cleaning a substrate is also described.
摘要翻译: 清洁基板的方法包括接收基板并向基板的顶表面施加无应力清洁处理。 衬底包括基本上没有与器件相关的平面不均匀性和器件独立平面度不均匀性的顶表面。 顶表面还包括形成在第一材料中的第一材料和器件结构,该器件结构由第二材料形成。 器件结构具有暴露的器件表面。 器件表面具有第一表面粗糙度。 还描述了一种用于无应力清洁基底的系统。
-
公开(公告)号:US06669858B2
公开(公告)日:2003-12-30
申请号:US10011369
申请日:2001-11-05
申请人: Claes H. Bjorkman , Min Melissa Yu , Hongquing Shan , David W. Cheung , Wai-Fan Yau , Kuowei Liu , Nasreen Gazala Chapra , Gerald Yin , Farhad K. Moghadam , Judy H. Huang , Dennis Yost , Betty Tang , Yunsang Kim
发明人: Claes H. Bjorkman , Min Melissa Yu , Hongquing Shan , David W. Cheung , Wai-Fan Yau , Kuowei Liu , Nasreen Gazala Chapra , Gerald Yin , Farhad K. Moghadam , Judy H. Huang , Dennis Yost , Betty Tang , Yunsang Kim
IPC分类号: B44C122
CPC分类号: H01L21/76835 , C23C16/401 , H01L21/02126 , H01L21/022 , H01L21/02208 , H01L21/02274 , H01L21/02304 , H01L21/31116 , H01L21/31138 , H01L21/3121 , H01L21/31612 , H01L21/31633 , H01L21/76801 , H01L21/76802 , H01L21/76807 , H01L21/76829
摘要: A method of depositing and etching dielectric layers having low dielectric constants and etch rates that vary by at least 3:1 for formation of horizontal interconnects. The amount of carbon or hydrogen in the dielectric layer is varied by changes in deposition conditions to provide low k dielectric layers that can replace etch stop layers or conventional dielectric layers in damascene applications. A dual damascene structure having two or more dielectric layers with dielectric constants lower than about 4 can be deposited in a single reactor and then etched to form vertical and horizontal interconnects by varying the concentration of a carbon:oxygen gas such as carbon monoxide. The etch gases for forming vertical interconnects preferably comprises CO and a fluorocarbon, and CO is preferably excluded from etch gases for forming horizontal interconnects.
-
-
-