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101 条记录 (耗时 0.031 秒)

    SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DESIGNING THE SAME
    71.
    发明申请
    SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DESIGNING THE SAME 审中-公开
    半导体集成电路及其设计方法

    公开(公告)号：US20080028343A1

    公开(公告)日：2008-01-31

    申请号：US11779366

    申请日：2007-07-18

    申请人： Hironori Sato ,  Takeshi Kitahara

    发明人： Hironori Sato ,  Takeshi Kitahara

    IPC分类号： H03L7/00 ,  G06F17/50

    CPC分类号： G06F17/5072

    摘要： A semiconductor integrated circuit comprising: a clock gating cell to which an enable signal and a clock signal are input, so as to output a gated clock signal generated by output-controlling said clock signal according to said enable signal; a first flip-flop circuit to which a first input data signal and said gated clock signal are input, so as to retain and output said first input data signal as a first output data signal in synchronization with said gated clock signal; and a second flip-flop circuit to which a second input data signal is input, so as to retain and output said second input data signal as a second output data signal in synchronization with said clock signal if the logical values of said second input data signal and said second output data signal differ from each other, or so as to retain said second output data signal if the logical values of said second input data signal and said second output data signal are the same.

    摘要翻译： 一种半导体集成电路，包括：时钟门控单元，其中输入有使能信号和时钟信号，以便根据所述使能信号输出通过输出控制所述时钟信号产生的选通时钟信号; 输入第一输入数据信号和所述选通时钟信号的第一触发器电路，以便与所述门控时钟信号同步地保持并输出所述第一输入数据信号作为第一输出数据信号; 以及第二触发器电路，输入第二输入数据信号，以便如果所述第二输入数据信号的逻辑值与所述时钟信号同步地保持并输出所述第二输入数据信号作为第二输出数据信号 并且所述第二输出数据信号彼此不同，或者如果所述第二输入数据信号和所述第二输出数据信号的逻辑值相同，则保持所述第二输出数据信号。

    Sphygmomanometer cuff capable of blocking blood flow favorably even with small width in wrapping direction
    72.
    发明授权
    Sphygmomanometer cuff capable of blocking blood flow favorably even with small width in wrapping direction 有权
    血压计袖口能够有效地阻止血液流动，即使在包裹方向上具有较小的宽度

    公开(公告)号：US06758821B2

    公开(公告)日：2004-07-06

    申请号：US10282157

    申请日：2002-10-29

    申请人： Kazunobu Itonaga ,  Takahide Tanaka ,  Yoshihiko Sano ,  Hiroyuki Kato ,  Hironori Sato

    发明人： Kazunobu Itonaga ,  Takahide Tanaka ,  Yoshihiko Sano ,  Hiroyuki Kato ,  Hironori Sato

    IPC分类号： A61B502

    CPC分类号： A61B5/02233

    摘要： A bladder incorporated in a cuff includes an outer wall located at the outer side, an inner wall located at the inner side, side walls connected to both side ends of the outer wall and the inner wall in the wrapping direction, and folded inward of the bladder, and a joint connecting the side walls inside the bladder. A sphygmomanometer cuff is provided that can maintain the former configuration even when inflated or deflated without change in the width even if the bladder is inflated, and that does not dilate in the width direction when inflated.

    摘要翻译： 并入袖带中的囊状物包括位于外侧的外壁，位于内侧的内壁，与包围方向的外壁和内壁的两侧端连接的侧壁，并向内侧折叠 膀胱和连接膀胱内侧壁的关节。 提供了一种血压计袖带，其即使在气囊膨胀时也能保持前者的构型，即使充气或放气也不会变宽，并且在膨胀时不会在宽度方向上膨胀。

    Solid electrolytic capacitor having plural terminals connected to canopy and production method thereof
    76.
    发明授权
    Solid electrolytic capacitor having plural terminals connected to canopy and production method thereof 有权
    具有多个端子连接到顶盖的固体电解电容器及其制造方法

    公开(公告)号：US08310817B2

    公开(公告)日：2012-11-13

    申请号：US12497175

    申请日：2009-07-02

    申请人： Masaaki Kobayashi ,  Hironori Sato

    发明人： Masaaki Kobayashi ,  Hironori Sato

    IPC分类号： H01G4/228 ,  H01G9/10 ,  H01G9/00 ,  H05K5/03

    CPC分类号： H01G9/048 ,  H01G9/012 ,  H01G9/15 ,  Y10T29/417

    摘要： In a solid electrolytic capacitor, a path of an electric current flowing from a lower layer to an upper layer of a laminate in cathode portions of respective capacitor elements connected through an electroconductive adhesive layer is opposite to paths of electric currents flowing from a canopy through joints to cathode terminals, thereby achieving reduction in ESL by mutual inductance effect in a simple structure. Since the solid electrolytic capacitor has the structure in which the laminate is surrounded by the canopy and joints, sufficient pressure resistance is ensured for the capacitor elements during resin injection. For this reason, a resin mold to cover the laminate can be formed by transfer molding, which ensures excellent heat resistance and moisture resistance.

    摘要翻译： 在固体电解电容器中，通过导电粘合剂层连接的各个电容器元件的阴极部分中从层的下层向层叠体的上层流动的路径与从顶盖通过接头流动的电流的路径相反 到阴极端子，从而通过简单结构的互感效应实现ESL的降低。 由于固体电解电容器具有层叠体被树冠和接头包围的结构，因此在树脂注入期间对于电容器元件确保了足够的耐压性。 因此，可以通过传递模塑形成覆盖层压体的树脂模具，从而确保优异的耐热性和耐湿性。

    WIRING BOARD AND METHOD OF MANUFACTURING THE SAME
    77.
    发明申请
    WIRING BOARD AND METHOD OF MANUFACTURING THE SAME 审中-公开
    接线板及其制造方法

    公开(公告)号：US20120152598A1

    公开(公告)日：2012-06-21

    申请号：US13326016

    申请日：2011-12-14

    申请人： Erina YAMADA ,  Kazunaga Higo ,  Hironori Sato

    发明人： Erina YAMADA ,  Kazunaga Higo ,  Hironori Sato

    IPC分类号： H05K1/09 ,  B23K31/02 ,  B23K1/20 ,  H05K3/10

    CPC分类号： B23K1/0016 ,  B23K2101/42 ,  H01L24/16 ,  H01L2224/16225 ,  H01L2924/14 ,  H05K3/3473 ,  H05K3/3478 ,  H05K2201/0341 ,  H05K2203/041 ,  H05K2203/043 ,  H05K2203/054 ,  H05K2203/0574 ,  H05K2203/1476 ,  H01L2924/00

    摘要： Disclosed is a method for manufacturing a wiring board including a conductor layer, a solder resist layer laminated on the conductor layer, and a conductor post to be electrically connected to a conductor layer which is disposed in a lower portion of a through-hole provided in the solder resist layer, the method including a through-hole boring process of boring the through-hole in the solder resist layer containing a thermosetting resin to expose the conductor layer within the through-hole; a first conductor part forming process of forming a first conductor part composed mainly of copper within the through-hole; and a second conductor part forming process of forming a second conductor part composed mainly of tin, copper, or a solder on the first conductor part, in this order.

    摘要翻译： 公开了一种制造布线板的方法，该布线板包括导体层，层压在导体层上的阻焊层，以及导体柱，该导体柱与导体层电连接，该导体层设置在设置在导体层中的通孔的下部 阻焊层，该方法包括在包含热固性树脂的阻焊层中钻通孔的通孔钻孔工艺，以暴露通孔内的导体层; 在所述通孔内形成主要由铜构成的第一导体部的第一导体部形成工序; 以及在第一导体部分上形成主要由锡，铜或焊料组成的第二导体部分的第二导体部分形成工艺。

    PULSE WAVE ANALYZER AND PULSE WAVE ANALYZING METHOD
    78.
    发明申请
    PULSE WAVE ANALYZER AND PULSE WAVE ANALYZING METHOD 审中-公开
    脉冲波分析仪和脉冲波分析方法

    公开(公告)号：US20110282224A1

    公开(公告)日：2011-11-17

    申请号：US13189634

    申请日：2011-07-25

    申请人： Hironori Sato ,  Tatsuya Kobayashi ,  Hideaki Yoshida ,  Kenji Fujii ,  Toshihiko Ogura

    发明人： Hironori Sato ,  Tatsuya Kobayashi ,  Hideaki Yoshida ,  Kenji Fujii ,  Toshihiko Ogura

    IPC分类号： A61B5/02

    CPC分类号： A61B5/022 ,  A61B5/7207 ,  A61B5/7239

    摘要： In a pulse wave analyzer, a local maximum point of a fourth order differentiated wave of the pulse wave of one beat is acquired, and a maximum point of a reflection wave of the local maximum points of the fourth order differentiation existing in a zone of an original waveform is determined as a starting point of a reflection wave zone that is a first characteristic point. With 10% of the amplitude of the first characteristic as a threshold value, a time point at which the amplitude reaches the threshold value after the relevant point is determined as an ending point of the reflection wave zone that is a second characteristic point. The duration time of the reflection time of the time between the first characteristic point and the second characteristic point is calculated as an index useful in the diagnosis of heart disease.

    摘要翻译： 在脉搏波分析仪中，获取1次脉搏波的第4级微分波的局部最大点，存在于第1级的区域中的4阶微分的局部最大点的反射波的最大点 原始波形被确定为作为第一特征点的反射波区域的起始点。 以第一特性的幅度的10％作为阈值，将相关点之后的振幅达到阈值的时间点确定为作为第二特征点的反射波段的终点。 计算第一特征点和第二特征点之间的时间的反射时间的持续时间作为用于诊断心脏病的指标。