摘要:
Aspects of the invention are directed to a method for forming a graphene composite structure. Initially, an encapsulating film is formed on a substrate. The encapsulating film comprises graphene. Subsequently, a plurality of particles are deposited on the encapsulating film, and then a temporary layer is deposited on the plurality of active particles and the encapsulating film. The substrate is then removed. Lastly, the temporary layer is also removed so as to cause the plurality of particles to form a cluster that is at least partially encapsulated by the encapsulating film.
摘要:
Graphene- and/or carbon nanotube-based radiation-hard transistor devices and techniques for the fabrication thereof are provided. In one aspect, a method of fabricating a radiation-hard transistor is provided. The method includes the following steps. A radiation-hard substrate is provided. A carbon-based material is formed on the substrate wherein a portion of the carbon-based material serves as a channel region of the transistor and other portions of the carbon-based material serve as source and drain regions of the transistor. Contacts are formed to the portions of the carbon-based material that serve as the source and drain regions of the transistor. A gate dielectric is deposited over the portion of the carbon-based material that serves as the channel region of the transistor. A top-gate contact is formed on the gate dielectric.
摘要:
A graphene field effect transistor includes a gate stack, the gate stack including a seed layer, a gate oxide formed over the seed layer, and a gate metal formed over the gate oxide; an insulating layer; and a graphene sheet displaced between the seed layer and the insulating layer.
摘要:
A semiconductor-on-insulator structure and a method of forming the silicon-on-insulator structure including an integrated graphene layer are disclosed. In an embodiment, the method comprises processing a silicon material to form a buried oxide layer within the silicon material, a silicon substrate below the buried oxide, and a silicon-on-insulator layer on the buried oxide. A graphene layer is transferred onto the silicon-on-insulator layer. Source and drain regions are formed in the silicon-on-insulator layer, and a gate is formed above the graphene. In one embodiment, the processing includes growing a respective oxide layer on each of first and second silicon sections, and joining these silicon sections together via the oxide layers to form the silicon material. The processing, in an embodiment, further includes removing a portion of the first silicon section, leaving a residual silicon layer on the bonded oxide, and the graphene layer is positioned on this residual silicon layer.
摘要:
A universal infrared receiving apparatus is provided. The universal infrared receiving apparatus includes a slicer, a non-volatile memory, a volatile memory and a comparison apparatus. The slicer slices a remote control command waveform into digital waveform data. The non-volatile memory pre-stores target waveform data. The volatile memory stores the digital waveform data and the target waveform data. The comparison apparatus, coupled to the volatile memory, compares the digital waveform data and the target waveform data to generate a comparison result.
摘要:
A method of forming CMOS transistor is disclosed. A CMOS transistor having a first active area and a second active area is provided. In order to maintain the concentration of the dopants in the second active area, according to the method of the present invention an ion implantation process is performed to form a lightly doped drain (LDD) in the second active area after an epitaxial layer is formed in the first active area. On the other hand, the ion implantation process is performed to form the respective LDD of the first active area and the second active area. After the epitaxial layer in the first active area is formed, another ion implantation process is performed to implant dopants into the LDD of the second active area again.
摘要:
The present invention provides a complementary metal-oxide-semiconductor (CMOS) device and a fabrication method thereof. The CMOSFET device includes a compressively strained SiGe channel for a PMOSFET, as well as a tensile strained Si channel for an NMOSFET, thereby enhancing hole and electron mobility for the PMOSFET and the NMOSFET, respectively. As such, the threshold voltages of the two types of transistors can be obtained in oppositely symmetric by single metal gate.
摘要:
The present invention relates to a nano-sized photocatalytic sol and application thereof. The invention utilizes spherical nano-photocatalyst and non-spherical photocatalytic sol for coating a photocatalyst layer on a substrate. Because of the stereo, interlaced and composite structure between spherical photocatalyst and non-spherical photocatalyst, a hard and well adhesion coated layer of photocatalyst with good photocatalytic activity can be obtained without using binder.
摘要:
A photocatalyst powder and the method of chemical vapor deposition for producing the same are provided. Titanium salt is injected into a chamber by the carrier gas. After reaction with oxygen gas, the photocatalyst particle is introduced to a low temperature collection device. The synthesized titanium dioxide powder is nano-sized, well-dispersed and anatase-crystallinity. The air contaminant was degraded with this photocatalyst under 315 nm to 700 nm irradiation. The method enhances the conversion of sunlight irradiation to chemical energy.
摘要:
Methods and systems for storing texels in memory banks in a manner that allows the retrieval of four neighboring texels within a single cycle are disclosed. The four neighboring texels are stored in separate memory banks according to a predetermined set of combinations of 2-D (u, v) coordinate pairs. In interpolating the color value of a color texel C(u, v), a texel buffer retrieves the four neighboring texels in a single cycle to reduce the memory access time. In one embodiment, a plurality of memory banks in the texel buffer are designed in an interleave mode. In an alternative embodiment, a plurality of memory banks in the texel buffer are implemented in a noninterleave mode. In both embodiments, a texel buffer retrieves the four neighboring texels of a color texel C(u, v) within a single cycle according to a predetermined set of criteria.