公开(公告)号：US20080311762A1

公开(公告)日：2008-12-18

申请号：US11820088

申请日：2007-06-18

申请人： Mark Doczy

发明人： Mark Doczy

IPC分类号： H01L21/00 ,  G21K5/00

CPC分类号： H01J37/3053 ,  H01J2237/3114 ,  H01L21/302 ,  H01L21/306

摘要： Methods and apparatus relating to surface roughness reduction are described. In one embodiment, a particle beam may be directed onto the surface roughness of a semiconductor device to reduce the roughness. Other embodiments are also disclosed.

摘要翻译： 描述与表面粗糙度减少有关的方法和装置。 在一个实施例中，粒子束可以被引导到半导体器件的表面粗糙度上以减小粗糙度。 还公开了其他实施例。

公开(公告)号：US20070231984A1

公开(公告)日：2007-10-04

申请号：US11395940

申请日：2006-03-31

申请人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Robert Chau

IPC分类号： H01L21/8234

CPC分类号： H01L21/8234 ,  H01L21/28518 ,  H01L21/28562 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/66795 ,  H01L29/7851

摘要： A method for fabricating a three-dimensional transistor is described. Atomic Layer Deposition of nickel, in one embodiment, is used to form a uniform silicide on all epitaxially grown source and drain regions, including those facing downwardly.

摘要翻译： 对三维晶体管的制造方法进行说明。 原子层在一个实施方案中，镍的沉积用于在所有外延生长的源极和漏极区域上形成均匀的硅化物，包括面向下的源极和漏极区域。

公开(公告)号：US20070029627A1

公开(公告)日：2007-02-08

申请号：US11545313

申请日：2006-10-10

申请人： Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Justin Brask ,  Robert Chau

发明人： Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Matthew Metz ,  Justin Brask ,  Robert Chau

IPC分类号： H01L29/78

CPC分类号： H01L21/28247 ,  H01L21/26586 ,  H01L21/28238 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31155 ,  H01L21/32134 ,  H01L21/32137 ,  H01L21/823842 ,  H01L21/823857 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/495 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/66553

摘要： In a metal gate replacement process, a cup-shaped gate metal oxide dielectric may have a vertical portion that may be exposed to a silicon ion implantation. As a result of the implantation, the dielectric constant of a vertical portion may be reduced, reducing fringe capacitance.

摘要翻译： 在金属栅极更换工艺中，杯状栅极金属氧化物电介质可以具有可暴露于硅离子注入的垂直部分。 作为注入的结果，可以减小垂直部分的介电常数，减少边缘电容。

公开(公告)号：US20060220090A1

公开(公告)日：2006-10-05

申请号：US11089247

申请日：2005-03-23

申请人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Brian Doyle ,  Marko Radosavljevic ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Mark Doczy ,  Jack Kavalieros ,  Justin Brask ,  Brian Doyle ,  Marko Radosavljevic ,  Robert Chau

IPC分类号： H01L29/94

CPC分类号： H01L29/516 ,  H01L21/28194 ,  H01L29/495 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/7843

摘要： A semiconductor device is described. That semiconductor device comprises a high-k gate dielectric layer that is formed over a channel that is positioned within a substrate, and a metal gate electrode that is formed on the high-k gate dielectric layer. The high-k gate dielectric layer has off-state leakage characteristics that are superior to those of a silicon dioxide based gate dielectric, and on-state mobility characteristics that are superior to those of a high-k gate dielectric that comprises an isotropic material.

摘要翻译： 描述半导体器件。 该半导体器件包括形成在位于衬底内的沟道上的高k栅介质层和形成在高k栅介质层上的金属栅电极。 高k栅极电介质层具有优于基于二氧化硅的栅极电介质的截止状态泄漏特性，以及优于包含各向同性材料的高k栅极电介质的导通状态迁移率特性。

公开(公告)号：US20060214237A1

公开(公告)日：2006-09-28

申请号：US11418577

申请日：2006-05-05

申请人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

IPC分类号： H01L29/94 ,  H01L29/76

CPC分类号： H01L21/823828 ,  H01L21/823857

摘要： Complementary metal oxide semiconductor integrated circuits may be formed with NMOS and PMOS transistors having different gate dielectrics. The different gate dielectrics may be formed, for example, by a replacement process. The gate dielectrics may differ in material, thickness, or formation techniques, as a few examples.

公开(公告)号：US20060166447A1

公开(公告)日：2006-07-27

申请号：US11390892

申请日：2006-03-27

申请人： Mark Doczy ,  Gilbert Dewey ,  Suman Datta ,  Sangwoo Pae ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Adrian Sherrill ,  Markus Kuhn ,  Robert Chau

发明人： Mark Doczy ,  Gilbert Dewey ,  Suman Datta ,  Sangwoo Pae ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Adrian Sherrill ,  Markus Kuhn ,  Robert Chau

IPC分类号： H01L21/336

CPC分类号： H01L21/0214 ,  H01L21/02142 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/28176 ,  H01L21/28194 ,  H01L21/3144 ,  H01L21/31691 ,  H01L28/56 ,  H01L29/517 ,  H01L29/518

摘要： A method for making a semiconductor device is described. That method comprises forming an oxide layer on a substrate, and forming a high-k dielectric layer on the oxide layer. The oxide layer and the high-k dielectric layer are then annealed at a sufficient temperature for a sufficient time to generate a gate dielectric with a graded dielectric constant.

公开(公告)号：US20060160342A1

公开(公告)日：2006-07-20

申请号：US11037860

申请日：2005-01-18

申请人： Mark Doczy ,  Lawrence Wong ,  Valery Dubin ,  Justin Brask ,  Jack Kavalieros ,  Suman Datta ,  Matthew Metz ,  Robert Chau

发明人： Mark Doczy ,  Lawrence Wong ,  Valery Dubin ,  Justin Brask ,  Jack Kavalieros ,  Suman Datta ,  Matthew Metz ,  Robert Chau

IPC分类号： H01L21/3205

CPC分类号： H01L21/28194 ,  H01L21/28079 ,  H01L21/823842 ,  H01L29/495 ,  H01L29/517 ,  H01L29/66545 ,  H01L29/6659 ,  H01L29/7833

摘要： Complementary metal oxide semiconductor metal gate transistors may be formed by depositing a metal layer in trenches formerly inhabited by patterned gate structures. The patterned gate structures may have been formed of polysilicon in one embodiment. The trenches may be filled with metal by surface activating using a catalytic metal, followed by electroless deposition of a seed layer followed by superconformal filling bottom up.

摘要翻译： 互补金属氧化物半导体金属栅极晶体管可以通过在先前由图案化栅极结构居住的沟槽中沉积金属层来形成。 在一个实施例中，图案化栅极结构可以由多晶硅形成。 可以使用催化金属通过表面活化来填充沟槽，然后通过化学沉积种子层，然后从下向上超超融合填充来填充沟槽。

公开(公告)号：US20060148150A1

公开(公告)日：2006-07-06

申请号：US11028167

申请日：2005-01-03

申请人： Jack Kavalieros ,  Peter Vandervoorn ,  Kelin Kuhn ,  Justin Brask ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Robert Chau

发明人： Jack Kavalieros ,  Peter Vandervoorn ,  Kelin Kuhn ,  Justin Brask ,  Mark Doczy ,  Matthew Metz ,  Suman Datta ,  Robert Chau

IPC分类号： H01L29/15 ,  H01L31/0312 ,  H01L21/336 ,  H01L21/8234

CPC分类号： H01L29/66537 ,  H01L21/823807 ,  H01L21/823842 ,  H01L29/66545

摘要： Higher mobility transistors may be achieved by removing a dummy metal gate electrode as part of a replacement metal gate process and doping the exposed channel region after source and drains have already been formed. As a result, a retrograde doping profile may be achieved in some embodiments in the channel region which is not adversely affected by subsequent high temperature processing. For example, after already forming the source and drains and thereafter doping the channel, temperature regimes greater than 900° C. may be avoided.

摘要翻译： 可以通过去除虚设金属栅电极作为替代金属栅极工艺的一部分并且在源极和漏极已经形成之后掺杂暴露的沟道区域来实现更高迁移率的晶体管。 结果，在一些实施例中可以在沟道区域中实现逆向掺杂分布，其不受后续高温处理的不利影响。 例如，在已经形成源极并且排出并且之后掺杂通道之后，可以避免大于900℃的温度方案。

公开(公告)号：US20060121742A1

公开(公告)日：2006-06-08

申请号：US11006438

申请日：2004-12-07

申请人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

发明人： Matthew Metz ,  Suman Datta ,  Jack Kavalieros ,  Mark Doczy ,  Justin Brask ,  Robert Chau

IPC分类号： H01L21/336

CPC分类号： H01L29/517 ,  H01L21/02052 ,  H01L21/02172 ,  H01L21/0228 ,  H01L21/02304 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/3162 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/823462 ,  H01L29/495 ,  H01L29/513

摘要： A method for making a semiconductor device is described. That method comprises applying an atomic layer chemical vapor deposition process to form a high-k gate dielectric layer directly on a hydrophobic surface of a substrate. The atomic layer chemical vapor deposition process initiates growth of the high-k gate dielectric layer in less than about twenty growth cycles.

摘要翻译： 描述制造半导体器件的方法。 该方法包括应用原子层化学气相沉积工艺以在衬底的疏水表面上直接形成高k栅介质层。 原子层化学气相沉积工艺在低于约20个生长周期中引发高k栅极电介质层的生长。

公开(公告)号：US20060091483A1

公开(公告)日：2006-05-04

申请号：US11242807

申请日：2005-10-03

申请人： Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Suman Datta ,  Robert Chau

发明人： Mark Doczy ,  Justin Brask ,  Jack Kavalieros ,  Matthew Metz ,  Suman Datta ,  Robert Chau

IPC分类号： H01L29/94 ,  H01L29/76

CPC分类号： H01L21/28097 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66545

摘要： A method for making a semiconductor device is described. That method comprises forming a high-k gate dielectric layer on a substrate, forming a barrier layer on the high-k gate dielectric layer, and forming a fully silicided gate electrode on the barrier layer.