公开(公告)号：US07812396B2

公开(公告)日：2010-10-12

申请号：US11688449

申请日：2007-03-20

申请人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Masaru Kidoh

发明人： Masaru Kito ,  Hideaki Aochi ,  Ryota Katsumata ,  Masaru Kidoh

IPC分类号： H01L23/62

CPC分类号： H01L27/0605 ,  H01L21/8221 ,  H01L21/84 ,  H01L27/12

摘要： A semiconductor device having a first semiconductor region and second semiconductor region including impurities formed on an insulating layer formed on a semiconductor substrate, an insulator formed between the first semiconductor region and the second semiconductor region, a first impurity diffusion control film formed on the first semiconductor region and a second impurity diffusion control film formed on the second semiconductor region, a channel layer formed on the first impurity diffusion control film and second impurity diffusion film to cross at right angles with a direction where the first semiconductor region and the second semiconductor region are extended, a gate insulating film formed on the channel layer and a gate electrode formed on the gate insulating layer.

摘要翻译： 一种具有第一半导体区域和第二半导体区域的半导体器件，所述第二半导体区域包括形成在形成于半导体衬底上的绝缘层上的杂质，形成在所述第一半导体区域和所述第二半导体区域之间的绝缘体，形成在所述第一半导体 区域和形成在第二半导体区域上的第二杂质扩散控制膜，形成在第一杂质扩散控制膜和第二杂质扩散膜上的沟道层，以与第一半导体区域和第二半导体区域的方向成直角交叉 扩展了形成在沟道层上的栅极绝缘膜和形成在栅极绝缘层上的栅电极。

公开(公告)号：US20100207195A1

公开(公告)日：2010-08-19

申请号：US12679991

申请日：2008-12-09

申请人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi

IPC分类号： H01L29/792 ,  H01L21/336

CPC分类号： H01L27/11582 ,  G11C16/0483 ,  H01L27/1052 ,  H01L27/11551 ,  H01L27/11556 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11578 ,  H01L29/513

摘要： A non-volatile semiconductor storage device has a plurality of memory strings to each of which a plurality of electrically rewritable memory cells are connected in series. Each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate and a coupling portion formed to couple the lower ends of the pair of columnar portions; a charge storage layer formed to surround the side surfaces of the columnar portions; and first conductive layers formed to surround the side surfaces of the columnar portions and the charge storage layer. The first conductive layers functions as gate electrodes of the memory cells.

摘要翻译： 非挥发性半导体存储装置具有多个存储串，其中多个电可重写存储单元串联连接。 每个存储串包括第一半导体层，每个第一半导体层具有相对于衬底在垂直方向上延伸的一对柱状部分和形成为耦合该对柱状部分的下端的耦合部分; 形成为围绕所述柱状部的侧面的电荷存储层; 以及形成为围绕柱状部分和电荷存储层的侧表面的第一导电层。 第一导电层用作存储器单元的栅电极。

公开(公告)号：US20100109072A1

公开(公告)日：2010-05-06

申请号：US12563832

申请日：2009-09-21

申请人： Masaru KIDOH ,  Hiroyasu Tanaka ,  Ryota Katsumata ,  Masaru Kito ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi ,  Yoshiaki Fukuzumi

发明人： Masaru KIDOH ,  Hiroyasu Tanaka ,  Ryota Katsumata ,  Masaru Kito ,  Yosuke Komori ,  Megumi Ishiduki ,  Hideaki Aochi ,  Yoshiaki Fukuzumi

IPC分类号： H01L27/115 ,  H01L21/8246

CPC分类号： H01L27/11578 ,  H01L21/76816 ,  H01L27/0688 ,  H01L27/112 ,  H01L27/11582

摘要： A nonvolatile semiconductor memory device includes a first stacked body on a silicon substrate, and a second stacked body is provided thereon. The first stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films, and a first portion of a through-hole extending in a stacking direction is formed. The second stacked body includes a plurality of insulating films alternately stacked with a plurality of electrode films, and a second portion of the through-hole is formed. A memory film is formed on an inner face of the through-hole, and a silicon pillar is buried in an interior of the through-hole. A central axis of the second portion of the through-hole is shifted from a central axis of the first portion, and a lower end of the second portion is positioned lower than an upper portion of the first portion.

摘要翻译： 非易失性半导体存储器件包括在硅衬底上的第一层叠体，并且在其上设置第二层叠体。 第一堆叠体包括交替层叠有多个电极膜的多个绝缘膜，并且形成沿堆叠方向延伸的通孔的第一部分。 第二堆叠体包括交替层叠有多个电极膜的多个绝缘膜，并且形成通孔的第二部分。 在通孔的内表面上形成记忆膜，并且将硅柱埋在通孔的内部。 通孔的第二部分的中心轴线从第一部分的中心轴线偏移，并且第二部分的下端位于比第一部分的上部更低的位置。

公开(公告)号：US20100096682A1

公开(公告)日：2010-04-22

申请号：US12556242

申请日：2009-09-09

申请人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Yosuke Komori ,  Megumi Ishiduki ,  Akihiro Nitayama ,  Hideaki Aochi ,  Hitoshi Ito ,  Yasuyuki Matsuoka

发明人： Yoshiaki Fukuzumi ,  Ryota Katsumata ,  Masaru Kito ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Yosuke Komori ,  Megumi Ishiduki ,  Akihiro Nitayama ,  Hideaki Aochi ,  Hitoshi Ito ,  Yasuyuki Matsuoka

IPC分类号： H01L29/78 ,  H01L21/768

CPC分类号： H01L27/11578 ,  H01L27/11565 ,  H01L27/11582

摘要： A non-volatile semiconductor storage device has a memory string including a plurality of electrically rewritable memory cells connected in series. The non-volatile semiconductor storage device also has a protruding layer formed to protrude upward with respect to a substrate. The memory string includes: a plurality of first conductive layers laminated on the substrate; a first semiconductor layer formed to penetrate the plurality of first conductive layers; and an electric charge storage layer formed between the first conductive layers and the first semiconductor layer, and configured to be able to store electric charges. Each of the plurality of first conductive layers includes: a bottom portion extending in parallel to the substrate; and a side portion extending upward with respect to the substrate along the protruding layer at the bottom portion. The protruding layer has a width in a first direction parallel to the substrate that is less than or equal to its length in a lamination direction.

摘要翻译： 非易失性半导体存储装置具有串联连接的多个电可重写存储单元的存储串。 非挥发性半导体存储装置还具有形成为相对于基板向上突出的突出层。 存储器串包括：层叠在基板上的多个第一导电层; 形成为穿透所述多个第一导电层的第一半导体层; 以及形成在第一导电层和第一半导体层之间的电荷存储层，并且能够存储电荷。 多个第一导电层中的每一个包括：平行于基板延伸的底部; 以及沿底部的突出层相对于基板向上延伸的侧部。 该突出层在平行于基板的第一方向上的宽度小于或等于其在层叠方向上的长度。

公开(公告)号：US20100039865A1

公开(公告)日：2010-02-18

申请号：US12521997

申请日：2008-01-31

申请人： Masaru Kidoh ,  Hiroyasu Tanaka ,  Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Mitsuru Sato

发明人： Masaru Kidoh ,  Hiroyasu Tanaka ,  Masaru Kito ,  Ryota Katsumata ,  Hideaki Aochi ,  Mitsuru Sato

IPC分类号： G11C16/06 ,  H01L29/792 ,  H01L21/4763

CPC分类号： H01L27/11578 ,  G11C16/0483 ,  H01L21/8221 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/11568 ,  H01L27/11575 ,  H01L27/11582

摘要： A non-volatile semiconductor memory device according to the present invention includes a substrate; a first word-line provided above the substrate surface, the first word-line having a plate shape in an area where a memory cell is formed; a second word-line provided above the first word-line surface, the second word-line having a plate shape; a plurality of metal wirings connecting the first and second word-lines with a driver circuit; and a plurality of contacts connecting the first and second word-lines with the metal wirings. The contact of the first word-line is formed in a first word-line contact area. The contact of the second word-line is formed in a second word-line contact area. The first word-line contact area is provided on a surface of the first word-line that is drawn to the second word-line contact area.

摘要翻译： 根据本发明的非易失性半导体存储器件包括：衬底; 设置在所述衬底表面上方的第一字线，所述第一字线在形成存储器单元的区域中具有板形; 设置在所述第一字线表面上方的第二字线，所述第二字线具有板形; 将第一和第二字线与驱动电路连接的多个金属布线; 以及将第一和第二字线与金属布线连接的多个触点。 第一字线的接触形成在第一字线接触区域中。 第二字线的接触形成在第二字线接触区域中。 第一字线接触区域被提供在第一字线的被拉到第二字线接触区域的表面上。

公开(公告)号：US20090230458A1

公开(公告)日：2009-09-17

申请号：US12392636

申请日：2009-02-25

申请人： Megumi ISHIDUKI ,  Hideaki Aochi ,  Ryota Katsumata ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Yosuke Komori ,  Yasuyuki Matsuoka

发明人： Megumi ISHIDUKI ,  Hideaki Aochi ,  Ryota Katsumata ,  Hiroyasu Tanaka ,  Masaru Kidoh ,  Masaru Kito ,  Yoshiaki Fukuzumi ,  Yosuke Komori ,  Yasuyuki Matsuoka

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/42324 ,  H01L29/4234 ,  H01L29/7881 ,  H01L29/7926

摘要： A non-volatile semiconductor storage device has a plurality of memory strings with a plurality of electrically rewritable memory cells connected in series. Each of the memory strings includes: a columnar semiconductor layer extending in a direction perpendicular to a substrate; a plurality of conductive layers formed at a sidewall of the columnar semiconductor layer via memory layers; and interlayer insulation layers formed above of below the conductive layers. A sidewall of the conductive layers facing the columnar semiconductor layer is formed to be inclined such that the distance thereof from a central axis of the columnar semiconductor layer becomes larger at lower position thereof than at upper position thereof. While, a sidewall of the interlayer insulation layers facing the columnar semiconductor layer is formed to be inclined such that the distance thereof from a central axis of the columnar semiconductor layer becomes smaller at lower position thereof than at upper position thereof.

摘要翻译： 非易失性半导体存储装置具有多个具有串联连接的多个电可重写存储单元的存储器串。 每个存储器串包括：在垂直于衬底的方向上延伸的柱状半导体层; 多个导电层，经由存储层形成在所述柱状半导体层的侧壁处; 以及形成在导电层下方的层间绝缘层。 形成面向柱状半导体层的导电层的侧壁，使得其与柱状半导体层的中心轴的距离在其下部位置比在其上部位置变大。 同时，面对柱状半导体层的层间绝缘层的侧壁形成为倾斜，使得其在柱状半导体层的中心轴线处的距离在其下部位置处比在其上部位置变小。

公开(公告)号：US20090212350A1

公开(公告)日：2009-08-27

申请号：US12389856

申请日：2009-02-20

申请人： Masaru KIDOH ,  Masaru Kito ,  Ryota Katsumata ,  Yoshiaki Fukuzumi ,  Hiroyasu Tanaka ,  Megumi Ishiduki ,  Yosuke Komori ,  Hideaki Aochi ,  Akihiro Nitayama ,  Hitoshi Ito ,  Yasuyuki Matsuoka

发明人： Masaru KIDOH ,  Masaru Kito ,  Ryota Katsumata ,  Yoshiaki Fukuzumi ,  Hiroyasu Tanaka ,  Megumi Ishiduki ,  Yosuke Komori ,  Hideaki Aochi ,  Akihiro Nitayama ,  Hitoshi Ito ,  Yasuyuki Matsuoka

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L27/105 ,  H01L27/0688 ,  H01L27/11575 ,  H01L27/11578 ,  H01L27/11582

摘要： A nonvolatile semiconductor storage device has a plurality of memory strings in which a plurality of electrically rewritable memory cells are connected in series. The memory string has a columnar semiconductor layer extending in a direction perpendicular to a substrate; a conductive layer formed so as to sandwich a charge storing layer in cooperation with the columnar semiconductor layer; and a metal layer formed so as to be in contact with the top face of the conductive layer.

摘要翻译： 非易失性半导体存储装置具有串联连接多个电可重写存储单元的多个存储串。 存储器串具有在垂直于衬底的方向上延伸的柱状半导体层; 形成为与柱状半导体层配合地夹着电荷存储层的导电层; 以及形成为与导电层的顶面接触的金属层。

公开(公告)号：US07558141B2

公开(公告)日：2009-07-07

申请号：US11955900

申请日：2007-12-13

申请人： Ryota Katsumata ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Masaru Kito ,  Hideaki Aochi ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka

发明人： Ryota Katsumata ,  Masaru Kidoh ,  Hiroyasu Tanaka ,  Masaru Kito ,  Hideaki Aochi ,  Yoshiaki Fukuzumi ,  Yasuyuki Matsuoka

IPC分类号： G11C7/14

CPC分类号： H01L27/115 ,  G11C7/18 ,  G11C8/08 ,  H01L27/11526 ,  H01L27/11529

摘要： A semiconductor memory device has a semiconductor substrate, first select transistors formed on the surface of said semiconductor substrate, first dummy transistors formed above said first select transistors, a plurality of memory cell transistors formed above said first dummy transistors so as to extend in a direction perpendicular to the surface of said semiconductor substrate, each of said memory cell transistor including an insulating layer having a charge-accumulating function, second dummy transistors formed above said memory cell transistors, and second select transistors formed above said second dummy transistors; wherein a first potential is provided to the gate electrodes of said first select transistors and the gate electrodes of said first dummy transistors and a second potential is provided to the gate electrodes of said second select transistors and the gate electrodes of said second dummy transistors at the time of write operation to write data to said memory cell transistors.

摘要翻译： 半导体存储器件具有半导体衬底，形成在所述半导体衬底的表面上的第一选择晶体管，形成在所述第一选择晶体管上方的第一虚拟晶体管，形成在所述第一虚拟晶体管上方的多个存储单元晶体管， 垂直于所述半导体衬底的表面，每个所述存储单元晶体管包括具有电荷累积功能的绝缘层，形成在所述存储单元晶体管上方的第二虚拟晶体管以及形成在所述第二虚设晶体管上方的第二选择晶体管; 其中第一电位被提供给所述第一选择晶体管的栅电极和所述第一虚拟晶体管的栅电极，并且第二电位被提供给所述第二选择晶体管的栅电极和所述第二虚晶体管的栅电极 写入操作的时间将数据写入到所述存储单元晶体管。

公开(公告)号：US20090146190A1

公开(公告)日：2009-06-11

申请号：US12325711

申请日：2008-12-01

申请人： Yoshiaki FUKUZUMI ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Hideaki Aochi ,  Yasuyuki Matsuoka

发明人： Yoshiaki FUKUZUMI ,  Ryota Katsumata ,  Masaru Kidoh ,  Masaru Kito ,  Hiroyasu Tanaka ,  Hideaki Aochi ,  Yasuyuki Matsuoka

IPC分类号： H01L27/115 ,  H01L21/8247

CPC分类号： H01L27/11578 ,  H01L27/11575 ,  H01L27/11582

摘要： According to an aspect of the present invention, there is provided a nonvolatile semiconductor memory device, comprising a plurality of memory strings, each of the memory strings being constituted with a plurality of electrically erasable memory cells being serially connected each other, the memory strings comprising: a columnar semiconductor layer perpendicularly extending toward a substrate; a plurality of conductive layers being formed in parallel to the substrate and including a first space between a sidewall of the columnar semiconductor layers; and characteristic change layer being formed on the sidewall of the columnar semiconductor layer faced to the first space or a sidewall of the conductive layer faced to the first space and changing characteristics accompanying with applied voltage; wherein the plurality of the conductive layers have a function of a relative movement to a prescribed direction for the columnar semiconductor layer.

摘要翻译： 根据本发明的一个方面，提供了一种非易失性半导体存储器件，包括多个存储器串，每个存储器串由多个电可擦除存储器单元组成，所述多个电可擦除存储器单元串联连接，所述存储器串包括 ：向衬底垂直延伸的柱状半导体层; 多个导电层平行于衬底形成并且包括柱状半导体层的侧壁之间的第一空间; 并且特征变化层形成在面向面向第一空间的导电层的第一空间或侧壁的柱状半导体层的侧壁上，并且伴随施加电压的变化特性; 其中所述多个所述导电层具有对于所述柱状半导体层相对于规定方向的相对移动的功能。

公开(公告)号：US07459741B2

公开(公告)日：2008-12-02

申请号：US11390255

申请日：2006-03-28

申请人： Masaru Kidoh ,  Hideaki Aochi ,  Ryota Katsumata ,  Masaru Kito

发明人： Masaru Kidoh ,  Hideaki Aochi ,  Ryota Katsumata ,  Masaru Kito

IPC分类号： H01L29/34

CPC分类号： H01L29/945 ,  H01L27/108 ,  H01L27/10802 ,  H01L27/10841 ,  H01L29/7841

摘要： A semiconductor memory device excellent in data holding characteristics even when a cell area is reduced is disclosed. According to one aspect of the present invention, a semiconductor memory device comprises a transistor including a source, a drain and a channel region disposed in a semiconductor substrate, and including a gate electrode disposed through a gate insulator on a surface of the semiconductor substrate of the channel region, a capacitor connected to the channel region, a first wiring line electrically connected to the gate electrode, and a second wiring line electrically connected to the drain.

摘要翻译： 公开了即使在小区面积减小的情况下，数据保持特性优异的半导体存储装置。 根据本发明的一个方面，一种半导体存储器件包括晶体管，其包括源极，漏极和设置在半导体衬底中的沟道区，并且包括通过栅极绝缘体设置在栅极绝缘体的半导体衬底的表面上的栅电极 沟道区，连接到沟道区的电容器，与栅电极电连接的第一布线和与漏极电连接的第二布线。