公开(公告)号：US20120280306A1

公开(公告)日：2012-11-08

申请号：US13554577

申请日：2012-07-20

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L29/792

CPC分类号： G11C11/5671 ,  G11C8/12 ,  G11C16/0416 ,  G11C16/0466 ,  H01L29/513 ,  H01L29/792

摘要： One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.

摘要翻译： 单晶体管存储器件通过操纵场效应晶体管（FET）的俘获层内的氧空位来促进非易失性数据存储，从而提供晶体管的阈值电压的控制和变化。 可以为各种阈值电压分配数据值，提供将一个或多个位数据存储在单个存储器单元中的能力。 为了控制阈值电压，可以通过在空位内捕获电子来操纵氧空位，从空位释放被俘获的电子，移动捕获层内的空位并湮灭空位。

公开(公告)号：US07947597B2

公开(公告)日：2011-05-24

申请号：US12720562

申请日：2010-03-09

申请人： Joel A. Drewes ,  Cem Basceri ,  Demetrius Sarigiannis

发明人： Joel A. Drewes ,  Cem Basceri ,  Demetrius Sarigiannis

IPC分类号： H01L21/4763

CPC分类号： H01L21/28562 ,  C23C16/06 ,  C23C16/45525 ,  H01L21/28518 ,  H01L21/76843 ,  Y10S438/913

摘要： Some embodiments include methods of titanium deposition in which a silicon-containing surface and an electrically insulative surface are both exposed to titanium-containing material, and in which such exposure forms titanium silicide from the silicon-containing surface while not depositing titanium onto the electrically insulative surface. The embodiments may include atomic layer deposition processes, and may include a hydrogen pre-treatment of the silicon-containing surfaces to activate the surfaces for reaction with the titanium-containing material. Some embodiments include methods of titanium deposition in which a semiconductor material surface and an electrically insulative surface are both exposed to titanium-containing material, and in which a titanium-containing film is uniformly deposited across both surfaces.

摘要翻译： 一些实施例包括钛沉积的方法，其中含硅表面和电绝缘表面都暴露于含钛材料，并且其中这种暴露从含硅表面形成硅化钛，而不将钛沉积在电绝缘 表面。 这些实施方案可以包括原子层沉积工艺，并且可以包括含氢表面的氢预处理以活化表面以与含钛材料反应。 一些实施例包括钛沉积的方法，其中半导体材料表面和电绝缘表面都暴露于含钛材料，并且其中含钛膜均匀地沉积在两个表面上。

公开(公告)号：US20100282164A1

公开(公告)日：2010-11-11

申请号：US12840153

申请日：2010-07-20

申请人： Kevin L. Beaman ,  Trung T. Doan ,  Lyle D. Breiner ,  Ronald A. Weimer ,  Er-Xuan Ping ,  David J. Kubista ,  Cem Basceri ,  Lingyi A. Zheng

发明人： Kevin L. Beaman ,  Trung T. Doan ,  Lyle D. Breiner ,  Ronald A. Weimer ,  Er-Xuan Ping ,  David J. Kubista ,  Cem Basceri ,  Lingyi A. Zheng

IPC分类号： C23C16/00 ,  B05C11/00

CPC分类号： C23C16/00 ,  C23C16/46

摘要： The present disclosure provides methods and systems for controlling temperature. The method has particular utility in connection with controlling temperature in a deposition process, e.g., in depositing a heat-reflective material via CVD. One exemplary embodiment provides a method that involves monitoring a first temperature outside the deposition chamber and a second temperature inside the deposition chamber. An internal temperature in the deposition chamber can be increased in accordance with a ramp profile by (a) comparing a control temperature to a target temperature, and (b) selectively delivering heat to the deposition chamber in response to a result of the comparison. The target temperature may be determined in accordance with the ramp profile, but the control temperature in one implementation alternates between the first temperature and the second temperature.

摘要翻译： 本公开提供了用于控制温度的方法和系统。 该方法在沉积工艺中控制温度，例如通过CVD沉积热反射材料方面具有特别的用途。 一个示例性实施例提供了一种方法，其涉及监测沉积室外的第一温度和沉积室内的第二温度。 通过（a）将控制温度与目标温度进行比较，可以根据斜坡分布来增加沉积室中的内部温度，以及（b）响应于比较的结果，选择性地将热量输送到沉积室。 目标温度可以根据斜坡分布来确定，但是一个实现中的控制温度在第一温度和第二温度之间交替。

公开(公告)号：US07794787B2

公开(公告)日：2010-09-14

申请号：US12436936

申请日：2009-05-07

申请人： Demetrius Sarigiannis ,  Garo J. Derderian ,  Cem Basceri

发明人： Demetrius Sarigiannis ,  Garo J. Derderian ,  Cem Basceri

IPC分类号： C23C16/00 ,  C23C16/06

CPC分类号： C23C16/45525 ,  C23C16/40 ,  C23C16/448 ,  Y10S427/101

摘要： The invention includes methods of utilizing supercritical fluids to introduce precursors into reaction chambers. In some aspects, a supercritical fluid is utilized to introduce at least one precursor into a chamber during ALD, and in particular aspects the supercritical fluid is utilized to introduce multiple precursors into the reaction chamber during ALD. The invention can be utilized to form any of various materials, including metal-containing materials, such as, for example, metal oxides, metal nitrides, and materials consisting of metal. Metal oxides can be formed by utilizing a supercritical fluid can be utilized to introduce a metal-containing precursor into reaction chamber, with the precursor then forming a metal-containing layer over a surface of a substrate. Subsequently, the metal-containing layer can be reacted with oxygen to convert at least some of the metal within the layer to metal oxide.

摘要翻译： 本发明包括利用超临界流体将前体引入反应室的方法。 在一些方面，使用超临界流体在ALD期间将至少一种前体引入室中，并且在特定方面，超临界流体用于在ALD期间将多种前体引入反应室。 本发明可用于形成任何各种材料，包括含金属的材料，例如金属氧化物，金属氮化物和由金属组成的材料。 可以通过利用超临界流体来形成金属氧化物，以将含金属的前体引入反应室，然后前体在基材的表面上形成含金属的层。 随后，含金属层可以与氧反应以将该层内的至少一些金属转化为金属氧化物。

公开(公告)号：US07767525B2

公开(公告)日：2010-08-03

申请号：US11486524

申请日：2006-07-13

申请人： H. Montgomery Manning ,  Kunal R. Parekh ,  Cem Basceri ,  Gurtej S. Sandhu

发明人： H. Montgomery Manning ,  Kunal R. Parekh ,  Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： H01L21/336

CPC分类号： H01L29/66787 ,  H01L27/10808 ,  H01L27/10876

摘要： The invention includes methods in which an angled implant is utilized to self-align a source/drain region implant with the top edge of a gateline of a vertical transistor structure. The invention also includes methods in which an angled implant is utilized to implant dopant beneath the gateline of a vertical transistor structure. Vertical transistor structures formed in accordance with methodology of the present invention can be incorporated into various types of integrated circuitry, including, for example, DRAM arrays.

公开(公告)号：US07728403B2

公开(公告)日：2010-06-01

申请号：US11444106

申请日：2006-05-31

申请人： Christopher Harris ,  Cem Basceri ,  Kent Bertilsson

发明人： Christopher Harris ,  Cem Basceri ,  Kent Bertilsson

IPC分类号： H01L29/47

CPC分类号： H01L29/872 ,  H01L21/8213 ,  H01L27/0255 ,  H01L27/0814 ,  H01L29/0619 ,  H01L29/16 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/8611

摘要： A semiconductor device of unipolar type has Schottky-contacts (6) laterally separated by regions in the form of additional layers (7, 7″) of semiconductor material on top of a drift layer (3). Said additional layers being doped according to a conductivity type being opposite to the one of the drift layer. At least one (7″) of the additional layers has a substantially larger lateral extension and thereby larger area of the interface to the drift layer than adjacent such layers (7) for facilitating the building-up of a sufficient voltage between that layer and the drift layer for injecting minority charge carriers into the drift layer upon surge for surge protection.

摘要翻译： 单极型半导体器件具有由漂移层（3）顶部上的半导体材料附加层（7,7“）形式的区域横向隔开的肖特基触点（6）。 所述附加层根据与漂移层中的一个相反的导电类型被掺杂。 至少一个（7“）附加层具有相对较大的侧向延伸，从而与相邻的这些层（7）相比，漂移层的界面的面积更大，以便于在该层和第二层之间建立足够的电压 漂移层，用于在电涌保护时将少数电荷载体注入漂移层。

公开(公告)号：US07700480B2

公开(公告)日：2010-04-20

申请号：US11741113

申请日：2007-04-27

申请人： Joel A. Drewes ,  Cem Basceri ,  Demetrius Sarigiannis

发明人： Joel A. Drewes ,  Cem Basceri ,  Demetrius Sarigiannis

IPC分类号： H01L21/4763

CPC分类号： H01L21/28562 ,  C23C16/06 ,  C23C16/45525 ,  H01L21/28518 ,  H01L21/76843 ,  Y10S438/913

摘要： Some embodiments include methods of titanium deposition in which a silicon-containing surface and an electrically insulative surface are both exposed to titanium-containing material, and in which such exposure forms titanium silicide from the silicon-containing surface while not depositing titanium onto the electrically insulative surface. The embodiments may include atomic layer deposition processes, and may include a hydrogen pre-treatment of the silicon-containing surfaces to activate the surfaces for reaction with the titanium-containing material. Some embodiments include methods of titanium deposition in which a semiconductor material surface and an electrically insulative surface are both exposed to titanium-containing material, and in which a titanium-containing film is uniformly deposited across both surfaces.

摘要翻译： 一些实施例包括钛沉积的方法，其中含硅表面和电绝缘表面都暴露于含钛材料，并且其中这种暴露从含硅表面形成硅化钛，而不将钛沉积到电绝缘 表面。 这些实施方案可以包括原子层沉积工艺，并且可以包括含氢表面的氢预处理以活化表面以与含钛材料反应。 一些实施例包括钛沉积的方法，其中半导体材料表面和电绝缘表面都暴露于含钛材料，并且其中含钛膜均匀地沉积在两个表面上。

公开(公告)号：US20100091574A1

公开(公告)日：2010-04-15

申请号：US12637989

申请日：2009-12-15

申请人： Cem Basceri ,  Gurtej S. Sandhu

发明人： Cem Basceri ,  Gurtej S. Sandhu

IPC分类号： G11C16/04 ,  H01L29/792 ,  H01L21/326

CPC分类号： G11C11/5671 ,  G11C8/12 ,  G11C16/0416 ,  G11C16/0466 ,  H01L29/513 ,  H01L29/792

摘要： One-transistor memory devices facilitate nonvolatile data storage through the manipulation of oxygen vacancies within a trapping layer of a field-effect transistor (FET), thereby providing control and variation of threshold voltages of the transistor. Various threshold voltages may be assigned a data value, providing the ability to store one or more bits of data in a single memory cell. To control the threshold voltage, the oxygen vacancies may be manipulated by trapping electrons within the vacancies, freeing trapped electrons from the vacancies, moving the vacancies within the trapping layer and annihilating the vacancies.

摘要翻译： 单晶体管存储器件通过操纵场效应晶体管（FET）的俘获层内的氧空位来促进非易失性数据存储，从而提供晶体管的阈值电压的控制和变化。 可以为各种阈值电压分配数据值，提供将一个或多个位数据存储在单个存储器单元中的能力。 为了控制阈值电压，可以通过在空位内捕获电子来操纵氧空位，从空位释放被俘获的电子，移动捕获层内的空位并湮灭空位。

公开(公告)号：US07687358B2

公开(公告)日：2010-03-30

申请号：US11171873

申请日：2005-06-30

申请人： Cem Basceri ,  H. Montgomery Manning ,  Gurtej S. Sandhu ,  Kunal R. Parekh

发明人： Cem Basceri ,  H. Montgomery Manning ,  Gurtej S. Sandhu ,  Kunal R. Parekh

IPC分类号： H01L21/336

CPC分类号： H01L29/4983 ,  H01L21/28194 ,  H01L29/512 ,  H01L29/517

摘要： This invention includes gated field effect devices, and methods of forming gated field effect devices. In one implementation, a gated field effect device includes a pair of source/drain regions having a channel region therebetween. A gate is received proximate the channel region between the source/drain regions. The gate has a gate width between the source/drain regions. A gate dielectric is received intermediate the channel region and the gate. The gate dielectric has at least two different regions along the width of the gate. The different regions are characterized by different materials which are effective to define the two different regions to have different dielectric constants k. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括门控场效应器件，以及形成门控场效应器件的方法。 在一种实施方案中，门控场效应器件包括在其间具有沟道区的一对源/漏区。 在源极/漏极区域之间的沟道区域附近接收栅极。 栅极在源极/漏极区之间具有栅极宽度。 栅极电介质被接收在沟道区域和栅极之间。 栅极电介质沿着栅极的宽度具有至少两个不同的区域。 不同的区域由不同的材料表征，其有效地限定两个不同的区域以具有不同的介电常数k。 考虑了其他方面和实现。

公开(公告)号：US20090127656A1

公开(公告)日：2009-05-21

申请号：US12289692

申请日：2008-10-31

申请人： Cem Basceri ,  Gurtej Sandhu

发明人： Cem Basceri ,  Gurtej Sandhu

IPC分类号： H01L29/00

CPC分类号： H01L27/1085

摘要： A capacitor structure having a dielectric layer disposed between two conductive electrodes, wherein the dielectric layer contains at least one charge trap site corresponding to a specific energy state. The energy states may be used to distinguish memory states for the capacitor structure, allowing the invention to be used as a memory device. A method of forming the trap cites involves an atomic layer deposition of a material at pre-determined areas in the dielectric layer.

摘要翻译： 一种具有设置在两个导电电极之间的电介质层的电容器结构，其中所述电介质层包含对应于特定能量状态的至少一个电荷陷阱位置。 能量状态可以用于区分电容器结构的存储器状态，从而允许本发明用作存储器件。 形成陷阱的方法涉及在电介质层中的预定区域处的材料的原子层沉积。