公开(公告)号：US20160240682A1

公开(公告)日：2016-08-18

申请号：US15010045

申请日：2016-01-29

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Junichi KOEZUKA ,  Kenichi OKAZAKI ,  Yasumasa YAMANE ,  Yuhei SATO ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/04 ,  H01L29/24

CPC classification number: H01L29/7869 ,  H01L21/02 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/78696

Abstract: To provide a novel oxide semiconductor film. The oxide semiconductor film includes In, M, and Zn. The M is Al, Ga, Y, or Sn. In the case where the proportion of In in the oxide semiconductor film is 4, the proportion of M is greater than or equal to 1.5 and less than or equal to 2.5 and the proportion of Zn is greater than or equal to 2 and less than or equal to 4.

Abstract translation: 提供新型氧化物半导体膜。 氧化物半导体膜包括In，M和Zn。 M是Al，Ga，Y或Sn。 在氧化物半导体膜中的In的比例为4的情况下，M的比例大于等于1.5且小于等于2.5，Zn的比例大于等于2且小于或等于2， 等于4。

公开(公告)号：US20160111547A1

公开(公告)日：2016-04-21

申请号：US14883971

申请日：2015-10-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Akihisa SHIMOMURA ,  Yasumasa YAMANE ,  Naoto YAMADE ,  Tetsuhiro TANAKA

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78606 ,  H01L29/78618 ,  H01L29/78648 ,  H01L29/78696

Abstract: A transistor with stable electrical characteristics or a transistor with normally-off electrical characteristics. The transistor is a semiconductor device including a conductor, a semiconductor, a first insulator, and a second insulator. The semiconductor is over the first insulator. The conductor is over the semiconductor. The second insulator is between the conductor and the semiconductor. The first insulator includes fluorine and hydrogen. The fluorine concentration of the first insulator is higher than the hydrogen concentration of the first insulator.

Abstract translation: 具有稳定电特性的晶体管或具有常关电特性的晶体管。 晶体管是包括导体，半导体，第一绝缘体和第二绝缘体的半导体器件。 半导体在第一绝缘体之上。 导体在半导体上。 第二绝缘体在导体和半导体之间。 第一绝缘体包括氟和氢。 第一绝缘体的氟浓度高于第一绝缘体的氢浓度。

公开(公告)号：US20150340505A1

公开(公告)日：2015-11-26

申请号：US14719431

申请日：2015-05-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Tetsuhiro TANAKA ,  Masayuki SAKAKURA ,  Ryo TOKUMARU ,  Yasumasa YAMANE ,  Yuhei SATO

IPC: H01L29/786 ,  H01L21/465 ,  H01L21/477 ,  H01L29/40 ,  H01L29/66 ,  H01L21/02 ,  H01L21/441

CPC classification number: H01L29/66969 ,  H01L21/02255 ,  H01L21/02565 ,  H01L21/441 ,  H01L21/465 ,  H01L21/477 ,  H01L21/8258 ,  H01L27/0688 ,  H01L27/088 ,  H01L27/1156 ,  H01L29/401 ,  H01L29/786 ,  H01L29/78648 ,  H01L29/7869 ,  H01L29/78696

Abstract: A method for manufacturing a semiconductor device includes the steps of forming a first insulating film over a first gate electrode over a substrate while heated at a temperature higher than or equal to 450° C. and lower than the strain point of the substrate, forming a first oxide semiconductor film over the first insulating film, adding oxygen to the first oxide semiconductor film and then forming a second oxide semiconductor film over the first oxide semiconductor film, and performing heat treatment so that part of oxygen contained in the first oxide semiconductor film is transferred to the second oxide semiconductor film.

Abstract translation: 一种制造半导体器件的方法包括以下步骤：在高于或等于450℃并低于衬底的应变点的温度下加热时，在衬底上方的第一栅电极上形成第一绝缘膜，形成 在所述第一绝缘膜上方的第一氧化物半导体膜，向所述第一氧化物半导体膜添加氧，然后在所述第一氧化物半导体膜上形成第二氧化物半导体膜，进行热处理，使得所述第一氧化物半导体膜中包含的部分氧为 转移到第二氧化物半导体膜。

公开(公告)号：US20150243738A1

公开(公告)日：2015-08-27

申请号：US14626049

申请日：2015-02-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Yasumasa YAMANE ,  Yuhei SATO ,  Takahisa ISHIYAMA ,  Kenichi OKAZAKI ,  Chiho KAWANABE ,  Masashi OOTA ,  Noritaka ISHIHARA

IPC: H01L29/24 ,  C01G15/00 ,  H01L27/12

CPC classification number: H01L29/7869 ,  C01G15/006 ,  C01P2002/72 ,  C01P2002/89 ,  C01P2004/04 ,  C01P2006/40 ,  H01L27/1225 ,  H01L29/045 ,  H01L29/24 ,  H01L29/78696

Abstract: Favorable electrical characteristics are given to a semiconductor device. Furthermore, a semiconductor device having high reliability is provided. One embodiment of the present invention is an oxide semiconductor film having a plurality of electron diffraction patterns which are observed in such a manner that a surface where the oxide semiconductor film is formed is irradiated with an electron beam having a probe diameter whose half-width is 1 nm. The plurality of electron diffraction patterns include 50 or more electron diffraction patterns which are observed in different areas, the sum of the percentage of first electron diffraction patterns and the percentage of second electron diffraction patterns accounts for 100%, the first electron diffraction patterns account for 90% or more, the first electron diffraction pattern includes observed points which indicates that a c-axis is oriented in a direction substantially perpendicular to the surface where the oxide semiconductor film is formed.

Abstract translation: 给半导体器件提供有利的电特性。 此外，提供了具有高可靠性的半导体器件。 本发明的一个实施方案是具有多个电子衍射图案的氧化物半导体膜，其以使得形成氧化物半导体膜的表面被照射电子束，该电子束的半峰宽为 1nm。 多个电子衍射图案包括在不同区域中观察到的50个以上的电子衍射图案，第一电子衍射图案的百分比和第二电子衍射图案的百分比之和占100％，第一电子衍射图案占 90％以上时，第一电子衍射图案包括观察点，其表示c轴在与形成氧化物半导体膜的表面基本垂直的方向上取向。

公开(公告)号：US20150024577A1

公开(公告)日：2015-01-22

申请号：US14330481

申请日：2014-07-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi KATO ,  Yasuhiko TAKEMURA ,  Tetsuhiro TANAKA ,  Takayuki INOUE ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Shunpei YAMAZAKI

IPC: G11C16/04 ,  H01L27/115 ,  G11C16/20

CPC classification number: G11C16/0466 ,  G11C16/20 ,  H01L21/28282 ,  H01L27/108 ,  H01L27/1156 ,  H01L27/11568

Abstract: A manufacturing method of a semiconductor device in which the threshold is corrected is provided. In a semiconductor device including a plurality of transistors each includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit for supplying a signal to the gate electrode and a circuit for supplying a signal to the source or drain electrode are electrically separated from each other. The process is performed in the state where the potential of the former circuit is set higher than the potential of the latter circuit.

Abstract translation: 提供了其中校正阈值的半导体器件的制造方法。 在包括多个晶体管的半导体器件中，每个包括半导体，与半导体电连接的源电极或漏电极，栅电极和栅电极与半导体之间的电荷陷阱层，电子被俘获在电荷陷阱层 通过进行热处理，同时保持栅电极的电位高于源电极或漏电极的电位1秒以上。 通过该过程，阈值增加并且Icut减小。 用于向栅电极提供信号的电路和用于向源电极或漏电极提供信号的电路彼此电分离。 该处理在前一电路的电位被设置为高于后一电路的电位的状态下执行。

公开(公告)号：US20150008428A1

公开(公告)日：2015-01-08

申请号：US14313154

申请日：2014-06-24

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshitaka YAMAMOTO ,  Tetsuhiro TANAKA ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Takayuki INOUE ,  Shunpei YAMAZAKI

IPC: H01L29/786 ,  H01L29/792 ,  H01L29/66

CPC classification number: H01L29/7869 ,  H01L27/1156 ,  H01L29/40114 ,  H01L29/40117 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78648 ,  H01L29/78696 ,  H01L2029/42388

Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted to an appropriate value is provided. The semiconductor device includes a semiconductor, a source or drain electrode electrically connected to the semiconductor, a first gate electrode and a second gate electrode between which the semiconductor is sandwiched, an electron trap layer between the first gate electrode and the semiconductor, and a gate insulating layer between the second gate electrode and the semiconductor. By keeping a potential of the first gate electrode higher than a potential of the source or drain electrode for 1 second or more while heating, electrons are trapped in the electron trap layer. Consequently, threshold is increased and Icut is reduced.

Abstract translation: 提供了将阈值调整为适当值的半导体器件的制造方法。 半导体器件包括半导体，与半导体电连接的源极或漏极，第一栅电极和第二栅电极，半导体夹在其间，第一栅电极和半导体之间的电子陷阱层和栅极 第二栅电极和半导体之间的绝缘层。 通过在加热的同时保持第一栅电极的电位高于源极或漏极的电位1秒以上，电子被捕获在电子阱层中。 因此，阈值增加并且Icut减小。